xref: /linux/drivers/clk/renesas/Kconfig (revision d4e59f108e904e4b58323a151a82d85a351c1eed)
1config CLK_RENESAS
2	bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS
3	default y if ARCH_RENESAS
4	select CLK_EMEV2 if ARCH_EMEV2
5	select CLK_RZA1 if ARCH_R7S72100
6	select CLK_R8A73A4 if ARCH_R8A73A4
7	select CLK_R8A7740 if ARCH_R8A7740
8	select CLK_R8A7743 if ARCH_R8A7743
9	select CLK_R8A7745 if ARCH_R8A7745
10	select CLK_R8A7778 if ARCH_R8A7778
11	select CLK_R8A7779 if ARCH_R8A7779
12	select CLK_R8A7790 if ARCH_R8A7790
13	select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793
14	select CLK_R8A7792 if ARCH_R8A7792
15	select CLK_R8A7794 if ARCH_R8A7794
16	select CLK_R8A7795 if ARCH_R8A7795
17	select CLK_R8A7796 if ARCH_R8A7796
18	select CLK_SH73A0 if ARCH_SH73A0
19
20if CLK_RENESAS
21
22config CLK_RENESAS_LEGACY
23	bool "Legacy DT clock support"
24	depends on CLK_R8A7790
25	default y
26	help
27	  Enable backward compatibility with old device trees describing a
28	  hierarchical representation of the various CPG and MSTP clocks.
29
30	  Say Y if you want your kernel to work with old DTBs.
31
32# SoC
33config CLK_EMEV2
34	bool "Emma Mobile EV2 clock support" if COMPILE_TEST
35
36config CLK_RZA1
37	bool
38	select CLK_RENESAS_CPG_MSTP
39
40config CLK_R8A73A4
41	bool
42	select CLK_RENESAS_CPG_MSTP
43	select CLK_RENESAS_DIV6
44
45config CLK_R8A7740
46	bool
47	select CLK_RENESAS_CPG_MSTP
48	select CLK_RENESAS_DIV6
49
50config CLK_R8A7743
51	bool
52	select CLK_RCAR_GEN2_CPG
53
54config CLK_R8A7745
55	bool
56	select CLK_RCAR_GEN2_CPG
57
58config CLK_R8A7778
59	bool
60	select CLK_RENESAS_CPG_MSTP
61
62config CLK_R8A7779
63	bool
64	select CLK_RENESAS_CPG_MSTP
65
66config CLK_R8A7790
67	bool
68	select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY
69	select CLK_RCAR_GEN2_CPG
70	select CLK_RENESAS_DIV6
71
72config CLK_R8A7791
73	bool
74	select CLK_RCAR_GEN2
75	select CLK_RENESAS_DIV6
76
77config CLK_R8A7792
78	bool
79	select CLK_RCAR_GEN2
80
81config CLK_R8A7794
82	bool
83	select CLK_RCAR_GEN2
84	select CLK_RENESAS_DIV6
85
86config CLK_R8A7795
87	bool
88	select CLK_RCAR_GEN3_CPG
89
90config CLK_R8A7796
91	bool
92	select CLK_RCAR_GEN3_CPG
93
94config CLK_SH73A0
95	bool
96	select CLK_RENESAS_CPG_MSTP
97	select CLK_RENESAS_DIV6
98
99
100# Family
101config CLK_RCAR_GEN2
102	bool
103	select CLK_RENESAS_CPG_MSTP
104	select CLK_RENESAS_DIV6
105
106config CLK_RCAR_GEN2_CPG
107	bool
108	select CLK_RENESAS_CPG_MSSR
109
110config CLK_RCAR_GEN3_CPG
111	bool
112	select CLK_RENESAS_CPG_MSSR
113
114
115# Generic
116config CLK_RENESAS_CPG_MSSR
117	bool
118	select CLK_RENESAS_DIV6
119
120config CLK_RENESAS_CPG_MSTP
121	bool
122
123config CLK_RENESAS_DIV6
124	bool "DIV6 clock support" if COMPILE_TEST
125
126endif # CLK_RENESAS
127