1# SPDX-License-Identifier: GPL-2.0 2 3config CLK_RENESAS 4 bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS 5 default y if ARCH_RENESAS 6 select CLK_EMEV2 if ARCH_EMEV2 7 select CLK_RZA1 if ARCH_R7S72100 8 select CLK_R7S9210 if ARCH_R7S9210 9 select CLK_R8A73A4 if ARCH_R8A73A4 10 select CLK_R8A7740 if ARCH_R8A7740 11 select CLK_R8A7742 if ARCH_R8A7742 12 select CLK_R8A7743 if ARCH_R8A7743 || ARCH_R8A7744 13 select CLK_R8A7745 if ARCH_R8A7745 14 select CLK_R8A77470 if ARCH_R8A77470 15 select CLK_R8A774A1 if ARCH_R8A774A1 16 select CLK_R8A774B1 if ARCH_R8A774B1 17 select CLK_R8A774C0 if ARCH_R8A774C0 18 select CLK_R8A774E1 if ARCH_R8A774E1 19 select CLK_R8A7778 if ARCH_R8A7778 20 select CLK_R8A7779 if ARCH_R8A7779 21 select CLK_R8A7790 if ARCH_R8A7790 22 select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793 23 select CLK_R8A7792 if ARCH_R8A7792 24 select CLK_R8A7794 if ARCH_R8A7794 25 select CLK_R8A7795 if ARCH_R8A77951 26 select CLK_R8A77960 if ARCH_R8A77960 27 select CLK_R8A77961 if ARCH_R8A77961 28 select CLK_R8A77965 if ARCH_R8A77965 29 select CLK_R8A77970 if ARCH_R8A77970 30 select CLK_R8A77980 if ARCH_R8A77980 31 select CLK_R8A77990 if ARCH_R8A77990 32 select CLK_R8A77995 if ARCH_R8A77995 33 select CLK_R8A779A0 if ARCH_R8A779A0 34 select CLK_R8A779F0 if ARCH_R8A779F0 35 select CLK_R8A779G0 if ARCH_R8A779G0 36 select CLK_R8A779H0 if ARCH_R8A779H0 37 select CLK_R9A06G032 if ARCH_R9A06G032 38 select CLK_R9A07G043 if ARCH_R9A07G043 39 select CLK_R9A07G044 if ARCH_R9A07G044 40 select CLK_R9A07G054 if ARCH_R9A07G054 41 select CLK_R9A08G045 if ARCH_R9A08G045 42 select CLK_R9A09G011 if ARCH_R9A09G011 43 select CLK_R9A09G047 if ARCH_R9A09G047 44 select CLK_R9A09G057 if ARCH_R9A09G057 45 select CLK_SH73A0 if ARCH_SH73A0 46 47if CLK_RENESAS 48 49# SoC 50config CLK_EMEV2 51 bool "Emma Mobile EV2 clock support" if COMPILE_TEST 52 53config CLK_RZA1 54 bool "RZ/A1H clock support" if COMPILE_TEST 55 select CLK_RENESAS_CPG_MSTP 56 57config CLK_R7S9210 58 bool "RZ/A2 clock support" if COMPILE_TEST 59 select CLK_RENESAS_CPG_MSSR 60 61config CLK_R8A73A4 62 bool "R-Mobile APE6 clock support" if COMPILE_TEST 63 select CLK_RENESAS_CPG_MSTP 64 select CLK_RENESAS_DIV6 65 66config CLK_R8A7740 67 bool "R-Mobile A1 clock support" if COMPILE_TEST 68 select CLK_RENESAS_CPG_MSTP 69 select CLK_RENESAS_DIV6 70 71config CLK_R8A7742 72 bool "RZ/G1H clock support" if COMPILE_TEST 73 select CLK_RCAR_GEN2_CPG 74 75config CLK_R8A7743 76 bool "RZ/G1M clock support" if COMPILE_TEST 77 select CLK_RCAR_GEN2_CPG 78 79config CLK_R8A7745 80 bool "RZ/G1E clock support" if COMPILE_TEST 81 select CLK_RCAR_GEN2_CPG 82 83config CLK_R8A77470 84 bool "RZ/G1C clock support" if COMPILE_TEST 85 select CLK_RCAR_GEN2_CPG 86 87config CLK_R8A774A1 88 bool "RZ/G2M clock support" if COMPILE_TEST 89 select CLK_RCAR_GEN3_CPG 90 91config CLK_R8A774B1 92 bool "RZ/G2N clock support" if COMPILE_TEST 93 select CLK_RCAR_GEN3_CPG 94 95config CLK_R8A774C0 96 bool "RZ/G2E clock support" if COMPILE_TEST 97 select CLK_RCAR_GEN3_CPG 98 99config CLK_R8A774E1 100 bool "RZ/G2H clock support" if COMPILE_TEST 101 select CLK_RCAR_GEN3_CPG 102 103config CLK_R8A7778 104 bool "R-Car M1A clock support" if COMPILE_TEST 105 select CLK_RENESAS_CPG_MSTP 106 107config CLK_R8A7779 108 bool "R-Car H1 clock support" if COMPILE_TEST 109 select CLK_RENESAS_CPG_MSTP 110 111config CLK_R8A7790 112 bool "R-Car H2 clock support" if COMPILE_TEST 113 select CLK_RCAR_GEN2_CPG 114 115config CLK_R8A7791 116 bool "R-Car M2-W/N clock support" if COMPILE_TEST 117 select CLK_RCAR_GEN2_CPG 118 119config CLK_R8A7792 120 bool "R-Car V2H clock support" if COMPILE_TEST 121 select CLK_RCAR_GEN2_CPG 122 123config CLK_R8A7794 124 bool "R-Car E2 clock support" if COMPILE_TEST 125 select CLK_RCAR_GEN2_CPG 126 127config CLK_R8A7795 128 bool "R-Car H3 clock support" if COMPILE_TEST 129 select CLK_RCAR_GEN3_CPG 130 131config CLK_R8A77960 132 bool "R-Car M3-W clock support" if COMPILE_TEST 133 select CLK_RCAR_GEN3_CPG 134 135config CLK_R8A77961 136 bool "R-Car M3-W+ clock support" if COMPILE_TEST 137 select CLK_RCAR_GEN3_CPG 138 139config CLK_R8A77965 140 bool "R-Car M3-N clock support" if COMPILE_TEST 141 select CLK_RCAR_GEN3_CPG 142 143config CLK_R8A77970 144 bool "R-Car V3M clock support" if COMPILE_TEST 145 select CLK_RCAR_GEN3_CPG 146 147config CLK_R8A77980 148 bool "R-Car V3H clock support" if COMPILE_TEST 149 select CLK_RCAR_GEN3_CPG 150 151config CLK_R8A77990 152 bool "R-Car E3 clock support" if COMPILE_TEST 153 select CLK_RCAR_GEN3_CPG 154 155config CLK_R8A77995 156 bool "R-Car D3 clock support" if COMPILE_TEST 157 select CLK_RCAR_GEN3_CPG 158 159config CLK_R8A779A0 160 bool "R-Car V3U clock support" if COMPILE_TEST 161 select CLK_RCAR_GEN4_CPG 162 163config CLK_R8A779F0 164 bool "R-Car S4-8 clock support" if COMPILE_TEST 165 select CLK_RCAR_GEN4_CPG 166 167config CLK_R8A779G0 168 bool "R-Car V4H clock support" if COMPILE_TEST 169 select CLK_RCAR_GEN4_CPG 170 171config CLK_R8A779H0 172 bool "R-Car V4M clock support" if COMPILE_TEST 173 select CLK_RCAR_GEN4_CPG 174 175config CLK_R9A06G032 176 bool "RZ/N1D clock support" if COMPILE_TEST 177 178config CLK_R9A07G043 179 bool "RZ/G2UL clock support" if COMPILE_TEST 180 select CLK_RZG2L 181 182config CLK_R9A07G044 183 bool "RZ/G2L clock support" if COMPILE_TEST 184 select CLK_RZG2L 185 186config CLK_R9A07G054 187 bool "RZ/V2L clock support" if COMPILE_TEST 188 select CLK_RZG2L 189 190config CLK_R9A08G045 191 bool "RZ/G3S clock support" if COMPILE_TEST 192 select CLK_RZG2L 193 194config CLK_R9A09G011 195 bool "RZ/V2M clock support" if COMPILE_TEST 196 select CLK_RZG2L 197 198config CLK_R9A09G047 199 bool "RZ/G3E clock support" if COMPILE_TEST 200 select CLK_RZV2H 201 202config CLK_R9A09G057 203 bool "RZ/V2H(P) clock support" if COMPILE_TEST 204 select CLK_RZV2H 205 206config CLK_SH73A0 207 bool "SH-Mobile AG5 clock support" if COMPILE_TEST 208 select CLK_RENESAS_CPG_MSTP 209 select CLK_RENESAS_DIV6 210 211 212# Family 213config CLK_RCAR_CPG_LIB 214 bool "CPG/MSSR library functions" if COMPILE_TEST 215 216config CLK_RCAR_GEN2_CPG 217 bool "R-Car Gen2 CPG clock support" if COMPILE_TEST 218 select CLK_RENESAS_CPG_MSSR 219 220config CLK_RCAR_GEN3_CPG 221 bool "R-Car Gen3 and RZ/G2 CPG clock support" if COMPILE_TEST 222 select CLK_RCAR_CPG_LIB 223 select CLK_RENESAS_CPG_MSSR 224 225config CLK_RCAR_GEN4_CPG 226 bool "R-Car Gen4 clock support" if COMPILE_TEST 227 select CLK_RCAR_CPG_LIB 228 select CLK_RENESAS_CPG_MSSR 229 230config CLK_RCAR_USB2_CLOCK_SEL 231 bool "R-Car USB2 clock selector support" 232 depends on ARCH_RENESAS || COMPILE_TEST 233 select RESET_CONTROLLER 234 help 235 This is a driver for R-Car USB2 clock selector 236 237config CLK_RZG2L 238 bool "RZ/{G2L,G2UL,G3S,V2L} family clock support" if COMPILE_TEST 239 select RESET_CONTROLLER 240 241config CLK_RZV2H 242 bool "RZ/{G3E,V2H(P)} family clock support" if COMPILE_TEST 243 select RESET_CONTROLLER 244 245config CLK_RENESAS_VBATTB 246 tristate "Renesas VBATTB clock controller" 247 depends on ARCH_RZG2L || COMPILE_TEST 248 select RESET_CONTROLLER 249 250# Generic 251config CLK_RENESAS_CPG_MSSR 252 bool "CPG/MSSR clock support" if COMPILE_TEST 253 select CLK_RENESAS_DIV6 254 255config CLK_RENESAS_CPG_MSTP 256 bool "MSTP clock support" if COMPILE_TEST 257 258config CLK_RENESAS_DIV6 259 bool "DIV6 clock support" if COMPILE_TEST 260 261endif # CLK_RENESAS 262