19e288cefSKuninori Morimoto# SPDX-License-Identifier: GPL-2.0 29e288cefSKuninori Morimoto 380978a4bSGeert Uytterhoevenconfig CLK_RENESAS 480978a4bSGeert Uytterhoeven bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS 580978a4bSGeert Uytterhoeven default y if ARCH_RENESAS 680978a4bSGeert Uytterhoeven select CLK_EMEV2 if ARCH_EMEV2 780978a4bSGeert Uytterhoeven select CLK_RZA1 if ARCH_R7S72100 8fde35c9cSChris Brandt select CLK_R7S9210 if ARCH_R7S9210 980978a4bSGeert Uytterhoeven select CLK_R8A73A4 if ARCH_R8A73A4 1080978a4bSGeert Uytterhoeven select CLK_R8A7740 if ARCH_R8A7740 11e8208a71SLad Prabhakar select CLK_R8A7742 if ARCH_R8A7742 12016f9663SBiju Das select CLK_R8A7743 if ARCH_R8A7743 || ARCH_R8A7744 1380978a4bSGeert Uytterhoeven select CLK_R8A7745 if ARCH_R8A7745 145bf2fbbeSBiju Das select CLK_R8A77470 if ARCH_R8A77470 15331a53e0SBiju Das select CLK_R8A774A1 if ARCH_R8A774A1 160b9f1c2cSBiju Das select CLK_R8A774B1 if ARCH_R8A774B1 17906e0a4aSFabrizio Castro select CLK_R8A774C0 if ARCH_R8A774C0 18c8a53fa1SMarian-Cristian Rotariu select CLK_R8A774E1 if ARCH_R8A774E1 1980978a4bSGeert Uytterhoeven select CLK_R8A7778 if ARCH_R8A7778 2080978a4bSGeert Uytterhoeven select CLK_R8A7779 if ARCH_R8A7779 2180978a4bSGeert Uytterhoeven select CLK_R8A7790 if ARCH_R8A7790 2280978a4bSGeert Uytterhoeven select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793 2380978a4bSGeert Uytterhoeven select CLK_R8A7792 if ARCH_R8A7792 2480978a4bSGeert Uytterhoeven select CLK_R8A7794 if ARCH_R8A7794 25b1dec4e7SWolfram Sang select CLK_R8A7795 if ARCH_R8A77951 2603975b72SGeert Uytterhoeven select CLK_R8A77960 if ARCH_R8A77960 272ba738d5SGeert Uytterhoeven select CLK_R8A77961 if ARCH_R8A77961 287ce36da9SJacopo Mondi select CLK_R8A77965 if ARCH_R8A77965 298d46e28fSSergei Shtylyov select CLK_R8A77970 if ARCH_R8A77970 30ce15783cSSergei Shtylyov select CLK_R8A77980 if ARCH_R8A77980 313570a2afSYoshihiro Shimoda select CLK_R8A77990 if ARCH_R8A77990 32d71e851dSGeert Uytterhoeven select CLK_R8A77995 if ARCH_R8A77995 3317bcc803SYoshihiro Shimoda select CLK_R8A779A0 if ARCH_R8A779A0 3424aaff6aSYoshihiro Shimoda select CLK_R8A779F0 if ARCH_R8A779F0 350ab55cf1SYoshihiro Shimoda select CLK_R8A779G0 if ARCH_R8A779G0 36f077cab3SCong Dang select CLK_R8A779H0 if ARCH_R8A779H0 374c3d8852SMichel Pollet select CLK_R9A06G032 if ARCH_R9A06G032 38c8b08822SBiju Das select CLK_R9A07G043 if ARCH_R9A07G043 3917f0ff3dSLad Prabhakar select CLK_R9A07G044 if ARCH_R9A07G044 40a1bcf50aSBiju Das select CLK_R9A07G054 if ARCH_R9A07G054 41de60a3ebSClaudiu Beznea select CLK_R9A08G045 if ARCH_R9A08G045 421dd65bb0SPhil Edworthy select CLK_R9A09G011 if ARCH_R9A09G011 43bb6a9aafSBiju Das select CLK_R9A09G047 if ARCH_R9A09G047 44f6462eb0SLad Prabhakar select CLK_R9A09G056 if ARCH_R9A09G056 4536932cbcSLad Prabhakar select CLK_R9A09G057 if ARCH_R9A09G057 46*065fe720SThierry Bultel select CLK_R9A09G077 if ARCH_R9A09G077 4780978a4bSGeert Uytterhoeven select CLK_SH73A0 if ARCH_SH73A0 4880978a4bSGeert Uytterhoeven 4980978a4bSGeert Uytterhoevenif CLK_RENESAS 5080978a4bSGeert Uytterhoeven 5180978a4bSGeert Uytterhoeven# SoC 5280978a4bSGeert Uytterhoevenconfig CLK_EMEV2 5380978a4bSGeert Uytterhoeven bool "Emma Mobile EV2 clock support" if COMPILE_TEST 5480978a4bSGeert Uytterhoeven 5580978a4bSGeert Uytterhoevenconfig CLK_RZA1 56371dd373SGeert Uytterhoeven bool "RZ/A1H clock support" if COMPILE_TEST 5780978a4bSGeert Uytterhoeven select CLK_RENESAS_CPG_MSTP 5880978a4bSGeert Uytterhoeven 59fde35c9cSChris Brandtconfig CLK_R7S9210 60fde35c9cSChris Brandt bool "RZ/A2 clock support" if COMPILE_TEST 61fde35c9cSChris Brandt select CLK_RENESAS_CPG_MSSR 62fde35c9cSChris Brandt 6380978a4bSGeert Uytterhoevenconfig CLK_R8A73A4 64371dd373SGeert Uytterhoeven bool "R-Mobile APE6 clock support" if COMPILE_TEST 6580978a4bSGeert Uytterhoeven select CLK_RENESAS_CPG_MSTP 6680978a4bSGeert Uytterhoeven select CLK_RENESAS_DIV6 6780978a4bSGeert Uytterhoeven 6880978a4bSGeert Uytterhoevenconfig CLK_R8A7740 69371dd373SGeert Uytterhoeven bool "R-Mobile A1 clock support" if COMPILE_TEST 7080978a4bSGeert Uytterhoeven select CLK_RENESAS_CPG_MSTP 7180978a4bSGeert Uytterhoeven select CLK_RENESAS_DIV6 7280978a4bSGeert Uytterhoeven 73e8208a71SLad Prabhakarconfig CLK_R8A7742 74e8208a71SLad Prabhakar bool "RZ/G1H clock support" if COMPILE_TEST 75e8208a71SLad Prabhakar select CLK_RCAR_GEN2_CPG 76e8208a71SLad Prabhakar 7780978a4bSGeert Uytterhoevenconfig CLK_R8A7743 78371dd373SGeert Uytterhoeven bool "RZ/G1M clock support" if COMPILE_TEST 7980978a4bSGeert Uytterhoeven select CLK_RCAR_GEN2_CPG 8080978a4bSGeert Uytterhoeven 8180978a4bSGeert Uytterhoevenconfig CLK_R8A7745 82371dd373SGeert Uytterhoeven bool "RZ/G1E clock support" if COMPILE_TEST 8380978a4bSGeert Uytterhoeven select CLK_RCAR_GEN2_CPG 8480978a4bSGeert Uytterhoeven 855bf2fbbeSBiju Dasconfig CLK_R8A77470 865bf2fbbeSBiju Das bool "RZ/G1C clock support" if COMPILE_TEST 875bf2fbbeSBiju Das select CLK_RCAR_GEN2_CPG 885bf2fbbeSBiju Das 89331a53e0SBiju Dasconfig CLK_R8A774A1 90331a53e0SBiju Das bool "RZ/G2M clock support" if COMPILE_TEST 91331a53e0SBiju Das select CLK_RCAR_GEN3_CPG 92331a53e0SBiju Das 930b9f1c2cSBiju Dasconfig CLK_R8A774B1 940b9f1c2cSBiju Das bool "RZ/G2N clock support" if COMPILE_TEST 950b9f1c2cSBiju Das select CLK_RCAR_GEN3_CPG 960b9f1c2cSBiju Das 97906e0a4aSFabrizio Castroconfig CLK_R8A774C0 98906e0a4aSFabrizio Castro bool "RZ/G2E clock support" if COMPILE_TEST 99906e0a4aSFabrizio Castro select CLK_RCAR_GEN3_CPG 100906e0a4aSFabrizio Castro 101c8a53fa1SMarian-Cristian Rotariuconfig CLK_R8A774E1 102c8a53fa1SMarian-Cristian Rotariu bool "RZ/G2H clock support" if COMPILE_TEST 103c8a53fa1SMarian-Cristian Rotariu select CLK_RCAR_GEN3_CPG 104c8a53fa1SMarian-Cristian Rotariu 10580978a4bSGeert Uytterhoevenconfig CLK_R8A7778 106371dd373SGeert Uytterhoeven bool "R-Car M1A clock support" if COMPILE_TEST 10780978a4bSGeert Uytterhoeven select CLK_RENESAS_CPG_MSTP 10880978a4bSGeert Uytterhoeven 10980978a4bSGeert Uytterhoevenconfig CLK_R8A7779 110371dd373SGeert Uytterhoeven bool "R-Car H1 clock support" if COMPILE_TEST 11180978a4bSGeert Uytterhoeven select CLK_RENESAS_CPG_MSTP 11280978a4bSGeert Uytterhoeven 11380978a4bSGeert Uytterhoevenconfig CLK_R8A7790 114371dd373SGeert Uytterhoeven bool "R-Car H2 clock support" if COMPILE_TEST 115d4e59f10SGeert Uytterhoeven select CLK_RCAR_GEN2_CPG 11680978a4bSGeert Uytterhoeven 11780978a4bSGeert Uytterhoevenconfig CLK_R8A7791 118371dd373SGeert Uytterhoeven bool "R-Car M2-W/N clock support" if COMPILE_TEST 1196449ab81SGeert Uytterhoeven select CLK_RCAR_GEN2_CPG 12080978a4bSGeert Uytterhoeven 12180978a4bSGeert Uytterhoevenconfig CLK_R8A7792 122371dd373SGeert Uytterhoeven bool "R-Car V2H clock support" if COMPILE_TEST 123fd3c2f38SGeert Uytterhoeven select CLK_RCAR_GEN2_CPG 12480978a4bSGeert Uytterhoeven 12580978a4bSGeert Uytterhoevenconfig CLK_R8A7794 126371dd373SGeert Uytterhoeven bool "R-Car E2 clock support" if COMPILE_TEST 1272d75588aSGeert Uytterhoeven select CLK_RCAR_GEN2_CPG 12880978a4bSGeert Uytterhoeven 12980978a4bSGeert Uytterhoevenconfig CLK_R8A7795 130371dd373SGeert Uytterhoeven bool "R-Car H3 clock support" if COMPILE_TEST 13180978a4bSGeert Uytterhoeven select CLK_RCAR_GEN3_CPG 13280978a4bSGeert Uytterhoeven 13392d1ebaeSGeert Uytterhoevenconfig CLK_R8A77960 134371dd373SGeert Uytterhoeven bool "R-Car M3-W clock support" if COMPILE_TEST 13580978a4bSGeert Uytterhoeven select CLK_RCAR_GEN3_CPG 13680978a4bSGeert Uytterhoeven 1372ba738d5SGeert Uytterhoevenconfig CLK_R8A77961 1382ba738d5SGeert Uytterhoeven bool "R-Car M3-W+ clock support" if COMPILE_TEST 1392ba738d5SGeert Uytterhoeven select CLK_RCAR_GEN3_CPG 1402ba738d5SGeert Uytterhoeven 1417ce36da9SJacopo Mondiconfig CLK_R8A77965 1427ce36da9SJacopo Mondi bool "R-Car M3-N clock support" if COMPILE_TEST 1437ce36da9SJacopo Mondi select CLK_RCAR_GEN3_CPG 1447ce36da9SJacopo Mondi 1458d46e28fSSergei Shtylyovconfig CLK_R8A77970 1468d46e28fSSergei Shtylyov bool "R-Car V3M clock support" if COMPILE_TEST 1478d46e28fSSergei Shtylyov select CLK_RCAR_GEN3_CPG 1488d46e28fSSergei Shtylyov 149ce15783cSSergei Shtylyovconfig CLK_R8A77980 150ce15783cSSergei Shtylyov bool "R-Car V3H clock support" if COMPILE_TEST 151ce15783cSSergei Shtylyov select CLK_RCAR_GEN3_CPG 152ce15783cSSergei Shtylyov 1533570a2afSYoshihiro Shimodaconfig CLK_R8A77990 1543570a2afSYoshihiro Shimoda bool "R-Car E3 clock support" if COMPILE_TEST 1553570a2afSYoshihiro Shimoda select CLK_RCAR_GEN3_CPG 1563570a2afSYoshihiro Shimoda 157d71e851dSGeert Uytterhoevenconfig CLK_R8A77995 158d71e851dSGeert Uytterhoeven bool "R-Car D3 clock support" if COMPILE_TEST 159d71e851dSGeert Uytterhoeven select CLK_RCAR_GEN3_CPG 160d71e851dSGeert Uytterhoeven 16117bcc803SYoshihiro Shimodaconfig CLK_R8A779A0 16217bcc803SYoshihiro Shimoda bool "R-Car V3U clock support" if COMPILE_TEST 163470e3f0dSYoshihiro Shimoda select CLK_RCAR_GEN4_CPG 16417bcc803SYoshihiro Shimoda 16524aaff6aSYoshihiro Shimodaconfig CLK_R8A779F0 16624aaff6aSYoshihiro Shimoda bool "R-Car S4-8 clock support" if COMPILE_TEST 16724aaff6aSYoshihiro Shimoda select CLK_RCAR_GEN4_CPG 16824aaff6aSYoshihiro Shimoda 1690ab55cf1SYoshihiro Shimodaconfig CLK_R8A779G0 1700ab55cf1SYoshihiro Shimoda bool "R-Car V4H clock support" if COMPILE_TEST 1710ab55cf1SYoshihiro Shimoda select CLK_RCAR_GEN4_CPG 1720ab55cf1SYoshihiro Shimoda 173f077cab3SCong Dangconfig CLK_R8A779H0 174f077cab3SCong Dang bool "R-Car V4M clock support" if COMPILE_TEST 175f077cab3SCong Dang select CLK_RCAR_GEN4_CPG 176f077cab3SCong Dang 1774c3d8852SMichel Polletconfig CLK_R9A06G032 178e8425dd5SGeert Uytterhoeven bool "RZ/N1D clock support" if COMPILE_TEST 1794c3d8852SMichel Pollet 180c8b08822SBiju Dasconfig CLK_R9A07G043 181c8b08822SBiju Das bool "RZ/G2UL clock support" if COMPILE_TEST 182c8b08822SBiju Das select CLK_RZG2L 183c8b08822SBiju Das 18417f0ff3dSLad Prabhakarconfig CLK_R9A07G044 18517f0ff3dSLad Prabhakar bool "RZ/G2L clock support" if COMPILE_TEST 18617f0ff3dSLad Prabhakar select CLK_RZG2L 18717f0ff3dSLad Prabhakar 188a1bcf50aSBiju Dasconfig CLK_R9A07G054 189a1bcf50aSBiju Das bool "RZ/V2L clock support" if COMPILE_TEST 190a1bcf50aSBiju Das select CLK_RZG2L 191a1bcf50aSBiju Das 192de60a3ebSClaudiu Bezneaconfig CLK_R9A08G045 193de60a3ebSClaudiu Beznea bool "RZ/G3S clock support" if COMPILE_TEST 194de60a3ebSClaudiu Beznea select CLK_RZG2L 195de60a3ebSClaudiu Beznea 1961dd65bb0SPhil Edworthyconfig CLK_R9A09G011 1971dd65bb0SPhil Edworthy bool "RZ/V2M clock support" if COMPILE_TEST 1981dd65bb0SPhil Edworthy select CLK_RZG2L 1991dd65bb0SPhil Edworthy 200bb6a9aafSBiju Dasconfig CLK_R9A09G047 201bb6a9aafSBiju Das bool "RZ/G3E clock support" if COMPILE_TEST 202bb6a9aafSBiju Das select CLK_RZV2H 203bb6a9aafSBiju Das 204f6462eb0SLad Prabhakarconfig CLK_R9A09G056 205f6462eb0SLad Prabhakar bool "RZ/V2N clock support" if COMPILE_TEST 206f6462eb0SLad Prabhakar select CLK_RZV2H 207f6462eb0SLad Prabhakar 20836932cbcSLad Prabhakarconfig CLK_R9A09G057 20936932cbcSLad Prabhakar bool "RZ/V2H(P) clock support" if COMPILE_TEST 21036932cbcSLad Prabhakar select CLK_RZV2H 21136932cbcSLad Prabhakar 212*065fe720SThierry Bultelconfig CLK_R9A09G077 213*065fe720SThierry Bultel bool "RZ/T2H clock support" if COMPILE_TEST 214*065fe720SThierry Bultel select CLK_RENESAS_CPG_MSSR 215*065fe720SThierry Bultel 21680978a4bSGeert Uytterhoevenconfig CLK_SH73A0 217371dd373SGeert Uytterhoeven bool "SH-Mobile AG5 clock support" if COMPILE_TEST 21880978a4bSGeert Uytterhoeven select CLK_RENESAS_CPG_MSTP 21980978a4bSGeert Uytterhoeven select CLK_RENESAS_DIV6 22080978a4bSGeert Uytterhoeven 22180978a4bSGeert Uytterhoeven 22280978a4bSGeert Uytterhoeven# Family 2238bb67d87SWolfram Sangconfig CLK_RCAR_CPG_LIB 2248bb67d87SWolfram Sang bool "CPG/MSSR library functions" if COMPILE_TEST 2258bb67d87SWolfram Sang 22680978a4bSGeert Uytterhoevenconfig CLK_RCAR_GEN2_CPG 227371dd373SGeert Uytterhoeven bool "R-Car Gen2 CPG clock support" if COMPILE_TEST 22880978a4bSGeert Uytterhoeven select CLK_RENESAS_CPG_MSSR 22980978a4bSGeert Uytterhoeven 23080978a4bSGeert Uytterhoevenconfig CLK_RCAR_GEN3_CPG 23115d683e6SLad Prabhakar bool "R-Car Gen3 and RZ/G2 CPG clock support" if COMPILE_TEST 2328bb67d87SWolfram Sang select CLK_RCAR_CPG_LIB 23380978a4bSGeert Uytterhoeven select CLK_RENESAS_CPG_MSSR 23480978a4bSGeert Uytterhoeven 235470e3f0dSYoshihiro Shimodaconfig CLK_RCAR_GEN4_CPG 236470e3f0dSYoshihiro Shimoda bool "R-Car Gen4 clock support" if COMPILE_TEST 237470e3f0dSYoshihiro Shimoda select CLK_RCAR_CPG_LIB 238470e3f0dSYoshihiro Shimoda select CLK_RENESAS_CPG_MSSR 239470e3f0dSYoshihiro Shimoda 240311accb6SYoshihiro Shimodaconfig CLK_RCAR_USB2_CLOCK_SEL 241ebae969dSGeert Uytterhoeven bool "R-Car USB2 clock selector support" 242311accb6SYoshihiro Shimoda depends on ARCH_RENESAS || COMPILE_TEST 2431ab4f439SYoshihiro Shimoda select RESET_CONTROLLER 244311accb6SYoshihiro Shimoda help 245311accb6SYoshihiro Shimoda This is a driver for R-Car USB2 clock selector 24680978a4bSGeert Uytterhoeven 247ef3c613cSLad Prabhakarconfig CLK_RZG2L 248ebae969dSGeert Uytterhoeven bool "RZ/{G2L,G2UL,G3S,V2L} family clock support" if COMPILE_TEST 249ef3c613cSLad Prabhakar select RESET_CONTROLLER 250ef3c613cSLad Prabhakar 251dd22e562SLad Prabhakarconfig CLK_RZV2H 252bb6a9aafSBiju Das bool "RZ/{G3E,V2H(P)} family clock support" if COMPILE_TEST 253dd22e562SLad Prabhakar select RESET_CONTROLLER 254dd22e562SLad Prabhakar 2553b42450cSClaudiu Bezneaconfig CLK_RENESAS_VBATTB 2563b42450cSClaudiu Beznea tristate "Renesas VBATTB clock controller" 2573b42450cSClaudiu Beznea depends on ARCH_RZG2L || COMPILE_TEST 2583b42450cSClaudiu Beznea select RESET_CONTROLLER 2593b42450cSClaudiu Beznea 26080978a4bSGeert Uytterhoeven# Generic 261a5bd7f7aSGeert Uytterhoevenconfig CLK_RENESAS_CPG_MSSR 262371dd373SGeert Uytterhoeven bool "CPG/MSSR clock support" if COMPILE_TEST 26380978a4bSGeert Uytterhoeven select CLK_RENESAS_DIV6 264a5bd7f7aSGeert Uytterhoeven 265a5bd7f7aSGeert Uytterhoevenconfig CLK_RENESAS_CPG_MSTP 266371dd373SGeert Uytterhoeven bool "MSTP clock support" if COMPILE_TEST 26780978a4bSGeert Uytterhoeven 26880978a4bSGeert Uytterhoevenconfig CLK_RENESAS_DIV6 26980978a4bSGeert Uytterhoeven bool "DIV6 clock support" if COMPILE_TEST 27080978a4bSGeert Uytterhoeven 27180978a4bSGeert Uytterhoevenendif # CLK_RENESAS 272