xref: /linux/drivers/clk/qcom/common.h (revision b4ada0618eed0fbd1b1630f73deb048c592b06a1)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2014, The Linux Foundation. All rights reserved. */
3 
4 #ifndef __QCOM_CLK_COMMON_H__
5 #define __QCOM_CLK_COMMON_H__
6 
7 struct platform_device;
8 struct regmap_config;
9 struct clk_regmap;
10 struct qcom_reset_map;
11 struct regmap;
12 struct freq_tbl;
13 struct clk_hw;
14 
15 #define PLL_LOCK_COUNT_SHIFT	8
16 #define PLL_LOCK_COUNT_MASK	0x3f
17 #define PLL_BIAS_COUNT_SHIFT	14
18 #define PLL_BIAS_COUNT_MASK	0x3f
19 #define PLL_VOTE_FSM_ENA	BIT(20)
20 #define PLL_VOTE_FSM_RESET	BIT(21)
21 
22 struct qcom_icc_hws_data {
23 	int master_id;
24 	int slave_id;
25 	int clk_id;
26 };
27 
28 struct qcom_cc_driver_data {
29 	struct clk_alpha_pll **alpha_plls;
30 	size_t num_alpha_plls;
31 	u32 *clk_cbcrs;
32 	size_t num_clk_cbcrs;
33 	const struct clk_rcg_dfs_data *dfs_rcgs;
34 	size_t num_dfs_rcgs;
35 	void (*clk_regs_configure)(struct device *dev, struct regmap *regmap);
36 };
37 
38 struct qcom_cc_desc {
39 	const struct regmap_config *config;
40 	struct clk_regmap **clks;
41 	size_t num_clks;
42 	const struct qcom_reset_map *resets;
43 	size_t num_resets;
44 	struct gdsc **gdscs;
45 	size_t num_gdscs;
46 	struct clk_hw **clk_hws;
47 	size_t num_clk_hws;
48 	const struct qcom_icc_hws_data *icc_hws;
49 	size_t num_icc_hws;
50 	unsigned int icc_first_node_id;
51 	bool use_rpm;
52 	struct qcom_cc_driver_data *driver_data;
53 };
54 
55 /**
56  * struct parent_map - map table for source select configuration values
57  * @src: source
58  * @cfg: configuration value
59  */
60 struct parent_map {
61 	u8 src;
62 	u8 cfg;
63 };
64 
65 extern const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f,
66 					     unsigned long rate);
67 extern const struct freq_tbl *qcom_find_freq_floor(const struct freq_tbl *f,
68 						   unsigned long rate);
69 extern const struct freq_multi_tbl *qcom_find_freq_multi(const struct freq_multi_tbl *f,
70 							 unsigned long rate);
71 extern void
72 qcom_pll_set_fsm_mode(struct regmap *m, u32 reg, u8 bias_count, u8 lock_count);
73 extern int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map,
74 			       u8 src);
75 extern int qcom_find_cfg_index(struct clk_hw *hw, const struct parent_map *map,
76 			       u8 cfg);
77 
78 extern int qcom_cc_register_board_clk(struct device *dev, const char *path,
79 				      const char *name, unsigned long rate);
80 extern int qcom_cc_register_sleep_clk(struct device *dev);
81 
82 extern struct regmap *qcom_cc_map(struct platform_device *pdev,
83 				  const struct qcom_cc_desc *desc);
84 extern int qcom_cc_really_probe(struct device *dev,
85 				const struct qcom_cc_desc *desc,
86 				struct regmap *regmap);
87 extern int qcom_cc_probe(struct platform_device *pdev,
88 			 const struct qcom_cc_desc *desc);
89 extern int qcom_cc_probe_by_index(struct platform_device *pdev, int index,
90 				  const struct qcom_cc_desc *desc);
91 
92 #endif
93