xref: /linux/drivers/clk/qcom/apcs-msm8916.c (revision 6fdcba32711044c35c0e1b094cbd8f3f0b4472c9)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Qualcomm APCS clock controller driver
4  *
5  * Copyright (c) 2017, Linaro Limited
6  * Author: Georgi Djakov <georgi.djakov@linaro.org>
7  */
8 
9 #include <linux/clk.h>
10 #include <linux/clk-provider.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/slab.h>
14 #include <linux/platform_device.h>
15 #include <linux/regmap.h>
16 
17 #include "clk-regmap.h"
18 #include "clk-regmap-mux-div.h"
19 
20 static const u32 gpll0_a53cc_map[] = { 4, 5 };
21 
22 static const char * const gpll0_a53cc[] = {
23 	"gpll0_vote",
24 	"a53pll",
25 };
26 
27 /*
28  * We use the notifier function for switching to a temporary safe configuration
29  * (mux and divider), while the A53 PLL is reconfigured.
30  */
31 static int a53cc_notifier_cb(struct notifier_block *nb, unsigned long event,
32 			     void *data)
33 {
34 	int ret = 0;
35 	struct clk_regmap_mux_div *md = container_of(nb,
36 						     struct clk_regmap_mux_div,
37 						     clk_nb);
38 	if (event == PRE_RATE_CHANGE)
39 		/* set the mux and divider to safe frequency (400mhz) */
40 		ret = mux_div_set_src_div(md, 4, 3);
41 
42 	return notifier_from_errno(ret);
43 }
44 
45 static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
46 {
47 	struct device *dev = &pdev->dev;
48 	struct device *parent = dev->parent;
49 	struct clk_regmap_mux_div *a53cc;
50 	struct regmap *regmap;
51 	struct clk_init_data init = { };
52 	int ret = -ENODEV;
53 
54 	regmap = dev_get_regmap(parent, NULL);
55 	if (!regmap) {
56 		dev_err(dev, "failed to get regmap: %d\n", ret);
57 		return ret;
58 	}
59 
60 	a53cc = devm_kzalloc(dev, sizeof(*a53cc), GFP_KERNEL);
61 	if (!a53cc)
62 		return -ENOMEM;
63 
64 	init.name = "a53mux";
65 	init.parent_names = gpll0_a53cc;
66 	init.num_parents = ARRAY_SIZE(gpll0_a53cc);
67 	init.ops = &clk_regmap_mux_div_ops;
68 	init.flags = CLK_SET_RATE_PARENT;
69 
70 	a53cc->clkr.hw.init = &init;
71 	a53cc->clkr.regmap = regmap;
72 	a53cc->reg_offset = 0x50;
73 	a53cc->hid_width = 5;
74 	a53cc->hid_shift = 0;
75 	a53cc->src_width = 3;
76 	a53cc->src_shift = 8;
77 	a53cc->parent_map = gpll0_a53cc_map;
78 
79 	a53cc->pclk = devm_clk_get(parent, NULL);
80 	if (IS_ERR(a53cc->pclk)) {
81 		ret = PTR_ERR(a53cc->pclk);
82 		dev_err(dev, "failed to get clk: %d\n", ret);
83 		return ret;
84 	}
85 
86 	a53cc->clk_nb.notifier_call = a53cc_notifier_cb;
87 	ret = clk_notifier_register(a53cc->pclk, &a53cc->clk_nb);
88 	if (ret) {
89 		dev_err(dev, "failed to register clock notifier: %d\n", ret);
90 		return ret;
91 	}
92 
93 	ret = devm_clk_register_regmap(dev, &a53cc->clkr);
94 	if (ret) {
95 		dev_err(dev, "failed to register regmap clock: %d\n", ret);
96 		goto err;
97 	}
98 
99 	ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
100 					  &a53cc->clkr.hw);
101 	if (ret) {
102 		dev_err(dev, "failed to add clock provider: %d\n", ret);
103 		goto err;
104 	}
105 
106 	platform_set_drvdata(pdev, a53cc);
107 
108 	return 0;
109 
110 err:
111 	clk_notifier_unregister(a53cc->pclk, &a53cc->clk_nb);
112 	return ret;
113 }
114 
115 static int qcom_apcs_msm8916_clk_remove(struct platform_device *pdev)
116 {
117 	struct clk_regmap_mux_div *a53cc = platform_get_drvdata(pdev);
118 
119 	clk_notifier_unregister(a53cc->pclk, &a53cc->clk_nb);
120 
121 	return 0;
122 }
123 
124 static struct platform_driver qcom_apcs_msm8916_clk_driver = {
125 	.probe = qcom_apcs_msm8916_clk_probe,
126 	.remove = qcom_apcs_msm8916_clk_remove,
127 	.driver = {
128 		.name = "qcom-apcs-msm8916-clk",
129 	},
130 };
131 module_platform_driver(qcom_apcs_msm8916_clk_driver);
132 
133 MODULE_AUTHOR("Georgi Djakov <georgi.djakov@linaro.org>");
134 MODULE_LICENSE("GPL v2");
135 MODULE_DESCRIPTION("Qualcomm MSM8916 APCS clock driver");
136