1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * mmp factor clock operation source file
4 *
5 * Copyright (C) 2012 Marvell
6 * Chao Xie <xiechao.mail@gmail.com>
7 */
8
9 #include <linux/clk-provider.h>
10 #include <linux/slab.h>
11 #include <linux/io.h>
12 #include <linux/err.h>
13
14 #include "clk.h"
15 /*
16 * It is M/N clock
17 *
18 * Fout from synthesizer can be given from two equations:
19 * numerator/denominator = Fin / (Fout * factor)
20 */
21
22 #define to_clk_factor(hw) container_of(hw, struct mmp_clk_factor, hw)
23
clk_factor_round_rate(struct clk_hw * hw,unsigned long drate,unsigned long * prate)24 static long clk_factor_round_rate(struct clk_hw *hw, unsigned long drate,
25 unsigned long *prate)
26 {
27 struct mmp_clk_factor *factor = to_clk_factor(hw);
28 u64 rate = 0, prev_rate;
29 struct u32_fract *d;
30 int i;
31
32 for (i = 0; i < factor->ftbl_cnt; i++) {
33 d = &factor->ftbl[i];
34
35 prev_rate = rate;
36 rate = (u64)(*prate) * d->denominator;
37 do_div(rate, d->numerator * factor->masks->factor);
38 if (rate > drate)
39 break;
40 }
41 if ((i == 0) || (i == factor->ftbl_cnt)) {
42 return rate;
43 } else {
44 if ((drate - prev_rate) > (rate - drate))
45 return rate;
46 else
47 return prev_rate;
48 }
49 }
50
clk_factor_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)51 static unsigned long clk_factor_recalc_rate(struct clk_hw *hw,
52 unsigned long parent_rate)
53 {
54 struct mmp_clk_factor *factor = to_clk_factor(hw);
55 struct mmp_clk_factor_masks *masks = factor->masks;
56 struct u32_fract d;
57 unsigned int val;
58 u64 rate;
59
60 val = readl_relaxed(factor->base);
61
62 /* calculate numerator */
63 d.numerator = (val >> masks->num_shift) & masks->num_mask;
64
65 /* calculate denominator */
66 d.denominator = (val >> masks->den_shift) & masks->den_mask;
67 if (!d.denominator)
68 return 0;
69
70 rate = (u64)parent_rate * d.denominator;
71 do_div(rate, d.numerator * factor->masks->factor);
72
73 return rate;
74 }
75
76 /* Configures new clock rate*/
clk_factor_set_rate(struct clk_hw * hw,unsigned long drate,unsigned long prate)77 static int clk_factor_set_rate(struct clk_hw *hw, unsigned long drate,
78 unsigned long prate)
79 {
80 struct mmp_clk_factor *factor = to_clk_factor(hw);
81 struct mmp_clk_factor_masks *masks = factor->masks;
82 int i;
83 unsigned long val;
84 unsigned long flags = 0;
85 struct u32_fract *d;
86 u64 rate = 0;
87
88 for (i = 0; i < factor->ftbl_cnt; i++) {
89 d = &factor->ftbl[i];
90
91 rate = (u64)prate * d->denominator;
92 do_div(rate, d->numerator * factor->masks->factor);
93 if (rate > drate)
94 break;
95 }
96 d = i ? &factor->ftbl[i - 1] : &factor->ftbl[0];
97
98 if (factor->lock)
99 spin_lock_irqsave(factor->lock, flags);
100
101 val = readl_relaxed(factor->base);
102
103 val &= ~(masks->num_mask << masks->num_shift);
104 val |= (d->numerator & masks->num_mask) << masks->num_shift;
105
106 val &= ~(masks->den_mask << masks->den_shift);
107 val |= (d->denominator & masks->den_mask) << masks->den_shift;
108
109 writel_relaxed(val, factor->base);
110
111 if (factor->lock)
112 spin_unlock_irqrestore(factor->lock, flags);
113
114 return 0;
115 }
116
clk_factor_init(struct clk_hw * hw)117 static int clk_factor_init(struct clk_hw *hw)
118 {
119 struct mmp_clk_factor *factor = to_clk_factor(hw);
120 struct mmp_clk_factor_masks *masks = factor->masks;
121 struct u32_fract d;
122 u32 val;
123 int i;
124 unsigned long flags = 0;
125
126 if (factor->lock)
127 spin_lock_irqsave(factor->lock, flags);
128
129 val = readl(factor->base);
130
131 /* calculate numerator */
132 d.numerator = (val >> masks->num_shift) & masks->num_mask;
133
134 /* calculate denominator */
135 d.denominator = (val >> masks->den_shift) & masks->den_mask;
136
137 for (i = 0; i < factor->ftbl_cnt; i++)
138 if (d.denominator == factor->ftbl[i].denominator &&
139 d.numerator == factor->ftbl[i].numerator)
140 break;
141
142 if (i >= factor->ftbl_cnt) {
143 val &= ~(masks->num_mask << masks->num_shift);
144 val |= (factor->ftbl[0].numerator & masks->num_mask) << masks->num_shift;
145
146 val &= ~(masks->den_mask << masks->den_shift);
147 val |= (factor->ftbl[0].denominator & masks->den_mask) << masks->den_shift;
148 }
149
150 if (!(val & masks->enable_mask) || i >= factor->ftbl_cnt) {
151 val |= masks->enable_mask;
152 writel(val, factor->base);
153 }
154
155 if (factor->lock)
156 spin_unlock_irqrestore(factor->lock, flags);
157
158 return 0;
159 }
160
161 static const struct clk_ops clk_factor_ops = {
162 .recalc_rate = clk_factor_recalc_rate,
163 .round_rate = clk_factor_round_rate,
164 .set_rate = clk_factor_set_rate,
165 .init = clk_factor_init,
166 };
167
mmp_clk_register_factor(const char * name,const char * parent_name,unsigned long flags,void __iomem * base,struct mmp_clk_factor_masks * masks,struct u32_fract * ftbl,unsigned int ftbl_cnt,spinlock_t * lock)168 struct clk *mmp_clk_register_factor(const char *name, const char *parent_name,
169 unsigned long flags, void __iomem *base,
170 struct mmp_clk_factor_masks *masks,
171 struct u32_fract *ftbl, unsigned int ftbl_cnt, spinlock_t *lock)
172 {
173 struct mmp_clk_factor *factor;
174 struct clk_init_data init;
175 struct clk *clk;
176
177 if (!masks) {
178 pr_err("%s: must pass a clk_factor_mask\n", __func__);
179 return ERR_PTR(-EINVAL);
180 }
181
182 factor = kzalloc(sizeof(*factor), GFP_KERNEL);
183 if (!factor)
184 return ERR_PTR(-ENOMEM);
185
186 /* struct clk_aux assignments */
187 factor->base = base;
188 factor->masks = masks;
189 factor->ftbl = ftbl;
190 factor->ftbl_cnt = ftbl_cnt;
191 factor->hw.init = &init;
192 factor->lock = lock;
193
194 init.name = name;
195 init.ops = &clk_factor_ops;
196 init.flags = flags;
197 init.parent_names = &parent_name;
198 init.num_parents = 1;
199
200 clk = clk_register(NULL, &factor->hw);
201 if (IS_ERR_OR_NULL(clk))
202 kfree(factor);
203
204 return clk;
205 }
206