1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Amlogic Meson-AXG Clock Controller Driver 4 * 5 * Copyright (c) 2016 BayLibre, SAS. 6 * Author: Neil Armstrong <narmstrong@baylibre.com> 7 * 8 * Copyright (c) 2018 Amlogic, inc. 9 * Author: Qiufang Dai <qiufang.dai@amlogic.com> 10 * Author: Yixun Lan <yixun.lan@amlogic.com> 11 */ 12 13 #include <linux/platform_device.h> 14 #include <linux/reset-controller.h> 15 #include <linux/mfd/syscon.h> 16 #include <linux/of_device.h> 17 #include <linux/slab.h> 18 #include "meson-aoclk.h" 19 20 #include "clk-input.h" 21 22 static int meson_aoclk_do_reset(struct reset_controller_dev *rcdev, 23 unsigned long id) 24 { 25 struct meson_aoclk_reset_controller *rstc = 26 container_of(rcdev, struct meson_aoclk_reset_controller, reset); 27 28 return regmap_write(rstc->regmap, rstc->data->reset_reg, 29 BIT(rstc->data->reset[id])); 30 } 31 32 static const struct reset_control_ops meson_aoclk_reset_ops = { 33 .reset = meson_aoclk_do_reset, 34 }; 35 36 static int meson_aoclkc_register_inputs(struct device *dev, 37 struct meson_aoclk_data *data) 38 { 39 struct clk_hw *hw; 40 char *str; 41 int i; 42 43 for (i = 0; i < data->num_inputs; i++) { 44 const struct meson_aoclk_input *in = &data->inputs[i]; 45 46 str = kasprintf(GFP_KERNEL, "%s%s", data->input_prefix, 47 in->name); 48 if (!str) 49 return -ENOMEM; 50 51 hw = meson_clk_hw_register_input(dev, in->name, str, 0); 52 kfree(str); 53 54 if (IS_ERR(hw)) { 55 if (!in->required && PTR_ERR(hw) == -ENOENT) 56 continue; 57 else if (PTR_ERR(hw) != -EPROBE_DEFER) 58 dev_err(dev, "failed to register input %s\n", 59 in->name); 60 return PTR_ERR(hw); 61 } 62 } 63 64 return 0; 65 } 66 67 int meson_aoclkc_probe(struct platform_device *pdev) 68 { 69 struct meson_aoclk_reset_controller *rstc; 70 struct meson_aoclk_data *data; 71 struct device *dev = &pdev->dev; 72 struct regmap *regmap; 73 int ret, clkid; 74 75 data = (struct meson_aoclk_data *) of_device_get_match_data(dev); 76 if (!data) 77 return -ENODEV; 78 79 rstc = devm_kzalloc(dev, sizeof(*rstc), GFP_KERNEL); 80 if (!rstc) 81 return -ENOMEM; 82 83 regmap = syscon_node_to_regmap(of_get_parent(dev->of_node)); 84 if (IS_ERR(regmap)) { 85 dev_err(dev, "failed to get regmap\n"); 86 return PTR_ERR(regmap); 87 } 88 89 ret = meson_aoclkc_register_inputs(dev, data); 90 if (ret) 91 return ret; 92 93 /* Reset Controller */ 94 rstc->data = data; 95 rstc->regmap = regmap; 96 rstc->reset.ops = &meson_aoclk_reset_ops; 97 rstc->reset.nr_resets = data->num_reset, 98 rstc->reset.of_node = dev->of_node; 99 ret = devm_reset_controller_register(dev, &rstc->reset); 100 if (ret) { 101 dev_err(dev, "failed to register reset controller\n"); 102 return ret; 103 } 104 105 /* Populate regmap */ 106 for (clkid = 0; clkid < data->num_clks; clkid++) 107 data->clks[clkid]->map = regmap; 108 109 /* Register all clks */ 110 for (clkid = 0; clkid < data->hw_data->num; clkid++) { 111 if (!data->hw_data->hws[clkid]) 112 continue; 113 114 ret = devm_clk_hw_register(dev, data->hw_data->hws[clkid]); 115 if (ret) { 116 dev_err(dev, "Clock registration failed\n"); 117 return ret; 118 } 119 } 120 121 return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, 122 (void *) data->hw_data); 123 } 124