xref: /linux/drivers/clk/meson/meson-aoclk.c (revision 4fd18fc38757217c746aa063ba9e4729814dc737)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Amlogic Meson-AXG Clock Controller Driver
4  *
5  * Copyright (c) 2016 BayLibre, SAS.
6  * Author: Neil Armstrong <narmstrong@baylibre.com>
7  *
8  * Copyright (c) 2018 Amlogic, inc.
9  * Author: Qiufang Dai <qiufang.dai@amlogic.com>
10  * Author: Yixun Lan <yixun.lan@amlogic.com>
11  */
12 
13 #include <linux/platform_device.h>
14 #include <linux/reset-controller.h>
15 #include <linux/mfd/syscon.h>
16 #include <linux/of_device.h>
17 #include <linux/module.h>
18 
19 #include <linux/slab.h>
20 #include "meson-aoclk.h"
21 
22 static int meson_aoclk_do_reset(struct reset_controller_dev *rcdev,
23 			       unsigned long id)
24 {
25 	struct meson_aoclk_reset_controller *rstc =
26 		container_of(rcdev, struct meson_aoclk_reset_controller, reset);
27 
28 	return regmap_write(rstc->regmap, rstc->data->reset_reg,
29 			    BIT(rstc->data->reset[id]));
30 }
31 
32 static const struct reset_control_ops meson_aoclk_reset_ops = {
33 	.reset = meson_aoclk_do_reset,
34 };
35 
36 int meson_aoclkc_probe(struct platform_device *pdev)
37 {
38 	struct meson_aoclk_reset_controller *rstc;
39 	struct meson_aoclk_data *data;
40 	struct device *dev = &pdev->dev;
41 	struct regmap *regmap;
42 	int ret, clkid;
43 
44 	data = (struct meson_aoclk_data *) of_device_get_match_data(dev);
45 	if (!data)
46 		return -ENODEV;
47 
48 	rstc = devm_kzalloc(dev, sizeof(*rstc), GFP_KERNEL);
49 	if (!rstc)
50 		return -ENOMEM;
51 
52 	regmap = syscon_node_to_regmap(of_get_parent(dev->of_node));
53 	if (IS_ERR(regmap)) {
54 		dev_err(dev, "failed to get regmap\n");
55 		return PTR_ERR(regmap);
56 	}
57 
58 	/* Reset Controller */
59 	rstc->data = data;
60 	rstc->regmap = regmap;
61 	rstc->reset.ops = &meson_aoclk_reset_ops;
62 	rstc->reset.nr_resets = data->num_reset;
63 	rstc->reset.of_node = dev->of_node;
64 	ret = devm_reset_controller_register(dev, &rstc->reset);
65 	if (ret) {
66 		dev_err(dev, "failed to register reset controller\n");
67 		return ret;
68 	}
69 
70 	/* Populate regmap */
71 	for (clkid = 0; clkid < data->num_clks; clkid++)
72 		data->clks[clkid]->map = regmap;
73 
74 	/* Register all clks */
75 	for (clkid = 0; clkid < data->hw_data->num; clkid++) {
76 		if (!data->hw_data->hws[clkid])
77 			continue;
78 
79 		ret = devm_clk_hw_register(dev, data->hw_data->hws[clkid]);
80 		if (ret) {
81 			dev_err(dev, "Clock registration failed\n");
82 			return ret;
83 		}
84 	}
85 
86 	return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
87 		(void *) data->hw_data);
88 }
89 EXPORT_SYMBOL_GPL(meson_aoclkc_probe);
90 MODULE_LICENSE("GPL v2");
91