1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 27b5c5720SJerome Brunetmenu "Clock support for Amlogic platforms" 37b5c5720SJerome Brunet depends on ARCH_MESON || COMPILE_TEST 47b5c5720SJerome Brunet 5889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_REGMAP 6889c2b7eSJerome Brunet tristate 7ea11dda9SJerome Brunet select REGMAP 8ea11dda9SJerome Brunet 9889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_DUALDIV 10889c2b7eSJerome Brunet tristate 11889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 12889c2b7eSJerome Brunet 13889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_MPLL 14889c2b7eSJerome Brunet tristate 15889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 16889c2b7eSJerome Brunet 17889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_PHASE 18889c2b7eSJerome Brunet tristate 19889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 20889c2b7eSJerome Brunet 21889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_PLL 22889c2b7eSJerome Brunet tristate 23889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 24889c2b7eSJerome Brunet 25889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_SCLK_DIV 26889c2b7eSJerome Brunet tristate 27889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 28889c2b7eSJerome Brunet 29889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_VID_PLL_DIV 30889c2b7eSJerome Brunet tristate 31889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 32889c2b7eSJerome Brunet 33230b6f3aSNeil Armstrongconfig COMMON_CLK_MESON_CLKC_UTILS 34230b6f3aSNeil Armstrong tristate 35230b6f3aSNeil Armstrong 36889c2b7eSJerome Brunetconfig COMMON_CLK_MESON_AO_CLKC 37889c2b7eSJerome Brunet tristate 38889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 39*7e1723fdSNeil Armstrong select COMMON_CLK_MESON_CLKC_UTILS 40889c2b7eSJerome Brunet select RESET_CONTROLLER 41889c2b7eSJerome Brunet 426682bd4dSJerome Brunetconfig COMMON_CLK_MESON_EE_CLKC 436682bd4dSJerome Brunet tristate 446682bd4dSJerome Brunet select COMMON_CLK_MESON_REGMAP 45141fbc27SNeil Armstrong select COMMON_CLK_MESON_CLKC_UTILS 466682bd4dSJerome Brunet 4726d34431SNeil Armstrongconfig COMMON_CLK_MESON_CPU_DYNDIV 4826d34431SNeil Armstrong tristate 4926d34431SNeil Armstrong select COMMON_CLK_MESON_REGMAP 5026d34431SNeil Armstrong 51cb7c47d7SMichael Turquetteconfig COMMON_CLK_MESON8B 527b5c5720SJerome Brunet bool "Meson8 SoC Clock controller support" 537b5c5720SJerome Brunet depends on ARM 547b5c5720SJerome Brunet default y 55889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 56889c2b7eSJerome Brunet select COMMON_CLK_MESON_MPLL 57889c2b7eSJerome Brunet select COMMON_CLK_MESON_PLL 58889c2b7eSJerome Brunet select MFD_SYSCON 5918962172SMartin Blumenstingl select RESET_CONTROLLER 60cb7c47d7SMichael Turquette help 61855f06a1SMartin Blumenstingl Support for the clock controller on AmLogic S802 (Meson8), 62855f06a1SMartin Blumenstingl S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you 63855f06a1SMartin Blumenstingl want peripherals and CPU frequency scaling to work. 64738f66d3SMichael Turquette 65738f66d3SMichael Turquetteconfig COMMON_CLK_GXBB 6620425f63SKevin Hilman tristate "GXBB and GXL SoC clock controllers support" 677b5c5720SJerome Brunet depends on ARM64 687b5c5720SJerome Brunet default y 69889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 70889c2b7eSJerome Brunet select COMMON_CLK_MESON_DUALDIV 71889c2b7eSJerome Brunet select COMMON_CLK_MESON_VID_PLL_DIV 72889c2b7eSJerome Brunet select COMMON_CLK_MESON_MPLL 73889c2b7eSJerome Brunet select COMMON_CLK_MESON_PLL 74889c2b7eSJerome Brunet select COMMON_CLK_MESON_AO_CLKC 756682bd4dSJerome Brunet select COMMON_CLK_MESON_EE_CLKC 764162dd5bSJerome Brunet select MFD_SYSCON 77738f66d3SMichael Turquette help 78738f66d3SMichael Turquette Support for the clock controller on AmLogic S905 devices, aka gxbb. 79738f66d3SMichael Turquette Say Y if you want peripherals and CPU frequency scaling to work. 8078b4af31SQiufang Dai 8178b4af31SQiufang Daiconfig COMMON_CLK_AXG 8220425f63SKevin Hilman tristate "AXG SoC clock controllers support" 837b5c5720SJerome Brunet depends on ARM64 847b5c5720SJerome Brunet default y 85889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 86889c2b7eSJerome Brunet select COMMON_CLK_MESON_DUALDIV 87889c2b7eSJerome Brunet select COMMON_CLK_MESON_MPLL 88889c2b7eSJerome Brunet select COMMON_CLK_MESON_PLL 89889c2b7eSJerome Brunet select COMMON_CLK_MESON_AO_CLKC 906682bd4dSJerome Brunet select COMMON_CLK_MESON_EE_CLKC 914162dd5bSJerome Brunet select MFD_SYSCON 9278b4af31SQiufang Dai help 9378b4af31SQiufang Dai Support for the clock controller on AmLogic A113D devices, aka axg. 9478b4af31SQiufang Dai Say Y if you want peripherals and CPU frequency scaling to work. 951cd50181SJerome Brunet 961cd50181SJerome Brunetconfig COMMON_CLK_AXG_AUDIO 971cd50181SJerome Brunet tristate "Meson AXG Audio Clock Controller Driver" 987b5c5720SJerome Brunet depends on ARM64 99889c2b7eSJerome Brunet select COMMON_CLK_MESON_REGMAP 100889c2b7eSJerome Brunet select COMMON_CLK_MESON_PHASE 101889c2b7eSJerome Brunet select COMMON_CLK_MESON_SCLK_DIV 102cb78ba76SJerome Brunet select REGMAP_MMIO 1031cd50181SJerome Brunet help 1041cd50181SJerome Brunet Support for the audio clock controller on AmLogic A113D devices, 1051cd50181SJerome Brunet aka axg, Say Y if you want audio subsystem to work. 106085a4ea9SJian Hu 10728f3be51SDmitry Rokosovconfig COMMON_CLK_A1_PLL 10828f3be51SDmitry Rokosov tristate "Amlogic A1 SoC PLL controller support" 10928f3be51SDmitry Rokosov depends on ARM64 11028f3be51SDmitry Rokosov select COMMON_CLK_MESON_REGMAP 11128f3be51SDmitry Rokosov select COMMON_CLK_MESON_PLL 11228f3be51SDmitry Rokosov help 11328f3be51SDmitry Rokosov Support for the PLL clock controller on Amlogic A113L based 11428f3be51SDmitry Rokosov device, A1 SoC Family. Say Y if you want A1 PLL clock controller 11528f3be51SDmitry Rokosov to work. 11628f3be51SDmitry Rokosov 11784af9144SDmitry Rokosovconfig COMMON_CLK_A1_PERIPHERALS 11884af9144SDmitry Rokosov tristate "Amlogic A1 SoC Peripherals clock controller support" 11984af9144SDmitry Rokosov depends on ARM64 12084af9144SDmitry Rokosov select COMMON_CLK_MESON_DUALDIV 12184af9144SDmitry Rokosov select COMMON_CLK_MESON_REGMAP 12284af9144SDmitry Rokosov help 12384af9144SDmitry Rokosov Support for the Peripherals clock controller on Amlogic A113L based 12484af9144SDmitry Rokosov device, A1 SoC Family. Say Y if you want A1 Peripherals clock 12584af9144SDmitry Rokosov controller to work. 12684af9144SDmitry Rokosov 127085a4ea9SJian Huconfig COMMON_CLK_G12A 12820425f63SKevin Hilman tristate "G12 and SM1 SoC clock controllers support" 1297b5c5720SJerome Brunet depends on ARM64 1307b5c5720SJerome Brunet default y 131085a4ea9SJian Hu select COMMON_CLK_MESON_REGMAP 132042f01bbSNeil Armstrong select COMMON_CLK_MESON_DUALDIV 133085a4ea9SJian Hu select COMMON_CLK_MESON_MPLL 134085a4ea9SJian Hu select COMMON_CLK_MESON_PLL 135042f01bbSNeil Armstrong select COMMON_CLK_MESON_AO_CLKC 1366682bd4dSJerome Brunet select COMMON_CLK_MESON_EE_CLKC 13726d34431SNeil Armstrong select COMMON_CLK_MESON_CPU_DYNDIV 138bae69bfaSKevin Hilman select COMMON_CLK_MESON_VID_PLL_DIV 139085a4ea9SJian Hu select MFD_SYSCON 140085a4ea9SJian Hu help 141085a4ea9SJian Hu Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2 142085a4ea9SJian Hu devices, aka g12a. Say Y if you want peripherals to work. 1437b5c5720SJerome Brunetendmenu 144