1*b348c26cSRex-BC Chen /* SPDX-License-Identifier: GPL-2.0-only */ 2*b348c26cSRex-BC Chen /* 3*b348c26cSRex-BC Chen * Copyright (c) 2022 MediaTek Inc. 4*b348c26cSRex-BC Chen */ 5*b348c26cSRex-BC Chen 6*b348c26cSRex-BC Chen #ifndef __DRV_CLK_MTK_RESET_H 7*b348c26cSRex-BC Chen #define __DRV_CLK_MTK_RESET_H 8*b348c26cSRex-BC Chen 9*b348c26cSRex-BC Chen #include <linux/reset-controller.h> 10*b348c26cSRex-BC Chen #include <linux/types.h> 11*b348c26cSRex-BC Chen 12*b348c26cSRex-BC Chen struct mtk_reset { 13*b348c26cSRex-BC Chen struct regmap *regmap; 14*b348c26cSRex-BC Chen int regofs; 15*b348c26cSRex-BC Chen struct reset_controller_dev rcdev; 16*b348c26cSRex-BC Chen }; 17*b348c26cSRex-BC Chen 18*b348c26cSRex-BC Chen void mtk_register_reset_controller(struct device_node *np, 19*b348c26cSRex-BC Chen unsigned int num_regs, int regofs); 20*b348c26cSRex-BC Chen 21*b348c26cSRex-BC Chen void mtk_register_reset_controller_set_clr(struct device_node *np, 22*b348c26cSRex-BC Chen unsigned int num_regs, int regofs); 23*b348c26cSRex-BC Chen 24*b348c26cSRex-BC Chen #endif /* __DRV_CLK_MTK_RESET_H */ 25