xref: /linux/drivers/clk/mediatek/clk-mt8188-venc.c (revision 3ea5eb68b9d624935108b5e696859304edfac202)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2022 MediaTek Inc.
4  * Author: Garmin Chang <garmin.chang@mediatek.com>
5  */
6 
7 #include <linux/clk-provider.h>
8 #include <linux/mod_devicetable.h>
9 #include <linux/platform_device.h>
10 
11 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
12 
13 #include "clk-gate.h"
14 #include "clk-mtk.h"
15 
16 static const struct mtk_gate_regs venc1_cg_regs = {
17 	.set_ofs = 0x4,
18 	.clr_ofs = 0x8,
19 	.sta_ofs = 0x0,
20 };
21 
22 #define GATE_VENC1(_id, _name, _parent, _shift)			\
23 	GATE_MTK(_id, _name, _parent, &venc1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
24 
25 static const struct mtk_gate venc1_clks[] = {
26 	GATE_VENC1(CLK_VENC1_LARB, "venc1_larb", "top_venc", 0),
27 	GATE_VENC1(CLK_VENC1_VENC, "venc1_venc", "top_venc", 4),
28 	GATE_VENC1(CLK_VENC1_JPGENC, "venc1_jpgenc", "top_venc", 8),
29 	GATE_VENC1(CLK_VENC1_JPGDEC, "venc1_jpgdec", "top_venc", 12),
30 	GATE_VENC1(CLK_VENC1_JPGDEC_C1, "venc1_jpgdec_c1", "top_venc", 16),
31 	GATE_VENC1(CLK_VENC1_GALS, "venc1_gals", "top_venc", 28),
32 	GATE_VENC1(CLK_VENC1_GALS_SRAM, "venc1_gals_sram", "top_venc", 31),
33 };
34 
35 static const struct mtk_clk_desc venc1_desc = {
36 	.clks = venc1_clks,
37 	.num_clks = ARRAY_SIZE(venc1_clks),
38 };
39 
40 static const struct of_device_id of_match_clk_mt8188_venc1[] = {
41 	{ .compatible = "mediatek,mt8188-vencsys", .data = &venc1_desc },
42 	{ /* sentinel */ }
43 };
44 MODULE_DEVICE_TABLE(of, of_match_clk_mt8188_venc1);
45 
46 static struct platform_driver clk_mt8188_venc1_drv = {
47 	.probe = mtk_clk_simple_probe,
48 	.remove = mtk_clk_simple_remove,
49 	.driver = {
50 		.name = "clk-mt8188-venc1",
51 		.of_match_table = of_match_clk_mt8188_venc1,
52 	},
53 };
54 module_platform_driver(clk_mt8188_venc1_drv);
55 
56 MODULE_DESCRIPTION("MediaTek MT8188 Video Encoders clocks driver");
57 MODULE_LICENSE("GPL");
58