xref: /linux/drivers/clk/mediatek/clk-mt8186-imp_iic_wrap.c (revision b4db9f840283caca0d904436f187ef56a9126eaa)
1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // Copyright (c) 2022 MediaTek Inc.
4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
5 
6 #include <linux/clk-provider.h>
7 #include <linux/platform_device.h>
8 #include <dt-bindings/clock/mt8186-clk.h>
9 
10 #include "clk-gate.h"
11 #include "clk-mtk.h"
12 
13 static const struct mtk_gate_regs imp_iic_wrap_cg_regs = {
14 	.set_ofs = 0xe08,
15 	.clr_ofs = 0xe04,
16 	.sta_ofs = 0xe00,
17 };
18 
19 #define GATE_IMP_IIC_WRAP(_id, _name, _parent, _shift)			\
20 	GATE_MTK(_id, _name, _parent, &imp_iic_wrap_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
21 
22 static const struct mtk_gate imp_iic_wrap_clks[] = {
23 	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C0,
24 		"imp_iic_wrap_ap_clock_i2c0", "infra_ao_i2c_ap", 0),
25 	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C1,
26 		"imp_iic_wrap_ap_clock_i2c1", "infra_ao_i2c_ap", 1),
27 	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C2,
28 		"imp_iic_wrap_ap_clock_i2c2", "infra_ao_i2c_ap", 2),
29 	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C3,
30 		"imp_iic_wrap_ap_clock_i2c3", "infra_ao_i2c_ap", 3),
31 	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C4,
32 		"imp_iic_wrap_ap_clock_i2c4", "infra_ao_i2c_ap", 4),
33 	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C5,
34 		"imp_iic_wrap_ap_clock_i2c5", "infra_ao_i2c_ap", 5),
35 	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C6,
36 		"imp_iic_wrap_ap_clock_i2c6", "infra_ao_i2c_ap", 6),
37 	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C7,
38 		"imp_iic_wrap_ap_clock_i2c7", "infra_ao_i2c_ap", 7),
39 	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C8,
40 		"imp_iic_wrap_ap_clock_i2c8", "infra_ao_i2c_ap", 8),
41 	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_AP_CLOCK_I2C9,
42 		"imp_iic_wrap_ap_clock_i2c9", "infra_ao_i2c_ap", 9),
43 };
44 
45 static const struct mtk_clk_desc imp_iic_wrap_desc = {
46 	.clks = imp_iic_wrap_clks,
47 	.num_clks = ARRAY_SIZE(imp_iic_wrap_clks),
48 };
49 
50 static const struct of_device_id of_match_clk_mt8186_imp_iic_wrap[] = {
51 	{
52 		.compatible = "mediatek,mt8186-imp_iic_wrap",
53 		.data = &imp_iic_wrap_desc,
54 	}, {
55 		/* sentinel */
56 	}
57 };
58 MODULE_DEVICE_TABLE(of, of_match_clk_mt8186_imp_iic_wrap);
59 
60 static struct platform_driver clk_mt8186_imp_iic_wrap_drv = {
61 	.probe = mtk_clk_simple_probe,
62 	.remove_new = mtk_clk_simple_remove,
63 	.driver = {
64 		.name = "clk-mt8186-imp_iic_wrap",
65 		.of_match_table = of_match_clk_mt8186_imp_iic_wrap,
66 	},
67 };
68 module_platform_driver(clk_mt8186_imp_iic_wrap_drv);
69 MODULE_LICENSE("GPL");
70