xref: /linux/drivers/clk/mediatek/clk-mt8183-vdec.c (revision 4ae68b26c3ab5a82aa271e6e9fc9b1a06e1d6b40)
1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Copyright (c) 2018 MediaTek Inc.
4 // Author: Weiyi Lu <weiyi.lu@mediatek.com>
5 
6 #include <linux/clk-provider.h>
7 #include <linux/platform_device.h>
8 
9 #include "clk-mtk.h"
10 #include "clk-gate.h"
11 
12 #include <dt-bindings/clock/mt8183-clk.h>
13 
14 static const struct mtk_gate_regs vdec0_cg_regs = {
15 	.set_ofs = 0x0,
16 	.clr_ofs = 0x4,
17 	.sta_ofs = 0x0,
18 };
19 
20 static const struct mtk_gate_regs vdec1_cg_regs = {
21 	.set_ofs = 0x8,
22 	.clr_ofs = 0xc,
23 	.sta_ofs = 0x8,
24 };
25 
26 #define GATE_VDEC0_I(_id, _name, _parent, _shift)		\
27 	GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift,	\
28 		&mtk_clk_gate_ops_setclr_inv)
29 
30 #define GATE_VDEC1_I(_id, _name, _parent, _shift)		\
31 	GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift,	\
32 		&mtk_clk_gate_ops_setclr_inv)
33 
34 static const struct mtk_gate vdec_clks[] = {
35 	/* VDEC0 */
36 	GATE_VDEC0_I(CLK_VDEC_VDEC, "vdec_vdec", "mm_sel", 0),
37 	/* VDEC1 */
38 	GATE_VDEC1_I(CLK_VDEC_LARB1, "vdec_larb1", "mm_sel", 0),
39 };
40 
41 static const struct mtk_clk_desc vdec_desc = {
42 	.clks = vdec_clks,
43 	.num_clks = ARRAY_SIZE(vdec_clks),
44 };
45 
46 static const struct of_device_id of_match_clk_mt8183_vdec[] = {
47 	{
48 		.compatible = "mediatek,mt8183-vdecsys",
49 		.data = &vdec_desc,
50 	}, {
51 		/* sentinel */
52 	}
53 };
54 MODULE_DEVICE_TABLE(of, of_match_clk_mt8183_vdec);
55 
56 static struct platform_driver clk_mt8183_vdec_drv = {
57 	.probe = mtk_clk_simple_probe,
58 	.remove_new = mtk_clk_simple_remove,
59 	.driver = {
60 		.name = "clk-mt8183-vdec",
61 		.of_match_table = of_match_clk_mt8183_vdec,
62 	},
63 };
64 module_platform_driver(clk_mt8183_vdec_drv);
65 MODULE_LICENSE("GPL");
66