1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2017 MediaTek Inc. 4 * Author: Kevin-CW Chen <kevin-cw.chen@mediatek.com> 5 */ 6 7 #include <linux/clk-provider.h> 8 #include <linux/platform_device.h> 9 10 #include "clk-mtk.h" 11 #include "clk-gate.h" 12 13 #include <dt-bindings/clock/mt6797-clk.h> 14 15 static const struct mtk_gate_regs vdec0_cg_regs = { 16 .set_ofs = 0x0000, 17 .clr_ofs = 0x0004, 18 .sta_ofs = 0x0000, 19 }; 20 21 static const struct mtk_gate_regs vdec1_cg_regs = { 22 .set_ofs = 0x0008, 23 .clr_ofs = 0x000c, 24 .sta_ofs = 0x0008, 25 }; 26 27 #define GATE_VDEC0(_id, _name, _parent, _shift) { \ 28 .id = _id, \ 29 .name = _name, \ 30 .parent_name = _parent, \ 31 .regs = &vdec0_cg_regs, \ 32 .shift = _shift, \ 33 .ops = &mtk_clk_gate_ops_setclr_inv, \ 34 } 35 36 #define GATE_VDEC1(_id, _name, _parent, _shift) { \ 37 .id = _id, \ 38 .name = _name, \ 39 .parent_name = _parent, \ 40 .regs = &vdec1_cg_regs, \ 41 .shift = _shift, \ 42 .ops = &mtk_clk_gate_ops_setclr_inv, \ 43 } 44 45 static const struct mtk_gate vdec_clks[] = { 46 GATE_VDEC0(CLK_VDEC_CKEN_ENG, "vdec_cken_eng", "vdec_sel", 8), 47 GATE_VDEC0(CLK_VDEC_ACTIVE, "vdec_active", "vdec_sel", 4), 48 GATE_VDEC0(CLK_VDEC_CKEN, "vdec_cken", "vdec_sel", 0), 49 GATE_VDEC1(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "mm_sel", 0), 50 }; 51 52 static const struct mtk_clk_desc vdec_desc = { 53 .clks = vdec_clks, 54 .num_clks = ARRAY_SIZE(vdec_clks), 55 }; 56 57 static const struct of_device_id of_match_clk_mt6797_vdec[] = { 58 { 59 .compatible = "mediatek,mt6797-vdecsys", 60 .data = &vdec_desc, 61 }, { 62 /* sentinel */ 63 } 64 }; 65 66 static struct platform_driver clk_mt6797_vdec_drv = { 67 .probe = mtk_clk_simple_probe, 68 .remove = mtk_clk_simple_remove, 69 .driver = { 70 .name = "clk-mt6797-vdec", 71 .of_match_table = of_match_clk_mt6797_vdec, 72 }, 73 }; 74 75 builtin_platform_driver(clk_mt6797_vdec_drv); 76