xref: /linux/drivers/clk/mediatek/clk-mt6779-ipe.c (revision a4eb44a6435d6d8f9e642407a4a06f65eb90ca04)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2019 MediaTek Inc.
4  * Author: Wendell Lin <wendell.lin@mediatek.com>
5  */
6 
7 #include <linux/module.h>
8 #include <linux/clk-provider.h>
9 #include <linux/platform_device.h>
10 #include <dt-bindings/clock/mt6779-clk.h>
11 
12 #include "clk-mtk.h"
13 #include "clk-gate.h"
14 
15 static const struct mtk_gate_regs ipe_cg_regs = {
16 	.set_ofs = 0x0004,
17 	.clr_ofs = 0x0008,
18 	.sta_ofs = 0x0000,
19 };
20 
21 #define GATE_IPE(_id, _name, _parent, _shift)			\
22 	GATE_MTK(_id, _name, _parent, &ipe_cg_regs, _shift,	\
23 		&mtk_clk_gate_ops_setclr)
24 
25 static const struct mtk_gate ipe_clks[] = {
26 	GATE_IPE(CLK_IPE_LARB7, "ipe_larb7", "ipe_sel", 0),
27 	GATE_IPE(CLK_IPE_LARB8, "ipe_larb8", "ipe_sel", 1),
28 	GATE_IPE(CLK_IPE_SMI_SUBCOM, "ipe_smi_subcom", "ipe_sel", 2),
29 	GATE_IPE(CLK_IPE_FD, "ipe_fd", "ipe_sel", 3),
30 	GATE_IPE(CLK_IPE_FE, "ipe_fe", "ipe_sel", 4),
31 	GATE_IPE(CLK_IPE_RSC, "ipe_rsc", "ipe_sel", 5),
32 	GATE_IPE(CLK_IPE_DPE, "ipe_dpe", "ipe_sel", 6),
33 };
34 
35 static const struct of_device_id of_match_clk_mt6779_ipe[] = {
36 	{ .compatible = "mediatek,mt6779-ipesys", },
37 	{}
38 };
39 
40 static int clk_mt6779_ipe_probe(struct platform_device *pdev)
41 {
42 	struct clk_onecell_data *clk_data;
43 	struct device_node *node = pdev->dev.of_node;
44 
45 	clk_data = mtk_alloc_clk_data(CLK_IPE_NR_CLK);
46 
47 	mtk_clk_register_gates(node, ipe_clks, ARRAY_SIZE(ipe_clks),
48 			       clk_data);
49 
50 	return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
51 }
52 
53 static struct platform_driver clk_mt6779_ipe_drv = {
54 	.probe = clk_mt6779_ipe_probe,
55 	.driver = {
56 		.name = "clk-mt6779-ipe",
57 		.of_match_table = of_match_clk_mt6779_ipe,
58 	},
59 };
60 
61 module_platform_driver(clk_mt6779_ipe_drv);
62 MODULE_LICENSE("GPL");
63