xref: /linux/drivers/clk/mediatek/clk-mt2712-vdec.c (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2017 MediaTek Inc.
4  * Author: Weiyi Lu <weiyi.lu@mediatek.com>
5  */
6 
7 #include <linux/clk-provider.h>
8 #include <linux/platform_device.h>
9 
10 #include "clk-mtk.h"
11 #include "clk-gate.h"
12 
13 #include <dt-bindings/clock/mt2712-clk.h>
14 
15 static const struct mtk_gate_regs vdec0_cg_regs = {
16 	.set_ofs = 0x0,
17 	.clr_ofs = 0x4,
18 	.sta_ofs = 0x0,
19 };
20 
21 static const struct mtk_gate_regs vdec1_cg_regs = {
22 	.set_ofs = 0x8,
23 	.clr_ofs = 0xc,
24 	.sta_ofs = 0x8,
25 };
26 
27 #define GATE_VDEC0(_id, _name, _parent, _shift)				\
28 	GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
29 
30 #define GATE_VDEC1(_id, _name, _parent, _shift)				\
31 	GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv)
32 
33 static const struct mtk_gate vdec_clks[] = {
34 	/* VDEC0 */
35 	GATE_VDEC0(CLK_VDEC_CKEN, "vdec_cken", "vdec_sel", 0),
36 	/* VDEC1 */
37 	GATE_VDEC1(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "vdec_sel", 0),
38 	GATE_VDEC1(CLK_VDEC_IMGRZ_CKEN, "vdec_imgrz_cken", "vdec_sel", 1),
39 };
40 
41 static const struct mtk_clk_desc vdec_desc = {
42 	.clks = vdec_clks,
43 	.num_clks = ARRAY_SIZE(vdec_clks),
44 };
45 
46 static const struct of_device_id of_match_clk_mt2712_vdec[] = {
47 	{
48 		.compatible = "mediatek,mt2712-vdecsys",
49 		.data = &vdec_desc,
50 	}, {
51 		/* sentinel */
52 	}
53 };
54 MODULE_DEVICE_TABLE(of, of_match_clk_mt2712_vdec);
55 
56 static struct platform_driver clk_mt2712_vdec_drv = {
57 	.probe = mtk_clk_simple_probe,
58 	.remove = mtk_clk_simple_remove,
59 	.driver = {
60 		.name = "clk-mt2712-vdec",
61 		.of_match_table = of_match_clk_mt2712_vdec,
62 	},
63 };
64 module_platform_driver(clk_mt2712_vdec_drv);
65 
66 MODULE_DESCRIPTION("MediaTek MT2712 Video Decoders clocks driver");
67 MODULE_LICENSE("GPL");
68