1 /* 2 * Copyright (c) 2017 MediaTek Inc. 3 * Author: Weiyi Lu <weiyi.lu@mediatek.com> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15 #include <linux/clk-provider.h> 16 #include <linux/platform_device.h> 17 18 #include "clk-mtk.h" 19 #include "clk-gate.h" 20 21 #include <dt-bindings/clock/mt2712-clk.h> 22 23 static const struct mtk_gate_regs mfg_cg_regs = { 24 .set_ofs = 0x4, 25 .clr_ofs = 0x8, 26 .sta_ofs = 0x0, 27 }; 28 29 #define GATE_MFG(_id, _name, _parent, _shift) { \ 30 .id = _id, \ 31 .name = _name, \ 32 .parent_name = _parent, \ 33 .regs = &mfg_cg_regs, \ 34 .shift = _shift, \ 35 .ops = &mtk_clk_gate_ops_setclr, \ 36 } 37 38 static const struct mtk_gate mfg_clks[] = { 39 GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 0), 40 }; 41 42 static int clk_mt2712_mfg_probe(struct platform_device *pdev) 43 { 44 struct clk_onecell_data *clk_data; 45 int r; 46 struct device_node *node = pdev->dev.of_node; 47 48 clk_data = mtk_alloc_clk_data(CLK_MFG_NR_CLK); 49 50 mtk_clk_register_gates(node, mfg_clks, ARRAY_SIZE(mfg_clks), 51 clk_data); 52 53 r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); 54 55 if (r != 0) 56 pr_err("%s(): could not register clock provider: %d\n", 57 __func__, r); 58 59 return r; 60 } 61 62 static const struct of_device_id of_match_clk_mt2712_mfg[] = { 63 { .compatible = "mediatek,mt2712-mfgcfg", }, 64 {} 65 }; 66 67 static struct platform_driver clk_mt2712_mfg_drv = { 68 .probe = clk_mt2712_mfg_probe, 69 .driver = { 70 .name = "clk-mt2712-mfg", 71 .of_match_table = of_match_clk_mt2712_mfg, 72 }, 73 }; 74 75 builtin_platform_driver(clk_mt2712_mfg_drv); 76