xref: /linux/drivers/clk/mediatek/clk-mt2712-jpgdec.c (revision 0d3b051adbb72ed81956447d0d1e54d5943ee6f5)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2017 MediaTek Inc.
4  * Author: Weiyi Lu <weiyi.lu@mediatek.com>
5  */
6 
7 #include <linux/clk-provider.h>
8 #include <linux/platform_device.h>
9 
10 #include "clk-mtk.h"
11 #include "clk-gate.h"
12 
13 #include <dt-bindings/clock/mt2712-clk.h>
14 
15 static const struct mtk_gate_regs jpgdec_cg_regs = {
16 	.set_ofs = 0x4,
17 	.clr_ofs = 0x8,
18 	.sta_ofs = 0x0,
19 };
20 
21 #define GATE_JPGDEC(_id, _name, _parent, _shift) {	\
22 		.id = _id,				\
23 		.name = _name,				\
24 		.parent_name = _parent,			\
25 		.regs = &jpgdec_cg_regs,			\
26 		.shift = _shift,			\
27 		.ops = &mtk_clk_gate_ops_setclr_inv,	\
28 	}
29 
30 static const struct mtk_gate jpgdec_clks[] = {
31 	GATE_JPGDEC(CLK_JPGDEC_JPGDEC1, "jpgdec_jpgdec1", "jpgdec_sel", 0),
32 	GATE_JPGDEC(CLK_JPGDEC_JPGDEC, "jpgdec_jpgdec", "jpgdec_sel", 4),
33 };
34 
35 static int clk_mt2712_jpgdec_probe(struct platform_device *pdev)
36 {
37 	struct clk_onecell_data *clk_data;
38 	int r;
39 	struct device_node *node = pdev->dev.of_node;
40 
41 	clk_data = mtk_alloc_clk_data(CLK_JPGDEC_NR_CLK);
42 
43 	mtk_clk_register_gates(node, jpgdec_clks, ARRAY_SIZE(jpgdec_clks),
44 			clk_data);
45 
46 	r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
47 
48 	if (r != 0)
49 		pr_err("%s(): could not register clock provider: %d\n",
50 			__func__, r);
51 
52 	return r;
53 }
54 
55 static const struct of_device_id of_match_clk_mt2712_jpgdec[] = {
56 	{ .compatible = "mediatek,mt2712-jpgdecsys", },
57 	{}
58 };
59 
60 static struct platform_driver clk_mt2712_jpgdec_drv = {
61 	.probe = clk_mt2712_jpgdec_probe,
62 	.driver = {
63 		.name = "clk-mt2712-jpgdec",
64 		.of_match_table = of_match_clk_mt2712_jpgdec,
65 	},
66 };
67 
68 builtin_platform_driver(clk_mt2712_jpgdec_drv);
69