xref: /linux/drivers/clk/mediatek/clk-mt2712-img.c (revision be709d48329a500621d2a05835283150ae137b45)
1 /*
2  * Copyright (c) 2017 MediaTek Inc.
3  * Author: Weiyi Lu <weiyi.lu@mediatek.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  */
14 
15 #include <linux/clk-provider.h>
16 #include <linux/platform_device.h>
17 
18 #include "clk-mtk.h"
19 #include "clk-gate.h"
20 
21 #include <dt-bindings/clock/mt2712-clk.h>
22 
23 static const struct mtk_gate_regs img_cg_regs = {
24 	.set_ofs = 0x0,
25 	.clr_ofs = 0x0,
26 	.sta_ofs = 0x0,
27 };
28 
29 #define GATE_IMG(_id, _name, _parent, _shift) {	\
30 		.id = _id,				\
31 		.name = _name,				\
32 		.parent_name = _parent,			\
33 		.regs = &img_cg_regs,			\
34 		.shift = _shift,			\
35 		.ops = &mtk_clk_gate_ops_no_setclr,	\
36 	}
37 
38 static const struct mtk_gate img_clks[] = {
39 	GATE_IMG(CLK_IMG_SMI_LARB2, "img_smi_larb2", "mm_sel", 0),
40 	GATE_IMG(CLK_IMG_SENINF_SCAM_EN, "img_scam_en", "csi0", 3),
41 	GATE_IMG(CLK_IMG_SENINF_CAM_EN, "img_cam_en", "mm_sel", 8),
42 	GATE_IMG(CLK_IMG_CAM_SV_EN, "img_cam_sv_en", "mm_sel", 9),
43 	GATE_IMG(CLK_IMG_CAM_SV1_EN, "img_cam_sv1_en", "mm_sel", 10),
44 	GATE_IMG(CLK_IMG_CAM_SV2_EN, "img_cam_sv2_en", "mm_sel", 11),
45 };
46 
47 static int clk_mt2712_img_probe(struct platform_device *pdev)
48 {
49 	struct clk_onecell_data *clk_data;
50 	int r;
51 	struct device_node *node = pdev->dev.of_node;
52 
53 	clk_data = mtk_alloc_clk_data(CLK_IMG_NR_CLK);
54 
55 	mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks),
56 			clk_data);
57 
58 	r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
59 
60 	if (r != 0)
61 		pr_err("%s(): could not register clock provider: %d\n",
62 			__func__, r);
63 
64 	return r;
65 }
66 
67 static const struct of_device_id of_match_clk_mt2712_img[] = {
68 	{ .compatible = "mediatek,mt2712-imgsys", },
69 	{}
70 };
71 
72 static struct platform_driver clk_mt2712_img_drv = {
73 	.probe = clk_mt2712_img_probe,
74 	.driver = {
75 		.name = "clk-mt2712-img",
76 		.of_match_table = of_match_clk_mt2712_img,
77 	},
78 };
79 
80 builtin_platform_driver(clk_mt2712_img_drv);
81