1 #ifndef __MACH_IMX_CLK_H 2 #define __MACH_IMX_CLK_H 3 4 #include <linux/spinlock.h> 5 #include <linux/clk-provider.h> 6 7 extern spinlock_t imx_ccm_lock; 8 9 void imx_check_clocks(struct clk *clks[], unsigned int count); 10 11 extern void imx_cscmr1_fixup(u32 *val); 12 13 enum imx_pllv1_type { 14 IMX_PLLV1_IMX1, 15 IMX_PLLV1_IMX21, 16 IMX_PLLV1_IMX25, 17 IMX_PLLV1_IMX27, 18 IMX_PLLV1_IMX31, 19 IMX_PLLV1_IMX35, 20 }; 21 22 struct clk *imx_clk_pllv1(enum imx_pllv1_type type, const char *name, 23 const char *parent, void __iomem *base); 24 25 struct clk *imx_clk_pllv2(const char *name, const char *parent, 26 void __iomem *base); 27 28 enum imx_pllv3_type { 29 IMX_PLLV3_GENERIC, 30 IMX_PLLV3_SYS, 31 IMX_PLLV3_USB, 32 IMX_PLLV3_USB_VF610, 33 IMX_PLLV3_AV, 34 IMX_PLLV3_ENET, 35 IMX_PLLV3_ENET_IMX7, 36 }; 37 38 struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, 39 const char *parent_name, void __iomem *base, u32 div_mask); 40 41 struct clk *clk_register_gate2(struct device *dev, const char *name, 42 const char *parent_name, unsigned long flags, 43 void __iomem *reg, u8 bit_idx, 44 u8 clk_gate_flags, spinlock_t *lock, 45 unsigned int *share_count); 46 47 struct clk * imx_obtain_fixed_clock( 48 const char *name, unsigned long rate); 49 50 struct clk *imx_clk_gate_exclusive(const char *name, const char *parent, 51 void __iomem *reg, u8 shift, u32 exclusive_mask); 52 53 static inline struct clk *imx_clk_gate2(const char *name, const char *parent, 54 void __iomem *reg, u8 shift) 55 { 56 return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, 57 shift, 0, &imx_ccm_lock, NULL); 58 } 59 60 static inline struct clk *imx_clk_gate2_shared(const char *name, 61 const char *parent, void __iomem *reg, u8 shift, 62 unsigned int *share_count) 63 { 64 return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, 65 shift, 0, &imx_ccm_lock, share_count); 66 } 67 68 struct clk *imx_clk_pfd(const char *name, const char *parent_name, 69 void __iomem *reg, u8 idx); 70 71 struct clk *imx_clk_busy_divider(const char *name, const char *parent_name, 72 void __iomem *reg, u8 shift, u8 width, 73 void __iomem *busy_reg, u8 busy_shift); 74 75 struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, 76 u8 width, void __iomem *busy_reg, u8 busy_shift, 77 const char **parent_names, int num_parents); 78 79 struct clk *imx_clk_fixup_divider(const char *name, const char *parent, 80 void __iomem *reg, u8 shift, u8 width, 81 void (*fixup)(u32 *val)); 82 83 struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg, 84 u8 shift, u8 width, const char **parents, 85 int num_parents, void (*fixup)(u32 *val)); 86 87 static inline struct clk *imx_clk_fixed(const char *name, int rate) 88 { 89 return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate); 90 } 91 92 static inline struct clk *imx_clk_divider(const char *name, const char *parent, 93 void __iomem *reg, u8 shift, u8 width) 94 { 95 return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT, 96 reg, shift, width, 0, &imx_ccm_lock); 97 } 98 99 static inline struct clk *imx_clk_divider_flags(const char *name, 100 const char *parent, void __iomem *reg, u8 shift, u8 width, 101 unsigned long flags) 102 { 103 return clk_register_divider(NULL, name, parent, flags, 104 reg, shift, width, 0, &imx_ccm_lock); 105 } 106 107 static inline struct clk *imx_clk_gate(const char *name, const char *parent, 108 void __iomem *reg, u8 shift) 109 { 110 return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, 111 shift, 0, &imx_ccm_lock); 112 } 113 114 static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent, 115 void __iomem *reg, u8 shift) 116 { 117 return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, 118 shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock); 119 } 120 121 static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg, 122 u8 shift, u8 width, const char **parents, int num_parents) 123 { 124 return clk_register_mux(NULL, name, parents, num_parents, 125 CLK_SET_RATE_NO_REPARENT, reg, shift, 126 width, 0, &imx_ccm_lock); 127 } 128 129 static inline struct clk *imx_clk_mux_flags(const char *name, 130 void __iomem *reg, u8 shift, u8 width, const char **parents, 131 int num_parents, unsigned long flags) 132 { 133 return clk_register_mux(NULL, name, parents, num_parents, 134 flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0, 135 &imx_ccm_lock); 136 } 137 138 static inline struct clk *imx_clk_fixed_factor(const char *name, 139 const char *parent, unsigned int mult, unsigned int div) 140 { 141 return clk_register_fixed_factor(NULL, name, parent, 142 CLK_SET_RATE_PARENT, mult, div); 143 } 144 145 struct clk *imx_clk_cpu(const char *name, const char *parent_name, 146 struct clk *div, struct clk *mux, struct clk *pll, 147 struct clk *step); 148 149 #endif 150