1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2018-2021 NXP 4 * Dong Aisheng <aisheng.dong@nxp.com> 5 */ 6 7 #ifndef __IMX_CLK_SCU_H 8 #define __IMX_CLK_SCU_H 9 10 #include <linux/firmware/imx/sci.h> 11 #include <linux/of.h> 12 13 #define IMX_SCU_GPR_CLK_GATE BIT(0) 14 #define IMX_SCU_GPR_CLK_DIV BIT(1) 15 #define IMX_SCU_GPR_CLK_MUX BIT(2) 16 17 struct imx_clk_scu_rsrc_table { 18 const u32 *rsrc; 19 u8 num; 20 }; 21 22 extern struct list_head imx_scu_clks[]; 23 extern const struct dev_pm_ops imx_clk_lpcg_scu_pm_ops; 24 extern const struct imx_clk_scu_rsrc_table imx_clk_scu_rsrc_imx8qxp; 25 26 int imx_clk_scu_init(struct device_node *np, 27 const struct imx_clk_scu_rsrc_table *data); 28 struct clk_hw *imx_scu_of_clk_src_get(struct of_phandle_args *clkspec, 29 void *data); 30 struct clk_hw *imx_clk_scu_alloc_dev(const char *name, 31 const char * const *parents, 32 int num_parents, u32 rsrc_id, u8 clk_type); 33 34 struct clk_hw *__imx_clk_scu(struct device *dev, const char *name, 35 const char * const *parents, int num_parents, 36 u32 rsrc_id, u8 clk_type); 37 38 void imx_clk_scu_unregister(void); 39 40 struct clk_hw *__imx_clk_lpcg_scu(struct device *dev, const char *name, 41 const char *parent_name, unsigned long flags, 42 void __iomem *reg, u8 bit_idx, bool hw_gate); 43 void imx_clk_lpcg_scu_unregister(struct clk_hw *hw); 44 45 struct clk_hw *__imx_clk_gpr_scu(const char *name, const char * const *parent_name, 46 int num_parents, u32 rsrc_id, u8 gpr_id, u8 flags, 47 bool invert); 48 49 static inline struct clk_hw *imx_clk_scu(const char *name, u32 rsrc_id, 50 u8 clk_type) 51 { 52 return imx_clk_scu_alloc_dev(name, NULL, 0, rsrc_id, clk_type); 53 } 54 55 static inline struct clk_hw *imx_clk_scu2(const char *name, const char * const *parents, 56 int num_parents, u32 rsrc_id, u8 clk_type) 57 { 58 return imx_clk_scu_alloc_dev(name, parents, num_parents, rsrc_id, clk_type); 59 } 60 61 static inline struct clk_hw *imx_clk_lpcg_scu_dev(struct device *dev, const char *name, 62 const char *parent_name, unsigned long flags, 63 void __iomem *reg, u8 bit_idx, bool hw_gate) 64 { 65 return __imx_clk_lpcg_scu(dev, name, parent_name, flags, reg, 66 bit_idx, hw_gate); 67 } 68 69 static inline struct clk_hw *imx_clk_lpcg_scu(const char *name, const char *parent_name, 70 unsigned long flags, void __iomem *reg, 71 u8 bit_idx, bool hw_gate) 72 { 73 return __imx_clk_lpcg_scu(NULL, name, parent_name, flags, reg, 74 bit_idx, hw_gate); 75 } 76 77 static inline struct clk_hw *imx_clk_gate_gpr_scu(const char *name, const char *parent_name, 78 u32 rsrc_id, u8 gpr_id, bool invert) 79 { 80 return __imx_clk_gpr_scu(name, &parent_name, 1, rsrc_id, gpr_id, 81 IMX_SCU_GPR_CLK_GATE, invert); 82 } 83 84 static inline struct clk_hw *imx_clk_divider_gpr_scu(const char *name, const char *parent_name, 85 u32 rsrc_id, u8 gpr_id) 86 { 87 return __imx_clk_gpr_scu(name, &parent_name, 1, rsrc_id, gpr_id, 88 IMX_SCU_GPR_CLK_DIV, 0); 89 } 90 91 static inline struct clk_hw *imx_clk_mux_gpr_scu(const char *name, const char * const *parent_names, 92 int num_parents, u32 rsrc_id, u8 gpr_id) 93 { 94 return __imx_clk_gpr_scu(name, parent_names, num_parents, rsrc_id, 95 gpr_id, IMX_SCU_GPR_CLK_MUX, 0); 96 } 97 #endif 98