16c9da387SJiancheng Xueconfig COMMON_CLK_HI3519 26c9da387SJiancheng Xue tristate "Hi3519 Clock Driver" 36c9da387SJiancheng Xue depends on ARCH_HISI || COMPILE_TEST 46c9da387SJiancheng Xue select RESET_HISI 56c9da387SJiancheng Xue default ARCH_HISI 66c9da387SJiancheng Xue help 76c9da387SJiancheng Xue Build the clock driver for hi3519. 86c9da387SJiancheng Xue 9*707d33cbSJiancheng Xueconfig COMMON_CLK_HI3798CV200 10*707d33cbSJiancheng Xue tristate "Hi3798CV200 Clock Driver" 11*707d33cbSJiancheng Xue depends on ARCH_HISI || COMPILE_TEST 12*707d33cbSJiancheng Xue select RESET_HISI 13*707d33cbSJiancheng Xue default ARCH_HISI 14*707d33cbSJiancheng Xue help 15*707d33cbSJiancheng Xue Build the clock driver for hi3798cv200. 16*707d33cbSJiancheng Xue 1772ea4861SBintian Wangconfig COMMON_CLK_HI6220 1872ea4861SBintian Wang bool "Hi6220 Clock Driver" 199f42a89dSLeo Yan depends on ARCH_HISI || COMPILE_TEST 2072ea4861SBintian Wang default ARCH_HISI 2172ea4861SBintian Wang help 2272ea4861SBintian Wang Build the Hisilicon Hi6220 clock driver based on the common clock framework. 239f42a89dSLeo Yan 2425824d52SJiancheng Xueconfig RESET_HISI 2525824d52SJiancheng Xue bool "HiSilicon Reset Controller Driver" 2625824d52SJiancheng Xue depends on ARCH_HISI || COMPILE_TEST 2725824d52SJiancheng Xue select RESET_CONTROLLER 2825824d52SJiancheng Xue help 2925824d52SJiancheng Xue Build reset controller driver for HiSilicon device chipsets. 3025824d52SJiancheng Xue 319f42a89dSLeo Yanconfig STUB_CLK_HI6220 329f42a89dSLeo Yan bool "Hi6220 Stub Clock Driver" 339f42a89dSLeo Yan depends on COMMON_CLK_HI6220 && MAILBOX 349f42a89dSLeo Yan help 359f42a89dSLeo Yan Build the Hisilicon Hi6220 stub clock driver. 36