1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> 4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> 5 * 6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst 7 */ 8 9 #include <linux/clk.h> 10 #include <linux/clk-provider.h> 11 #include <linux/clk/clk-conf.h> 12 #include <linux/module.h> 13 #include <linux/mutex.h> 14 #include <linux/spinlock.h> 15 #include <linux/err.h> 16 #include <linux/list.h> 17 #include <linux/slab.h> 18 #include <linux/of.h> 19 #include <linux/device.h> 20 #include <linux/init.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/sched.h> 23 #include <linux/clkdev.h> 24 25 #include "clk.h" 26 27 static DEFINE_SPINLOCK(enable_lock); 28 static DEFINE_MUTEX(prepare_lock); 29 30 static struct task_struct *prepare_owner; 31 static struct task_struct *enable_owner; 32 33 static int prepare_refcnt; 34 static int enable_refcnt; 35 36 static HLIST_HEAD(clk_root_list); 37 static HLIST_HEAD(clk_orphan_list); 38 static LIST_HEAD(clk_notifier_list); 39 40 static const struct hlist_head *all_lists[] = { 41 &clk_root_list, 42 &clk_orphan_list, 43 NULL, 44 }; 45 46 /*** private data structures ***/ 47 48 struct clk_parent_map { 49 const struct clk_hw *hw; 50 struct clk_core *core; 51 const char *fw_name; 52 const char *name; 53 int index; 54 }; 55 56 struct clk_core { 57 const char *name; 58 const struct clk_ops *ops; 59 struct clk_hw *hw; 60 struct module *owner; 61 struct device *dev; 62 struct device_node *of_node; 63 struct clk_core *parent; 64 struct clk_parent_map *parents; 65 u8 num_parents; 66 u8 new_parent_index; 67 unsigned long rate; 68 unsigned long req_rate; 69 unsigned long new_rate; 70 struct clk_core *new_parent; 71 struct clk_core *new_child; 72 unsigned long flags; 73 bool orphan; 74 bool rpm_enabled; 75 unsigned int enable_count; 76 unsigned int prepare_count; 77 unsigned int protect_count; 78 unsigned long min_rate; 79 unsigned long max_rate; 80 unsigned long accuracy; 81 int phase; 82 struct clk_duty duty; 83 struct hlist_head children; 84 struct hlist_node child_node; 85 struct hlist_head clks; 86 unsigned int notifier_count; 87 #ifdef CONFIG_DEBUG_FS 88 struct dentry *dentry; 89 struct hlist_node debug_node; 90 #endif 91 struct kref ref; 92 }; 93 94 #define CREATE_TRACE_POINTS 95 #include <trace/events/clk.h> 96 97 struct clk { 98 struct clk_core *core; 99 struct device *dev; 100 const char *dev_id; 101 const char *con_id; 102 unsigned long min_rate; 103 unsigned long max_rate; 104 unsigned int exclusive_count; 105 struct hlist_node clks_node; 106 }; 107 108 /*** runtime pm ***/ 109 static int clk_pm_runtime_get(struct clk_core *core) 110 { 111 if (!core->rpm_enabled) 112 return 0; 113 114 return pm_runtime_resume_and_get(core->dev); 115 } 116 117 static void clk_pm_runtime_put(struct clk_core *core) 118 { 119 if (!core->rpm_enabled) 120 return; 121 122 pm_runtime_put_sync(core->dev); 123 } 124 125 /*** locking ***/ 126 static void clk_prepare_lock(void) 127 { 128 if (!mutex_trylock(&prepare_lock)) { 129 if (prepare_owner == current) { 130 prepare_refcnt++; 131 return; 132 } 133 mutex_lock(&prepare_lock); 134 } 135 WARN_ON_ONCE(prepare_owner != NULL); 136 WARN_ON_ONCE(prepare_refcnt != 0); 137 prepare_owner = current; 138 prepare_refcnt = 1; 139 } 140 141 static void clk_prepare_unlock(void) 142 { 143 WARN_ON_ONCE(prepare_owner != current); 144 WARN_ON_ONCE(prepare_refcnt == 0); 145 146 if (--prepare_refcnt) 147 return; 148 prepare_owner = NULL; 149 mutex_unlock(&prepare_lock); 150 } 151 152 static unsigned long clk_enable_lock(void) 153 __acquires(enable_lock) 154 { 155 unsigned long flags; 156 157 /* 158 * On UP systems, spin_trylock_irqsave() always returns true, even if 159 * we already hold the lock. So, in that case, we rely only on 160 * reference counting. 161 */ 162 if (!IS_ENABLED(CONFIG_SMP) || 163 !spin_trylock_irqsave(&enable_lock, flags)) { 164 if (enable_owner == current) { 165 enable_refcnt++; 166 __acquire(enable_lock); 167 if (!IS_ENABLED(CONFIG_SMP)) 168 local_save_flags(flags); 169 return flags; 170 } 171 spin_lock_irqsave(&enable_lock, flags); 172 } 173 WARN_ON_ONCE(enable_owner != NULL); 174 WARN_ON_ONCE(enable_refcnt != 0); 175 enable_owner = current; 176 enable_refcnt = 1; 177 return flags; 178 } 179 180 static void clk_enable_unlock(unsigned long flags) 181 __releases(enable_lock) 182 { 183 WARN_ON_ONCE(enable_owner != current); 184 WARN_ON_ONCE(enable_refcnt == 0); 185 186 if (--enable_refcnt) { 187 __release(enable_lock); 188 return; 189 } 190 enable_owner = NULL; 191 spin_unlock_irqrestore(&enable_lock, flags); 192 } 193 194 static bool clk_core_rate_is_protected(struct clk_core *core) 195 { 196 return core->protect_count; 197 } 198 199 static bool clk_core_is_prepared(struct clk_core *core) 200 { 201 bool ret = false; 202 203 /* 204 * .is_prepared is optional for clocks that can prepare 205 * fall back to software usage counter if it is missing 206 */ 207 if (!core->ops->is_prepared) 208 return core->prepare_count; 209 210 if (!clk_pm_runtime_get(core)) { 211 ret = core->ops->is_prepared(core->hw); 212 clk_pm_runtime_put(core); 213 } 214 215 return ret; 216 } 217 218 static bool clk_core_is_enabled(struct clk_core *core) 219 { 220 bool ret = false; 221 222 /* 223 * .is_enabled is only mandatory for clocks that gate 224 * fall back to software usage counter if .is_enabled is missing 225 */ 226 if (!core->ops->is_enabled) 227 return core->enable_count; 228 229 /* 230 * Check if clock controller's device is runtime active before 231 * calling .is_enabled callback. If not, assume that clock is 232 * disabled, because we might be called from atomic context, from 233 * which pm_runtime_get() is not allowed. 234 * This function is called mainly from clk_disable_unused_subtree, 235 * which ensures proper runtime pm activation of controller before 236 * taking enable spinlock, but the below check is needed if one tries 237 * to call it from other places. 238 */ 239 if (core->rpm_enabled) { 240 pm_runtime_get_noresume(core->dev); 241 if (!pm_runtime_active(core->dev)) { 242 ret = false; 243 goto done; 244 } 245 } 246 247 ret = core->ops->is_enabled(core->hw); 248 done: 249 if (core->rpm_enabled) 250 pm_runtime_put(core->dev); 251 252 return ret; 253 } 254 255 /*** helper functions ***/ 256 257 const char *__clk_get_name(const struct clk *clk) 258 { 259 return !clk ? NULL : clk->core->name; 260 } 261 EXPORT_SYMBOL_GPL(__clk_get_name); 262 263 const char *clk_hw_get_name(const struct clk_hw *hw) 264 { 265 return hw->core->name; 266 } 267 EXPORT_SYMBOL_GPL(clk_hw_get_name); 268 269 struct clk_hw *__clk_get_hw(struct clk *clk) 270 { 271 return !clk ? NULL : clk->core->hw; 272 } 273 EXPORT_SYMBOL_GPL(__clk_get_hw); 274 275 unsigned int clk_hw_get_num_parents(const struct clk_hw *hw) 276 { 277 return hw->core->num_parents; 278 } 279 EXPORT_SYMBOL_GPL(clk_hw_get_num_parents); 280 281 struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw) 282 { 283 return hw->core->parent ? hw->core->parent->hw : NULL; 284 } 285 EXPORT_SYMBOL_GPL(clk_hw_get_parent); 286 287 static struct clk_core *__clk_lookup_subtree(const char *name, 288 struct clk_core *core) 289 { 290 struct clk_core *child; 291 struct clk_core *ret; 292 293 if (!strcmp(core->name, name)) 294 return core; 295 296 hlist_for_each_entry(child, &core->children, child_node) { 297 ret = __clk_lookup_subtree(name, child); 298 if (ret) 299 return ret; 300 } 301 302 return NULL; 303 } 304 305 static struct clk_core *clk_core_lookup(const char *name) 306 { 307 struct clk_core *root_clk; 308 struct clk_core *ret; 309 310 if (!name) 311 return NULL; 312 313 /* search the 'proper' clk tree first */ 314 hlist_for_each_entry(root_clk, &clk_root_list, child_node) { 315 ret = __clk_lookup_subtree(name, root_clk); 316 if (ret) 317 return ret; 318 } 319 320 /* if not found, then search the orphan tree */ 321 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) { 322 ret = __clk_lookup_subtree(name, root_clk); 323 if (ret) 324 return ret; 325 } 326 327 return NULL; 328 } 329 330 #ifdef CONFIG_OF 331 static int of_parse_clkspec(const struct device_node *np, int index, 332 const char *name, struct of_phandle_args *out_args); 333 static struct clk_hw * 334 of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec); 335 #else 336 static inline int of_parse_clkspec(const struct device_node *np, int index, 337 const char *name, 338 struct of_phandle_args *out_args) 339 { 340 return -ENOENT; 341 } 342 static inline struct clk_hw * 343 of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec) 344 { 345 return ERR_PTR(-ENOENT); 346 } 347 #endif 348 349 /** 350 * clk_core_get - Find the clk_core parent of a clk 351 * @core: clk to find parent of 352 * @p_index: parent index to search for 353 * 354 * This is the preferred method for clk providers to find the parent of a 355 * clk when that parent is external to the clk controller. The parent_names 356 * array is indexed and treated as a local name matching a string in the device 357 * node's 'clock-names' property or as the 'con_id' matching the device's 358 * dev_name() in a clk_lookup. This allows clk providers to use their own 359 * namespace instead of looking for a globally unique parent string. 360 * 361 * For example the following DT snippet would allow a clock registered by the 362 * clock-controller@c001 that has a clk_init_data::parent_data array 363 * with 'xtal' in the 'name' member to find the clock provided by the 364 * clock-controller@f00abcd without needing to get the globally unique name of 365 * the xtal clk. 366 * 367 * parent: clock-controller@f00abcd { 368 * reg = <0xf00abcd 0xabcd>; 369 * #clock-cells = <0>; 370 * }; 371 * 372 * clock-controller@c001 { 373 * reg = <0xc001 0xf00d>; 374 * clocks = <&parent>; 375 * clock-names = "xtal"; 376 * #clock-cells = <1>; 377 * }; 378 * 379 * Returns: -ENOENT when the provider can't be found or the clk doesn't 380 * exist in the provider or the name can't be found in the DT node or 381 * in a clkdev lookup. NULL when the provider knows about the clk but it 382 * isn't provided on this system. 383 * A valid clk_core pointer when the clk can be found in the provider. 384 */ 385 static struct clk_core *clk_core_get(struct clk_core *core, u8 p_index) 386 { 387 const char *name = core->parents[p_index].fw_name; 388 int index = core->parents[p_index].index; 389 struct clk_hw *hw = ERR_PTR(-ENOENT); 390 struct device *dev = core->dev; 391 const char *dev_id = dev ? dev_name(dev) : NULL; 392 struct device_node *np = core->of_node; 393 struct of_phandle_args clkspec; 394 395 if (np && (name || index >= 0) && 396 !of_parse_clkspec(np, index, name, &clkspec)) { 397 hw = of_clk_get_hw_from_clkspec(&clkspec); 398 of_node_put(clkspec.np); 399 } else if (name) { 400 /* 401 * If the DT search above couldn't find the provider fallback to 402 * looking up via clkdev based clk_lookups. 403 */ 404 hw = clk_find_hw(dev_id, name); 405 } 406 407 if (IS_ERR(hw)) 408 return ERR_CAST(hw); 409 410 return hw->core; 411 } 412 413 static void clk_core_fill_parent_index(struct clk_core *core, u8 index) 414 { 415 struct clk_parent_map *entry = &core->parents[index]; 416 struct clk_core *parent; 417 418 if (entry->hw) { 419 parent = entry->hw->core; 420 } else { 421 parent = clk_core_get(core, index); 422 if (PTR_ERR(parent) == -ENOENT && entry->name) 423 parent = clk_core_lookup(entry->name); 424 } 425 426 /* 427 * We have a direct reference but it isn't registered yet? 428 * Orphan it and let clk_reparent() update the orphan status 429 * when the parent is registered. 430 */ 431 if (!parent) 432 parent = ERR_PTR(-EPROBE_DEFER); 433 434 /* Only cache it if it's not an error */ 435 if (!IS_ERR(parent)) 436 entry->core = parent; 437 } 438 439 static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core, 440 u8 index) 441 { 442 if (!core || index >= core->num_parents || !core->parents) 443 return NULL; 444 445 if (!core->parents[index].core) 446 clk_core_fill_parent_index(core, index); 447 448 return core->parents[index].core; 449 } 450 451 struct clk_hw * 452 clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index) 453 { 454 struct clk_core *parent; 455 456 parent = clk_core_get_parent_by_index(hw->core, index); 457 458 return !parent ? NULL : parent->hw; 459 } 460 EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index); 461 462 unsigned int __clk_get_enable_count(struct clk *clk) 463 { 464 return !clk ? 0 : clk->core->enable_count; 465 } 466 467 static unsigned long clk_core_get_rate_nolock(struct clk_core *core) 468 { 469 if (!core) 470 return 0; 471 472 if (!core->num_parents || core->parent) 473 return core->rate; 474 475 /* 476 * Clk must have a parent because num_parents > 0 but the parent isn't 477 * known yet. Best to return 0 as the rate of this clk until we can 478 * properly recalc the rate based on the parent's rate. 479 */ 480 return 0; 481 } 482 483 unsigned long clk_hw_get_rate(const struct clk_hw *hw) 484 { 485 return clk_core_get_rate_nolock(hw->core); 486 } 487 EXPORT_SYMBOL_GPL(clk_hw_get_rate); 488 489 static unsigned long clk_core_get_accuracy_no_lock(struct clk_core *core) 490 { 491 if (!core) 492 return 0; 493 494 return core->accuracy; 495 } 496 497 unsigned long clk_hw_get_flags(const struct clk_hw *hw) 498 { 499 return hw->core->flags; 500 } 501 EXPORT_SYMBOL_GPL(clk_hw_get_flags); 502 503 bool clk_hw_is_prepared(const struct clk_hw *hw) 504 { 505 return clk_core_is_prepared(hw->core); 506 } 507 EXPORT_SYMBOL_GPL(clk_hw_is_prepared); 508 509 bool clk_hw_rate_is_protected(const struct clk_hw *hw) 510 { 511 return clk_core_rate_is_protected(hw->core); 512 } 513 EXPORT_SYMBOL_GPL(clk_hw_rate_is_protected); 514 515 bool clk_hw_is_enabled(const struct clk_hw *hw) 516 { 517 return clk_core_is_enabled(hw->core); 518 } 519 EXPORT_SYMBOL_GPL(clk_hw_is_enabled); 520 521 bool __clk_is_enabled(struct clk *clk) 522 { 523 if (!clk) 524 return false; 525 526 return clk_core_is_enabled(clk->core); 527 } 528 EXPORT_SYMBOL_GPL(__clk_is_enabled); 529 530 static bool mux_is_better_rate(unsigned long rate, unsigned long now, 531 unsigned long best, unsigned long flags) 532 { 533 if (flags & CLK_MUX_ROUND_CLOSEST) 534 return abs(now - rate) < abs(best - rate); 535 536 return now <= rate && now > best; 537 } 538 539 static void clk_core_init_rate_req(struct clk_core * const core, 540 struct clk_rate_request *req, 541 unsigned long rate); 542 543 static int clk_core_round_rate_nolock(struct clk_core *core, 544 struct clk_rate_request *req); 545 546 static bool clk_core_has_parent(struct clk_core *core, const struct clk_core *parent) 547 { 548 struct clk_core *tmp; 549 unsigned int i; 550 551 /* Optimize for the case where the parent is already the parent. */ 552 if (core->parent == parent) 553 return true; 554 555 for (i = 0; i < core->num_parents; i++) { 556 tmp = clk_core_get_parent_by_index(core, i); 557 if (!tmp) 558 continue; 559 560 if (tmp == parent) 561 return true; 562 } 563 564 return false; 565 } 566 567 static void 568 clk_core_forward_rate_req(struct clk_core *core, 569 const struct clk_rate_request *old_req, 570 struct clk_core *parent, 571 struct clk_rate_request *req, 572 unsigned long parent_rate) 573 { 574 if (WARN_ON(!clk_core_has_parent(core, parent))) 575 return; 576 577 clk_core_init_rate_req(parent, req, parent_rate); 578 579 if (req->min_rate < old_req->min_rate) 580 req->min_rate = old_req->min_rate; 581 582 if (req->max_rate > old_req->max_rate) 583 req->max_rate = old_req->max_rate; 584 } 585 586 int clk_mux_determine_rate_flags(struct clk_hw *hw, 587 struct clk_rate_request *req, 588 unsigned long flags) 589 { 590 struct clk_core *core = hw->core, *parent, *best_parent = NULL; 591 int i, num_parents, ret; 592 unsigned long best = 0; 593 594 /* if NO_REPARENT flag set, pass through to current parent */ 595 if (core->flags & CLK_SET_RATE_NO_REPARENT) { 596 parent = core->parent; 597 if (core->flags & CLK_SET_RATE_PARENT) { 598 struct clk_rate_request parent_req; 599 600 if (!parent) { 601 req->rate = 0; 602 return 0; 603 } 604 605 clk_core_forward_rate_req(core, req, parent, &parent_req, req->rate); 606 607 trace_clk_rate_request_start(&parent_req); 608 609 ret = clk_core_round_rate_nolock(parent, &parent_req); 610 if (ret) 611 return ret; 612 613 trace_clk_rate_request_done(&parent_req); 614 615 best = parent_req.rate; 616 } else if (parent) { 617 best = clk_core_get_rate_nolock(parent); 618 } else { 619 best = clk_core_get_rate_nolock(core); 620 } 621 622 goto out; 623 } 624 625 /* find the parent that can provide the fastest rate <= rate */ 626 num_parents = core->num_parents; 627 for (i = 0; i < num_parents; i++) { 628 unsigned long parent_rate; 629 630 parent = clk_core_get_parent_by_index(core, i); 631 if (!parent) 632 continue; 633 634 if (core->flags & CLK_SET_RATE_PARENT) { 635 struct clk_rate_request parent_req; 636 637 clk_core_forward_rate_req(core, req, parent, &parent_req, req->rate); 638 639 trace_clk_rate_request_start(&parent_req); 640 641 ret = clk_core_round_rate_nolock(parent, &parent_req); 642 if (ret) 643 continue; 644 645 trace_clk_rate_request_done(&parent_req); 646 647 parent_rate = parent_req.rate; 648 } else { 649 parent_rate = clk_core_get_rate_nolock(parent); 650 } 651 652 if (mux_is_better_rate(req->rate, parent_rate, 653 best, flags)) { 654 best_parent = parent; 655 best = parent_rate; 656 } 657 } 658 659 if (!best_parent) 660 return -EINVAL; 661 662 out: 663 if (best_parent) 664 req->best_parent_hw = best_parent->hw; 665 req->best_parent_rate = best; 666 req->rate = best; 667 668 return 0; 669 } 670 EXPORT_SYMBOL_GPL(clk_mux_determine_rate_flags); 671 672 struct clk *__clk_lookup(const char *name) 673 { 674 struct clk_core *core = clk_core_lookup(name); 675 676 return !core ? NULL : core->hw->clk; 677 } 678 679 static void clk_core_get_boundaries(struct clk_core *core, 680 unsigned long *min_rate, 681 unsigned long *max_rate) 682 { 683 struct clk *clk_user; 684 685 lockdep_assert_held(&prepare_lock); 686 687 *min_rate = core->min_rate; 688 *max_rate = core->max_rate; 689 690 hlist_for_each_entry(clk_user, &core->clks, clks_node) 691 *min_rate = max(*min_rate, clk_user->min_rate); 692 693 hlist_for_each_entry(clk_user, &core->clks, clks_node) 694 *max_rate = min(*max_rate, clk_user->max_rate); 695 } 696 697 /* 698 * clk_hw_get_rate_range() - returns the clock rate range for a hw clk 699 * @hw: the hw clk we want to get the range from 700 * @min_rate: pointer to the variable that will hold the minimum 701 * @max_rate: pointer to the variable that will hold the maximum 702 * 703 * Fills the @min_rate and @max_rate variables with the minimum and 704 * maximum that clock can reach. 705 */ 706 void clk_hw_get_rate_range(struct clk_hw *hw, unsigned long *min_rate, 707 unsigned long *max_rate) 708 { 709 clk_core_get_boundaries(hw->core, min_rate, max_rate); 710 } 711 EXPORT_SYMBOL_GPL(clk_hw_get_rate_range); 712 713 static bool clk_core_check_boundaries(struct clk_core *core, 714 unsigned long min_rate, 715 unsigned long max_rate) 716 { 717 struct clk *user; 718 719 lockdep_assert_held(&prepare_lock); 720 721 if (min_rate > core->max_rate || max_rate < core->min_rate) 722 return false; 723 724 hlist_for_each_entry(user, &core->clks, clks_node) 725 if (min_rate > user->max_rate || max_rate < user->min_rate) 726 return false; 727 728 return true; 729 } 730 731 void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate, 732 unsigned long max_rate) 733 { 734 hw->core->min_rate = min_rate; 735 hw->core->max_rate = max_rate; 736 } 737 EXPORT_SYMBOL_GPL(clk_hw_set_rate_range); 738 739 /* 740 * __clk_mux_determine_rate - clk_ops::determine_rate implementation for a mux type clk 741 * @hw: mux type clk to determine rate on 742 * @req: rate request, also used to return preferred parent and frequencies 743 * 744 * Helper for finding best parent to provide a given frequency. This can be used 745 * directly as a determine_rate callback (e.g. for a mux), or from a more 746 * complex clock that may combine a mux with other operations. 747 * 748 * Returns: 0 on success, -EERROR value on error 749 */ 750 int __clk_mux_determine_rate(struct clk_hw *hw, 751 struct clk_rate_request *req) 752 { 753 return clk_mux_determine_rate_flags(hw, req, 0); 754 } 755 EXPORT_SYMBOL_GPL(__clk_mux_determine_rate); 756 757 int __clk_mux_determine_rate_closest(struct clk_hw *hw, 758 struct clk_rate_request *req) 759 { 760 return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST); 761 } 762 EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest); 763 764 /*** clk api ***/ 765 766 static void clk_core_rate_unprotect(struct clk_core *core) 767 { 768 lockdep_assert_held(&prepare_lock); 769 770 if (!core) 771 return; 772 773 if (WARN(core->protect_count == 0, 774 "%s already unprotected\n", core->name)) 775 return; 776 777 if (--core->protect_count > 0) 778 return; 779 780 clk_core_rate_unprotect(core->parent); 781 } 782 783 static int clk_core_rate_nuke_protect(struct clk_core *core) 784 { 785 int ret; 786 787 lockdep_assert_held(&prepare_lock); 788 789 if (!core) 790 return -EINVAL; 791 792 if (core->protect_count == 0) 793 return 0; 794 795 ret = core->protect_count; 796 core->protect_count = 1; 797 clk_core_rate_unprotect(core); 798 799 return ret; 800 } 801 802 /** 803 * clk_rate_exclusive_put - release exclusivity over clock rate control 804 * @clk: the clk over which the exclusivity is released 805 * 806 * clk_rate_exclusive_put() completes a critical section during which a clock 807 * consumer cannot tolerate any other consumer making any operation on the 808 * clock which could result in a rate change or rate glitch. Exclusive clocks 809 * cannot have their rate changed, either directly or indirectly due to changes 810 * further up the parent chain of clocks. As a result, clocks up parent chain 811 * also get under exclusive control of the calling consumer. 812 * 813 * If exlusivity is claimed more than once on clock, even by the same consumer, 814 * the rate effectively gets locked as exclusivity can't be preempted. 815 * 816 * Calls to clk_rate_exclusive_put() must be balanced with calls to 817 * clk_rate_exclusive_get(). Calls to this function may sleep, and do not return 818 * error status. 819 */ 820 void clk_rate_exclusive_put(struct clk *clk) 821 { 822 if (!clk) 823 return; 824 825 clk_prepare_lock(); 826 827 /* 828 * if there is something wrong with this consumer protect count, stop 829 * here before messing with the provider 830 */ 831 if (WARN_ON(clk->exclusive_count <= 0)) 832 goto out; 833 834 clk_core_rate_unprotect(clk->core); 835 clk->exclusive_count--; 836 out: 837 clk_prepare_unlock(); 838 } 839 EXPORT_SYMBOL_GPL(clk_rate_exclusive_put); 840 841 static void clk_core_rate_protect(struct clk_core *core) 842 { 843 lockdep_assert_held(&prepare_lock); 844 845 if (!core) 846 return; 847 848 if (core->protect_count == 0) 849 clk_core_rate_protect(core->parent); 850 851 core->protect_count++; 852 } 853 854 static void clk_core_rate_restore_protect(struct clk_core *core, int count) 855 { 856 lockdep_assert_held(&prepare_lock); 857 858 if (!core) 859 return; 860 861 if (count == 0) 862 return; 863 864 clk_core_rate_protect(core); 865 core->protect_count = count; 866 } 867 868 /** 869 * clk_rate_exclusive_get - get exclusivity over the clk rate control 870 * @clk: the clk over which the exclusity of rate control is requested 871 * 872 * clk_rate_exclusive_get() begins a critical section during which a clock 873 * consumer cannot tolerate any other consumer making any operation on the 874 * clock which could result in a rate change or rate glitch. Exclusive clocks 875 * cannot have their rate changed, either directly or indirectly due to changes 876 * further up the parent chain of clocks. As a result, clocks up parent chain 877 * also get under exclusive control of the calling consumer. 878 * 879 * If exlusivity is claimed more than once on clock, even by the same consumer, 880 * the rate effectively gets locked as exclusivity can't be preempted. 881 * 882 * Calls to clk_rate_exclusive_get() should be balanced with calls to 883 * clk_rate_exclusive_put(). Calls to this function may sleep. 884 * Returns 0 on success, -EERROR otherwise 885 */ 886 int clk_rate_exclusive_get(struct clk *clk) 887 { 888 if (!clk) 889 return 0; 890 891 clk_prepare_lock(); 892 clk_core_rate_protect(clk->core); 893 clk->exclusive_count++; 894 clk_prepare_unlock(); 895 896 return 0; 897 } 898 EXPORT_SYMBOL_GPL(clk_rate_exclusive_get); 899 900 static void clk_core_unprepare(struct clk_core *core) 901 { 902 lockdep_assert_held(&prepare_lock); 903 904 if (!core) 905 return; 906 907 if (WARN(core->prepare_count == 0, 908 "%s already unprepared\n", core->name)) 909 return; 910 911 if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL, 912 "Unpreparing critical %s\n", core->name)) 913 return; 914 915 if (core->flags & CLK_SET_RATE_GATE) 916 clk_core_rate_unprotect(core); 917 918 if (--core->prepare_count > 0) 919 return; 920 921 WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name); 922 923 trace_clk_unprepare(core); 924 925 if (core->ops->unprepare) 926 core->ops->unprepare(core->hw); 927 928 trace_clk_unprepare_complete(core); 929 clk_core_unprepare(core->parent); 930 clk_pm_runtime_put(core); 931 } 932 933 static void clk_core_unprepare_lock(struct clk_core *core) 934 { 935 clk_prepare_lock(); 936 clk_core_unprepare(core); 937 clk_prepare_unlock(); 938 } 939 940 /** 941 * clk_unprepare - undo preparation of a clock source 942 * @clk: the clk being unprepared 943 * 944 * clk_unprepare may sleep, which differentiates it from clk_disable. In a 945 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk 946 * if the operation may sleep. One example is a clk which is accessed over 947 * I2c. In the complex case a clk gate operation may require a fast and a slow 948 * part. It is this reason that clk_unprepare and clk_disable are not mutually 949 * exclusive. In fact clk_disable must be called before clk_unprepare. 950 */ 951 void clk_unprepare(struct clk *clk) 952 { 953 if (IS_ERR_OR_NULL(clk)) 954 return; 955 956 clk_core_unprepare_lock(clk->core); 957 } 958 EXPORT_SYMBOL_GPL(clk_unprepare); 959 960 static int clk_core_prepare(struct clk_core *core) 961 { 962 int ret = 0; 963 964 lockdep_assert_held(&prepare_lock); 965 966 if (!core) 967 return 0; 968 969 if (core->prepare_count == 0) { 970 ret = clk_pm_runtime_get(core); 971 if (ret) 972 return ret; 973 974 ret = clk_core_prepare(core->parent); 975 if (ret) 976 goto runtime_put; 977 978 trace_clk_prepare(core); 979 980 if (core->ops->prepare) 981 ret = core->ops->prepare(core->hw); 982 983 trace_clk_prepare_complete(core); 984 985 if (ret) 986 goto unprepare; 987 } 988 989 core->prepare_count++; 990 991 /* 992 * CLK_SET_RATE_GATE is a special case of clock protection 993 * Instead of a consumer claiming exclusive rate control, it is 994 * actually the provider which prevents any consumer from making any 995 * operation which could result in a rate change or rate glitch while 996 * the clock is prepared. 997 */ 998 if (core->flags & CLK_SET_RATE_GATE) 999 clk_core_rate_protect(core); 1000 1001 return 0; 1002 unprepare: 1003 clk_core_unprepare(core->parent); 1004 runtime_put: 1005 clk_pm_runtime_put(core); 1006 return ret; 1007 } 1008 1009 static int clk_core_prepare_lock(struct clk_core *core) 1010 { 1011 int ret; 1012 1013 clk_prepare_lock(); 1014 ret = clk_core_prepare(core); 1015 clk_prepare_unlock(); 1016 1017 return ret; 1018 } 1019 1020 /** 1021 * clk_prepare - prepare a clock source 1022 * @clk: the clk being prepared 1023 * 1024 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple 1025 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the 1026 * operation may sleep. One example is a clk which is accessed over I2c. In 1027 * the complex case a clk ungate operation may require a fast and a slow part. 1028 * It is this reason that clk_prepare and clk_enable are not mutually 1029 * exclusive. In fact clk_prepare must be called before clk_enable. 1030 * Returns 0 on success, -EERROR otherwise. 1031 */ 1032 int clk_prepare(struct clk *clk) 1033 { 1034 if (!clk) 1035 return 0; 1036 1037 return clk_core_prepare_lock(clk->core); 1038 } 1039 EXPORT_SYMBOL_GPL(clk_prepare); 1040 1041 static void clk_core_disable(struct clk_core *core) 1042 { 1043 lockdep_assert_held(&enable_lock); 1044 1045 if (!core) 1046 return; 1047 1048 if (WARN(core->enable_count == 0, "%s already disabled\n", core->name)) 1049 return; 1050 1051 if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL, 1052 "Disabling critical %s\n", core->name)) 1053 return; 1054 1055 if (--core->enable_count > 0) 1056 return; 1057 1058 trace_clk_disable_rcuidle(core); 1059 1060 if (core->ops->disable) 1061 core->ops->disable(core->hw); 1062 1063 trace_clk_disable_complete_rcuidle(core); 1064 1065 clk_core_disable(core->parent); 1066 } 1067 1068 static void clk_core_disable_lock(struct clk_core *core) 1069 { 1070 unsigned long flags; 1071 1072 flags = clk_enable_lock(); 1073 clk_core_disable(core); 1074 clk_enable_unlock(flags); 1075 } 1076 1077 /** 1078 * clk_disable - gate a clock 1079 * @clk: the clk being gated 1080 * 1081 * clk_disable must not sleep, which differentiates it from clk_unprepare. In 1082 * a simple case, clk_disable can be used instead of clk_unprepare to gate a 1083 * clk if the operation is fast and will never sleep. One example is a 1084 * SoC-internal clk which is controlled via simple register writes. In the 1085 * complex case a clk gate operation may require a fast and a slow part. It is 1086 * this reason that clk_unprepare and clk_disable are not mutually exclusive. 1087 * In fact clk_disable must be called before clk_unprepare. 1088 */ 1089 void clk_disable(struct clk *clk) 1090 { 1091 if (IS_ERR_OR_NULL(clk)) 1092 return; 1093 1094 clk_core_disable_lock(clk->core); 1095 } 1096 EXPORT_SYMBOL_GPL(clk_disable); 1097 1098 static int clk_core_enable(struct clk_core *core) 1099 { 1100 int ret = 0; 1101 1102 lockdep_assert_held(&enable_lock); 1103 1104 if (!core) 1105 return 0; 1106 1107 if (WARN(core->prepare_count == 0, 1108 "Enabling unprepared %s\n", core->name)) 1109 return -ESHUTDOWN; 1110 1111 if (core->enable_count == 0) { 1112 ret = clk_core_enable(core->parent); 1113 1114 if (ret) 1115 return ret; 1116 1117 trace_clk_enable_rcuidle(core); 1118 1119 if (core->ops->enable) 1120 ret = core->ops->enable(core->hw); 1121 1122 trace_clk_enable_complete_rcuidle(core); 1123 1124 if (ret) { 1125 clk_core_disable(core->parent); 1126 return ret; 1127 } 1128 } 1129 1130 core->enable_count++; 1131 return 0; 1132 } 1133 1134 static int clk_core_enable_lock(struct clk_core *core) 1135 { 1136 unsigned long flags; 1137 int ret; 1138 1139 flags = clk_enable_lock(); 1140 ret = clk_core_enable(core); 1141 clk_enable_unlock(flags); 1142 1143 return ret; 1144 } 1145 1146 /** 1147 * clk_gate_restore_context - restore context for poweroff 1148 * @hw: the clk_hw pointer of clock whose state is to be restored 1149 * 1150 * The clock gate restore context function enables or disables 1151 * the gate clocks based on the enable_count. This is done in cases 1152 * where the clock context is lost and based on the enable_count 1153 * the clock either needs to be enabled/disabled. This 1154 * helps restore the state of gate clocks. 1155 */ 1156 void clk_gate_restore_context(struct clk_hw *hw) 1157 { 1158 struct clk_core *core = hw->core; 1159 1160 if (core->enable_count) 1161 core->ops->enable(hw); 1162 else 1163 core->ops->disable(hw); 1164 } 1165 EXPORT_SYMBOL_GPL(clk_gate_restore_context); 1166 1167 static int clk_core_save_context(struct clk_core *core) 1168 { 1169 struct clk_core *child; 1170 int ret = 0; 1171 1172 hlist_for_each_entry(child, &core->children, child_node) { 1173 ret = clk_core_save_context(child); 1174 if (ret < 0) 1175 return ret; 1176 } 1177 1178 if (core->ops && core->ops->save_context) 1179 ret = core->ops->save_context(core->hw); 1180 1181 return ret; 1182 } 1183 1184 static void clk_core_restore_context(struct clk_core *core) 1185 { 1186 struct clk_core *child; 1187 1188 if (core->ops && core->ops->restore_context) 1189 core->ops->restore_context(core->hw); 1190 1191 hlist_for_each_entry(child, &core->children, child_node) 1192 clk_core_restore_context(child); 1193 } 1194 1195 /** 1196 * clk_save_context - save clock context for poweroff 1197 * 1198 * Saves the context of the clock register for powerstates in which the 1199 * contents of the registers will be lost. Occurs deep within the suspend 1200 * code. Returns 0 on success. 1201 */ 1202 int clk_save_context(void) 1203 { 1204 struct clk_core *clk; 1205 int ret; 1206 1207 hlist_for_each_entry(clk, &clk_root_list, child_node) { 1208 ret = clk_core_save_context(clk); 1209 if (ret < 0) 1210 return ret; 1211 } 1212 1213 hlist_for_each_entry(clk, &clk_orphan_list, child_node) { 1214 ret = clk_core_save_context(clk); 1215 if (ret < 0) 1216 return ret; 1217 } 1218 1219 return 0; 1220 } 1221 EXPORT_SYMBOL_GPL(clk_save_context); 1222 1223 /** 1224 * clk_restore_context - restore clock context after poweroff 1225 * 1226 * Restore the saved clock context upon resume. 1227 * 1228 */ 1229 void clk_restore_context(void) 1230 { 1231 struct clk_core *core; 1232 1233 hlist_for_each_entry(core, &clk_root_list, child_node) 1234 clk_core_restore_context(core); 1235 1236 hlist_for_each_entry(core, &clk_orphan_list, child_node) 1237 clk_core_restore_context(core); 1238 } 1239 EXPORT_SYMBOL_GPL(clk_restore_context); 1240 1241 /** 1242 * clk_enable - ungate a clock 1243 * @clk: the clk being ungated 1244 * 1245 * clk_enable must not sleep, which differentiates it from clk_prepare. In a 1246 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk 1247 * if the operation will never sleep. One example is a SoC-internal clk which 1248 * is controlled via simple register writes. In the complex case a clk ungate 1249 * operation may require a fast and a slow part. It is this reason that 1250 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare 1251 * must be called before clk_enable. Returns 0 on success, -EERROR 1252 * otherwise. 1253 */ 1254 int clk_enable(struct clk *clk) 1255 { 1256 if (!clk) 1257 return 0; 1258 1259 return clk_core_enable_lock(clk->core); 1260 } 1261 EXPORT_SYMBOL_GPL(clk_enable); 1262 1263 /** 1264 * clk_is_enabled_when_prepared - indicate if preparing a clock also enables it. 1265 * @clk: clock source 1266 * 1267 * Returns true if clk_prepare() implicitly enables the clock, effectively 1268 * making clk_enable()/clk_disable() no-ops, false otherwise. 1269 * 1270 * This is of interest mainly to power management code where actually 1271 * disabling the clock also requires unpreparing it to have any material 1272 * effect. 1273 * 1274 * Regardless of the value returned here, the caller must always invoke 1275 * clk_enable() or clk_prepare_enable() and counterparts for usage counts 1276 * to be right. 1277 */ 1278 bool clk_is_enabled_when_prepared(struct clk *clk) 1279 { 1280 return clk && !(clk->core->ops->enable && clk->core->ops->disable); 1281 } 1282 EXPORT_SYMBOL_GPL(clk_is_enabled_when_prepared); 1283 1284 static int clk_core_prepare_enable(struct clk_core *core) 1285 { 1286 int ret; 1287 1288 ret = clk_core_prepare_lock(core); 1289 if (ret) 1290 return ret; 1291 1292 ret = clk_core_enable_lock(core); 1293 if (ret) 1294 clk_core_unprepare_lock(core); 1295 1296 return ret; 1297 } 1298 1299 static void clk_core_disable_unprepare(struct clk_core *core) 1300 { 1301 clk_core_disable_lock(core); 1302 clk_core_unprepare_lock(core); 1303 } 1304 1305 static void __init clk_unprepare_unused_subtree(struct clk_core *core) 1306 { 1307 struct clk_core *child; 1308 1309 lockdep_assert_held(&prepare_lock); 1310 1311 hlist_for_each_entry(child, &core->children, child_node) 1312 clk_unprepare_unused_subtree(child); 1313 1314 if (core->prepare_count) 1315 return; 1316 1317 if (core->flags & CLK_IGNORE_UNUSED) 1318 return; 1319 1320 if (clk_pm_runtime_get(core)) 1321 return; 1322 1323 if (clk_core_is_prepared(core)) { 1324 trace_clk_unprepare(core); 1325 if (core->ops->unprepare_unused) 1326 core->ops->unprepare_unused(core->hw); 1327 else if (core->ops->unprepare) 1328 core->ops->unprepare(core->hw); 1329 trace_clk_unprepare_complete(core); 1330 } 1331 1332 clk_pm_runtime_put(core); 1333 } 1334 1335 static void __init clk_disable_unused_subtree(struct clk_core *core) 1336 { 1337 struct clk_core *child; 1338 unsigned long flags; 1339 1340 lockdep_assert_held(&prepare_lock); 1341 1342 hlist_for_each_entry(child, &core->children, child_node) 1343 clk_disable_unused_subtree(child); 1344 1345 if (core->flags & CLK_OPS_PARENT_ENABLE) 1346 clk_core_prepare_enable(core->parent); 1347 1348 if (clk_pm_runtime_get(core)) 1349 goto unprepare_out; 1350 1351 flags = clk_enable_lock(); 1352 1353 if (core->enable_count) 1354 goto unlock_out; 1355 1356 if (core->flags & CLK_IGNORE_UNUSED) 1357 goto unlock_out; 1358 1359 /* 1360 * some gate clocks have special needs during the disable-unused 1361 * sequence. call .disable_unused if available, otherwise fall 1362 * back to .disable 1363 */ 1364 if (clk_core_is_enabled(core)) { 1365 trace_clk_disable(core); 1366 if (core->ops->disable_unused) 1367 core->ops->disable_unused(core->hw); 1368 else if (core->ops->disable) 1369 core->ops->disable(core->hw); 1370 trace_clk_disable_complete(core); 1371 } 1372 1373 unlock_out: 1374 clk_enable_unlock(flags); 1375 clk_pm_runtime_put(core); 1376 unprepare_out: 1377 if (core->flags & CLK_OPS_PARENT_ENABLE) 1378 clk_core_disable_unprepare(core->parent); 1379 } 1380 1381 static bool clk_ignore_unused __initdata; 1382 static int __init clk_ignore_unused_setup(char *__unused) 1383 { 1384 clk_ignore_unused = true; 1385 return 1; 1386 } 1387 __setup("clk_ignore_unused", clk_ignore_unused_setup); 1388 1389 static int __init clk_disable_unused(void) 1390 { 1391 struct clk_core *core; 1392 1393 if (clk_ignore_unused) { 1394 pr_warn("clk: Not disabling unused clocks\n"); 1395 return 0; 1396 } 1397 1398 clk_prepare_lock(); 1399 1400 hlist_for_each_entry(core, &clk_root_list, child_node) 1401 clk_disable_unused_subtree(core); 1402 1403 hlist_for_each_entry(core, &clk_orphan_list, child_node) 1404 clk_disable_unused_subtree(core); 1405 1406 hlist_for_each_entry(core, &clk_root_list, child_node) 1407 clk_unprepare_unused_subtree(core); 1408 1409 hlist_for_each_entry(core, &clk_orphan_list, child_node) 1410 clk_unprepare_unused_subtree(core); 1411 1412 clk_prepare_unlock(); 1413 1414 return 0; 1415 } 1416 late_initcall_sync(clk_disable_unused); 1417 1418 static int clk_core_determine_round_nolock(struct clk_core *core, 1419 struct clk_rate_request *req) 1420 { 1421 long rate; 1422 1423 lockdep_assert_held(&prepare_lock); 1424 1425 if (!core) 1426 return 0; 1427 1428 /* 1429 * Some clock providers hand-craft their clk_rate_requests and 1430 * might not fill min_rate and max_rate. 1431 * 1432 * If it's the case, clamping the rate is equivalent to setting 1433 * the rate to 0 which is bad. Skip the clamping but complain so 1434 * that it gets fixed, hopefully. 1435 */ 1436 if (!req->min_rate && !req->max_rate) 1437 pr_warn("%s: %s: clk_rate_request has initialized min or max rate.\n", 1438 __func__, core->name); 1439 else 1440 req->rate = clamp(req->rate, req->min_rate, req->max_rate); 1441 1442 /* 1443 * At this point, core protection will be disabled 1444 * - if the provider is not protected at all 1445 * - if the calling consumer is the only one which has exclusivity 1446 * over the provider 1447 */ 1448 if (clk_core_rate_is_protected(core)) { 1449 req->rate = core->rate; 1450 } else if (core->ops->determine_rate) { 1451 return core->ops->determine_rate(core->hw, req); 1452 } else if (core->ops->round_rate) { 1453 rate = core->ops->round_rate(core->hw, req->rate, 1454 &req->best_parent_rate); 1455 if (rate < 0) 1456 return rate; 1457 1458 req->rate = rate; 1459 } else { 1460 return -EINVAL; 1461 } 1462 1463 return 0; 1464 } 1465 1466 static void clk_core_init_rate_req(struct clk_core * const core, 1467 struct clk_rate_request *req, 1468 unsigned long rate) 1469 { 1470 struct clk_core *parent; 1471 1472 if (WARN_ON(!req)) 1473 return; 1474 1475 memset(req, 0, sizeof(*req)); 1476 req->max_rate = ULONG_MAX; 1477 1478 if (!core) 1479 return; 1480 1481 req->core = core; 1482 req->rate = rate; 1483 clk_core_get_boundaries(core, &req->min_rate, &req->max_rate); 1484 1485 parent = core->parent; 1486 if (parent) { 1487 req->best_parent_hw = parent->hw; 1488 req->best_parent_rate = parent->rate; 1489 } else { 1490 req->best_parent_hw = NULL; 1491 req->best_parent_rate = 0; 1492 } 1493 } 1494 1495 /** 1496 * clk_hw_init_rate_request - Initializes a clk_rate_request 1497 * @hw: the clk for which we want to submit a rate request 1498 * @req: the clk_rate_request structure we want to initialise 1499 * @rate: the rate which is to be requested 1500 * 1501 * Initializes a clk_rate_request structure to submit to 1502 * __clk_determine_rate() or similar functions. 1503 */ 1504 void clk_hw_init_rate_request(const struct clk_hw *hw, 1505 struct clk_rate_request *req, 1506 unsigned long rate) 1507 { 1508 if (WARN_ON(!hw || !req)) 1509 return; 1510 1511 clk_core_init_rate_req(hw->core, req, rate); 1512 } 1513 EXPORT_SYMBOL_GPL(clk_hw_init_rate_request); 1514 1515 /** 1516 * clk_hw_forward_rate_request - Forwards a clk_rate_request to a clock's parent 1517 * @hw: the original clock that got the rate request 1518 * @old_req: the original clk_rate_request structure we want to forward 1519 * @parent: the clk we want to forward @old_req to 1520 * @req: the clk_rate_request structure we want to initialise 1521 * @parent_rate: The rate which is to be requested to @parent 1522 * 1523 * Initializes a clk_rate_request structure to submit to a clock parent 1524 * in __clk_determine_rate() or similar functions. 1525 */ 1526 void clk_hw_forward_rate_request(const struct clk_hw *hw, 1527 const struct clk_rate_request *old_req, 1528 const struct clk_hw *parent, 1529 struct clk_rate_request *req, 1530 unsigned long parent_rate) 1531 { 1532 if (WARN_ON(!hw || !old_req || !parent || !req)) 1533 return; 1534 1535 clk_core_forward_rate_req(hw->core, old_req, 1536 parent->core, req, 1537 parent_rate); 1538 } 1539 1540 static bool clk_core_can_round(struct clk_core * const core) 1541 { 1542 return core->ops->determine_rate || core->ops->round_rate; 1543 } 1544 1545 static int clk_core_round_rate_nolock(struct clk_core *core, 1546 struct clk_rate_request *req) 1547 { 1548 int ret; 1549 1550 lockdep_assert_held(&prepare_lock); 1551 1552 if (!core) { 1553 req->rate = 0; 1554 return 0; 1555 } 1556 1557 if (clk_core_can_round(core)) 1558 return clk_core_determine_round_nolock(core, req); 1559 1560 if (core->flags & CLK_SET_RATE_PARENT) { 1561 struct clk_rate_request parent_req; 1562 1563 clk_core_forward_rate_req(core, req, core->parent, &parent_req, req->rate); 1564 1565 trace_clk_rate_request_start(&parent_req); 1566 1567 ret = clk_core_round_rate_nolock(core->parent, &parent_req); 1568 if (ret) 1569 return ret; 1570 1571 trace_clk_rate_request_done(&parent_req); 1572 1573 req->best_parent_rate = parent_req.rate; 1574 req->rate = parent_req.rate; 1575 1576 return 0; 1577 } 1578 1579 req->rate = core->rate; 1580 return 0; 1581 } 1582 1583 /** 1584 * __clk_determine_rate - get the closest rate actually supported by a clock 1585 * @hw: determine the rate of this clock 1586 * @req: target rate request 1587 * 1588 * Useful for clk_ops such as .set_rate and .determine_rate. 1589 */ 1590 int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) 1591 { 1592 if (!hw) { 1593 req->rate = 0; 1594 return 0; 1595 } 1596 1597 return clk_core_round_rate_nolock(hw->core, req); 1598 } 1599 EXPORT_SYMBOL_GPL(__clk_determine_rate); 1600 1601 /** 1602 * clk_hw_round_rate() - round the given rate for a hw clk 1603 * @hw: the hw clk for which we are rounding a rate 1604 * @rate: the rate which is to be rounded 1605 * 1606 * Takes in a rate as input and rounds it to a rate that the clk can actually 1607 * use. 1608 * 1609 * Context: prepare_lock must be held. 1610 * For clk providers to call from within clk_ops such as .round_rate, 1611 * .determine_rate. 1612 * 1613 * Return: returns rounded rate of hw clk if clk supports round_rate operation 1614 * else returns the parent rate. 1615 */ 1616 unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate) 1617 { 1618 int ret; 1619 struct clk_rate_request req; 1620 1621 clk_core_init_rate_req(hw->core, &req, rate); 1622 1623 trace_clk_rate_request_start(&req); 1624 1625 ret = clk_core_round_rate_nolock(hw->core, &req); 1626 if (ret) 1627 return 0; 1628 1629 trace_clk_rate_request_done(&req); 1630 1631 return req.rate; 1632 } 1633 EXPORT_SYMBOL_GPL(clk_hw_round_rate); 1634 1635 /** 1636 * clk_round_rate - round the given rate for a clk 1637 * @clk: the clk for which we are rounding a rate 1638 * @rate: the rate which is to be rounded 1639 * 1640 * Takes in a rate as input and rounds it to a rate that the clk can actually 1641 * use which is then returned. If clk doesn't support round_rate operation 1642 * then the parent rate is returned. 1643 */ 1644 long clk_round_rate(struct clk *clk, unsigned long rate) 1645 { 1646 struct clk_rate_request req; 1647 int ret; 1648 1649 if (!clk) 1650 return 0; 1651 1652 clk_prepare_lock(); 1653 1654 if (clk->exclusive_count) 1655 clk_core_rate_unprotect(clk->core); 1656 1657 clk_core_init_rate_req(clk->core, &req, rate); 1658 1659 trace_clk_rate_request_start(&req); 1660 1661 ret = clk_core_round_rate_nolock(clk->core, &req); 1662 1663 trace_clk_rate_request_done(&req); 1664 1665 if (clk->exclusive_count) 1666 clk_core_rate_protect(clk->core); 1667 1668 clk_prepare_unlock(); 1669 1670 if (ret) 1671 return ret; 1672 1673 return req.rate; 1674 } 1675 EXPORT_SYMBOL_GPL(clk_round_rate); 1676 1677 /** 1678 * __clk_notify - call clk notifier chain 1679 * @core: clk that is changing rate 1680 * @msg: clk notifier type (see include/linux/clk.h) 1681 * @old_rate: old clk rate 1682 * @new_rate: new clk rate 1683 * 1684 * Triggers a notifier call chain on the clk rate-change notification 1685 * for 'clk'. Passes a pointer to the struct clk and the previous 1686 * and current rates to the notifier callback. Intended to be called by 1687 * internal clock code only. Returns NOTIFY_DONE from the last driver 1688 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if 1689 * a driver returns that. 1690 */ 1691 static int __clk_notify(struct clk_core *core, unsigned long msg, 1692 unsigned long old_rate, unsigned long new_rate) 1693 { 1694 struct clk_notifier *cn; 1695 struct clk_notifier_data cnd; 1696 int ret = NOTIFY_DONE; 1697 1698 cnd.old_rate = old_rate; 1699 cnd.new_rate = new_rate; 1700 1701 list_for_each_entry(cn, &clk_notifier_list, node) { 1702 if (cn->clk->core == core) { 1703 cnd.clk = cn->clk; 1704 ret = srcu_notifier_call_chain(&cn->notifier_head, msg, 1705 &cnd); 1706 if (ret & NOTIFY_STOP_MASK) 1707 return ret; 1708 } 1709 } 1710 1711 return ret; 1712 } 1713 1714 /** 1715 * __clk_recalc_accuracies 1716 * @core: first clk in the subtree 1717 * 1718 * Walks the subtree of clks starting with clk and recalculates accuracies as 1719 * it goes. Note that if a clk does not implement the .recalc_accuracy 1720 * callback then it is assumed that the clock will take on the accuracy of its 1721 * parent. 1722 */ 1723 static void __clk_recalc_accuracies(struct clk_core *core) 1724 { 1725 unsigned long parent_accuracy = 0; 1726 struct clk_core *child; 1727 1728 lockdep_assert_held(&prepare_lock); 1729 1730 if (core->parent) 1731 parent_accuracy = core->parent->accuracy; 1732 1733 if (core->ops->recalc_accuracy) 1734 core->accuracy = core->ops->recalc_accuracy(core->hw, 1735 parent_accuracy); 1736 else 1737 core->accuracy = parent_accuracy; 1738 1739 hlist_for_each_entry(child, &core->children, child_node) 1740 __clk_recalc_accuracies(child); 1741 } 1742 1743 static long clk_core_get_accuracy_recalc(struct clk_core *core) 1744 { 1745 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE)) 1746 __clk_recalc_accuracies(core); 1747 1748 return clk_core_get_accuracy_no_lock(core); 1749 } 1750 1751 /** 1752 * clk_get_accuracy - return the accuracy of clk 1753 * @clk: the clk whose accuracy is being returned 1754 * 1755 * Simply returns the cached accuracy of the clk, unless 1756 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be 1757 * issued. 1758 * If clk is NULL then returns 0. 1759 */ 1760 long clk_get_accuracy(struct clk *clk) 1761 { 1762 long accuracy; 1763 1764 if (!clk) 1765 return 0; 1766 1767 clk_prepare_lock(); 1768 accuracy = clk_core_get_accuracy_recalc(clk->core); 1769 clk_prepare_unlock(); 1770 1771 return accuracy; 1772 } 1773 EXPORT_SYMBOL_GPL(clk_get_accuracy); 1774 1775 static unsigned long clk_recalc(struct clk_core *core, 1776 unsigned long parent_rate) 1777 { 1778 unsigned long rate = parent_rate; 1779 1780 if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) { 1781 rate = core->ops->recalc_rate(core->hw, parent_rate); 1782 clk_pm_runtime_put(core); 1783 } 1784 return rate; 1785 } 1786 1787 /** 1788 * __clk_recalc_rates 1789 * @core: first clk in the subtree 1790 * @update_req: Whether req_rate should be updated with the new rate 1791 * @msg: notification type (see include/linux/clk.h) 1792 * 1793 * Walks the subtree of clks starting with clk and recalculates rates as it 1794 * goes. Note that if a clk does not implement the .recalc_rate callback then 1795 * it is assumed that the clock will take on the rate of its parent. 1796 * 1797 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification, 1798 * if necessary. 1799 */ 1800 static void __clk_recalc_rates(struct clk_core *core, bool update_req, 1801 unsigned long msg) 1802 { 1803 unsigned long old_rate; 1804 unsigned long parent_rate = 0; 1805 struct clk_core *child; 1806 1807 lockdep_assert_held(&prepare_lock); 1808 1809 old_rate = core->rate; 1810 1811 if (core->parent) 1812 parent_rate = core->parent->rate; 1813 1814 core->rate = clk_recalc(core, parent_rate); 1815 if (update_req) 1816 core->req_rate = core->rate; 1817 1818 /* 1819 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE 1820 * & ABORT_RATE_CHANGE notifiers 1821 */ 1822 if (core->notifier_count && msg) 1823 __clk_notify(core, msg, old_rate, core->rate); 1824 1825 hlist_for_each_entry(child, &core->children, child_node) 1826 __clk_recalc_rates(child, update_req, msg); 1827 } 1828 1829 static unsigned long clk_core_get_rate_recalc(struct clk_core *core) 1830 { 1831 if (core && (core->flags & CLK_GET_RATE_NOCACHE)) 1832 __clk_recalc_rates(core, false, 0); 1833 1834 return clk_core_get_rate_nolock(core); 1835 } 1836 1837 /** 1838 * clk_get_rate - return the rate of clk 1839 * @clk: the clk whose rate is being returned 1840 * 1841 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag 1842 * is set, which means a recalc_rate will be issued. Can be called regardless of 1843 * the clock enabledness. If clk is NULL, or if an error occurred, then returns 1844 * 0. 1845 */ 1846 unsigned long clk_get_rate(struct clk *clk) 1847 { 1848 unsigned long rate; 1849 1850 if (!clk) 1851 return 0; 1852 1853 clk_prepare_lock(); 1854 rate = clk_core_get_rate_recalc(clk->core); 1855 clk_prepare_unlock(); 1856 1857 return rate; 1858 } 1859 EXPORT_SYMBOL_GPL(clk_get_rate); 1860 1861 static int clk_fetch_parent_index(struct clk_core *core, 1862 struct clk_core *parent) 1863 { 1864 int i; 1865 1866 if (!parent) 1867 return -EINVAL; 1868 1869 for (i = 0; i < core->num_parents; i++) { 1870 /* Found it first try! */ 1871 if (core->parents[i].core == parent) 1872 return i; 1873 1874 /* Something else is here, so keep looking */ 1875 if (core->parents[i].core) 1876 continue; 1877 1878 /* Maybe core hasn't been cached but the hw is all we know? */ 1879 if (core->parents[i].hw) { 1880 if (core->parents[i].hw == parent->hw) 1881 break; 1882 1883 /* Didn't match, but we're expecting a clk_hw */ 1884 continue; 1885 } 1886 1887 /* Maybe it hasn't been cached (clk_set_parent() path) */ 1888 if (parent == clk_core_get(core, i)) 1889 break; 1890 1891 /* Fallback to comparing globally unique names */ 1892 if (core->parents[i].name && 1893 !strcmp(parent->name, core->parents[i].name)) 1894 break; 1895 } 1896 1897 if (i == core->num_parents) 1898 return -EINVAL; 1899 1900 core->parents[i].core = parent; 1901 return i; 1902 } 1903 1904 /** 1905 * clk_hw_get_parent_index - return the index of the parent clock 1906 * @hw: clk_hw associated with the clk being consumed 1907 * 1908 * Fetches and returns the index of parent clock. Returns -EINVAL if the given 1909 * clock does not have a current parent. 1910 */ 1911 int clk_hw_get_parent_index(struct clk_hw *hw) 1912 { 1913 struct clk_hw *parent = clk_hw_get_parent(hw); 1914 1915 if (WARN_ON(parent == NULL)) 1916 return -EINVAL; 1917 1918 return clk_fetch_parent_index(hw->core, parent->core); 1919 } 1920 EXPORT_SYMBOL_GPL(clk_hw_get_parent_index); 1921 1922 /* 1923 * Update the orphan status of @core and all its children. 1924 */ 1925 static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan) 1926 { 1927 struct clk_core *child; 1928 1929 core->orphan = is_orphan; 1930 1931 hlist_for_each_entry(child, &core->children, child_node) 1932 clk_core_update_orphan_status(child, is_orphan); 1933 } 1934 1935 static void clk_reparent(struct clk_core *core, struct clk_core *new_parent) 1936 { 1937 bool was_orphan = core->orphan; 1938 1939 hlist_del(&core->child_node); 1940 1941 if (new_parent) { 1942 bool becomes_orphan = new_parent->orphan; 1943 1944 /* avoid duplicate POST_RATE_CHANGE notifications */ 1945 if (new_parent->new_child == core) 1946 new_parent->new_child = NULL; 1947 1948 hlist_add_head(&core->child_node, &new_parent->children); 1949 1950 if (was_orphan != becomes_orphan) 1951 clk_core_update_orphan_status(core, becomes_orphan); 1952 } else { 1953 hlist_add_head(&core->child_node, &clk_orphan_list); 1954 if (!was_orphan) 1955 clk_core_update_orphan_status(core, true); 1956 } 1957 1958 core->parent = new_parent; 1959 } 1960 1961 static struct clk_core *__clk_set_parent_before(struct clk_core *core, 1962 struct clk_core *parent) 1963 { 1964 unsigned long flags; 1965 struct clk_core *old_parent = core->parent; 1966 1967 /* 1968 * 1. enable parents for CLK_OPS_PARENT_ENABLE clock 1969 * 1970 * 2. Migrate prepare state between parents and prevent race with 1971 * clk_enable(). 1972 * 1973 * If the clock is not prepared, then a race with 1974 * clk_enable/disable() is impossible since we already have the 1975 * prepare lock (future calls to clk_enable() need to be preceded by 1976 * a clk_prepare()). 1977 * 1978 * If the clock is prepared, migrate the prepared state to the new 1979 * parent and also protect against a race with clk_enable() by 1980 * forcing the clock and the new parent on. This ensures that all 1981 * future calls to clk_enable() are practically NOPs with respect to 1982 * hardware and software states. 1983 * 1984 * See also: Comment for clk_set_parent() below. 1985 */ 1986 1987 /* enable old_parent & parent if CLK_OPS_PARENT_ENABLE is set */ 1988 if (core->flags & CLK_OPS_PARENT_ENABLE) { 1989 clk_core_prepare_enable(old_parent); 1990 clk_core_prepare_enable(parent); 1991 } 1992 1993 /* migrate prepare count if > 0 */ 1994 if (core->prepare_count) { 1995 clk_core_prepare_enable(parent); 1996 clk_core_enable_lock(core); 1997 } 1998 1999 /* update the clk tree topology */ 2000 flags = clk_enable_lock(); 2001 clk_reparent(core, parent); 2002 clk_enable_unlock(flags); 2003 2004 return old_parent; 2005 } 2006 2007 static void __clk_set_parent_after(struct clk_core *core, 2008 struct clk_core *parent, 2009 struct clk_core *old_parent) 2010 { 2011 /* 2012 * Finish the migration of prepare state and undo the changes done 2013 * for preventing a race with clk_enable(). 2014 */ 2015 if (core->prepare_count) { 2016 clk_core_disable_lock(core); 2017 clk_core_disable_unprepare(old_parent); 2018 } 2019 2020 /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */ 2021 if (core->flags & CLK_OPS_PARENT_ENABLE) { 2022 clk_core_disable_unprepare(parent); 2023 clk_core_disable_unprepare(old_parent); 2024 } 2025 } 2026 2027 static int __clk_set_parent(struct clk_core *core, struct clk_core *parent, 2028 u8 p_index) 2029 { 2030 unsigned long flags; 2031 int ret = 0; 2032 struct clk_core *old_parent; 2033 2034 old_parent = __clk_set_parent_before(core, parent); 2035 2036 trace_clk_set_parent(core, parent); 2037 2038 /* change clock input source */ 2039 if (parent && core->ops->set_parent) 2040 ret = core->ops->set_parent(core->hw, p_index); 2041 2042 trace_clk_set_parent_complete(core, parent); 2043 2044 if (ret) { 2045 flags = clk_enable_lock(); 2046 clk_reparent(core, old_parent); 2047 clk_enable_unlock(flags); 2048 2049 __clk_set_parent_after(core, old_parent, parent); 2050 2051 return ret; 2052 } 2053 2054 __clk_set_parent_after(core, parent, old_parent); 2055 2056 return 0; 2057 } 2058 2059 /** 2060 * __clk_speculate_rates 2061 * @core: first clk in the subtree 2062 * @parent_rate: the "future" rate of clk's parent 2063 * 2064 * Walks the subtree of clks starting with clk, speculating rates as it 2065 * goes and firing off PRE_RATE_CHANGE notifications as necessary. 2066 * 2067 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending 2068 * pre-rate change notifications and returns early if no clks in the 2069 * subtree have subscribed to the notifications. Note that if a clk does not 2070 * implement the .recalc_rate callback then it is assumed that the clock will 2071 * take on the rate of its parent. 2072 */ 2073 static int __clk_speculate_rates(struct clk_core *core, 2074 unsigned long parent_rate) 2075 { 2076 struct clk_core *child; 2077 unsigned long new_rate; 2078 int ret = NOTIFY_DONE; 2079 2080 lockdep_assert_held(&prepare_lock); 2081 2082 new_rate = clk_recalc(core, parent_rate); 2083 2084 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */ 2085 if (core->notifier_count) 2086 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate); 2087 2088 if (ret & NOTIFY_STOP_MASK) { 2089 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n", 2090 __func__, core->name, ret); 2091 goto out; 2092 } 2093 2094 hlist_for_each_entry(child, &core->children, child_node) { 2095 ret = __clk_speculate_rates(child, new_rate); 2096 if (ret & NOTIFY_STOP_MASK) 2097 break; 2098 } 2099 2100 out: 2101 return ret; 2102 } 2103 2104 static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate, 2105 struct clk_core *new_parent, u8 p_index) 2106 { 2107 struct clk_core *child; 2108 2109 core->new_rate = new_rate; 2110 core->new_parent = new_parent; 2111 core->new_parent_index = p_index; 2112 /* include clk in new parent's PRE_RATE_CHANGE notifications */ 2113 core->new_child = NULL; 2114 if (new_parent && new_parent != core->parent) 2115 new_parent->new_child = core; 2116 2117 hlist_for_each_entry(child, &core->children, child_node) { 2118 child->new_rate = clk_recalc(child, new_rate); 2119 clk_calc_subtree(child, child->new_rate, NULL, 0); 2120 } 2121 } 2122 2123 /* 2124 * calculate the new rates returning the topmost clock that has to be 2125 * changed. 2126 */ 2127 static struct clk_core *clk_calc_new_rates(struct clk_core *core, 2128 unsigned long rate) 2129 { 2130 struct clk_core *top = core; 2131 struct clk_core *old_parent, *parent; 2132 unsigned long best_parent_rate = 0; 2133 unsigned long new_rate; 2134 unsigned long min_rate; 2135 unsigned long max_rate; 2136 int p_index = 0; 2137 long ret; 2138 2139 /* sanity */ 2140 if (IS_ERR_OR_NULL(core)) 2141 return NULL; 2142 2143 /* save parent rate, if it exists */ 2144 parent = old_parent = core->parent; 2145 if (parent) 2146 best_parent_rate = parent->rate; 2147 2148 clk_core_get_boundaries(core, &min_rate, &max_rate); 2149 2150 /* find the closest rate and parent clk/rate */ 2151 if (clk_core_can_round(core)) { 2152 struct clk_rate_request req; 2153 2154 clk_core_init_rate_req(core, &req, rate); 2155 2156 trace_clk_rate_request_start(&req); 2157 2158 ret = clk_core_determine_round_nolock(core, &req); 2159 if (ret < 0) 2160 return NULL; 2161 2162 trace_clk_rate_request_done(&req); 2163 2164 best_parent_rate = req.best_parent_rate; 2165 new_rate = req.rate; 2166 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL; 2167 2168 if (new_rate < min_rate || new_rate > max_rate) 2169 return NULL; 2170 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) { 2171 /* pass-through clock without adjustable parent */ 2172 core->new_rate = core->rate; 2173 return NULL; 2174 } else { 2175 /* pass-through clock with adjustable parent */ 2176 top = clk_calc_new_rates(parent, rate); 2177 new_rate = parent->new_rate; 2178 goto out; 2179 } 2180 2181 /* some clocks must be gated to change parent */ 2182 if (parent != old_parent && 2183 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { 2184 pr_debug("%s: %s not gated but wants to reparent\n", 2185 __func__, core->name); 2186 return NULL; 2187 } 2188 2189 /* try finding the new parent index */ 2190 if (parent && core->num_parents > 1) { 2191 p_index = clk_fetch_parent_index(core, parent); 2192 if (p_index < 0) { 2193 pr_debug("%s: clk %s can not be parent of clk %s\n", 2194 __func__, parent->name, core->name); 2195 return NULL; 2196 } 2197 } 2198 2199 if ((core->flags & CLK_SET_RATE_PARENT) && parent && 2200 best_parent_rate != parent->rate) 2201 top = clk_calc_new_rates(parent, best_parent_rate); 2202 2203 out: 2204 clk_calc_subtree(core, new_rate, parent, p_index); 2205 2206 return top; 2207 } 2208 2209 /* 2210 * Notify about rate changes in a subtree. Always walk down the whole tree 2211 * so that in case of an error we can walk down the whole tree again and 2212 * abort the change. 2213 */ 2214 static struct clk_core *clk_propagate_rate_change(struct clk_core *core, 2215 unsigned long event) 2216 { 2217 struct clk_core *child, *tmp_clk, *fail_clk = NULL; 2218 int ret = NOTIFY_DONE; 2219 2220 if (core->rate == core->new_rate) 2221 return NULL; 2222 2223 if (core->notifier_count) { 2224 ret = __clk_notify(core, event, core->rate, core->new_rate); 2225 if (ret & NOTIFY_STOP_MASK) 2226 fail_clk = core; 2227 } 2228 2229 hlist_for_each_entry(child, &core->children, child_node) { 2230 /* Skip children who will be reparented to another clock */ 2231 if (child->new_parent && child->new_parent != core) 2232 continue; 2233 tmp_clk = clk_propagate_rate_change(child, event); 2234 if (tmp_clk) 2235 fail_clk = tmp_clk; 2236 } 2237 2238 /* handle the new child who might not be in core->children yet */ 2239 if (core->new_child) { 2240 tmp_clk = clk_propagate_rate_change(core->new_child, event); 2241 if (tmp_clk) 2242 fail_clk = tmp_clk; 2243 } 2244 2245 return fail_clk; 2246 } 2247 2248 /* 2249 * walk down a subtree and set the new rates notifying the rate 2250 * change on the way 2251 */ 2252 static void clk_change_rate(struct clk_core *core) 2253 { 2254 struct clk_core *child; 2255 struct hlist_node *tmp; 2256 unsigned long old_rate; 2257 unsigned long best_parent_rate = 0; 2258 bool skip_set_rate = false; 2259 struct clk_core *old_parent; 2260 struct clk_core *parent = NULL; 2261 2262 old_rate = core->rate; 2263 2264 if (core->new_parent) { 2265 parent = core->new_parent; 2266 best_parent_rate = core->new_parent->rate; 2267 } else if (core->parent) { 2268 parent = core->parent; 2269 best_parent_rate = core->parent->rate; 2270 } 2271 2272 if (clk_pm_runtime_get(core)) 2273 return; 2274 2275 if (core->flags & CLK_SET_RATE_UNGATE) { 2276 clk_core_prepare(core); 2277 clk_core_enable_lock(core); 2278 } 2279 2280 if (core->new_parent && core->new_parent != core->parent) { 2281 old_parent = __clk_set_parent_before(core, core->new_parent); 2282 trace_clk_set_parent(core, core->new_parent); 2283 2284 if (core->ops->set_rate_and_parent) { 2285 skip_set_rate = true; 2286 core->ops->set_rate_and_parent(core->hw, core->new_rate, 2287 best_parent_rate, 2288 core->new_parent_index); 2289 } else if (core->ops->set_parent) { 2290 core->ops->set_parent(core->hw, core->new_parent_index); 2291 } 2292 2293 trace_clk_set_parent_complete(core, core->new_parent); 2294 __clk_set_parent_after(core, core->new_parent, old_parent); 2295 } 2296 2297 if (core->flags & CLK_OPS_PARENT_ENABLE) 2298 clk_core_prepare_enable(parent); 2299 2300 trace_clk_set_rate(core, core->new_rate); 2301 2302 if (!skip_set_rate && core->ops->set_rate) 2303 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate); 2304 2305 trace_clk_set_rate_complete(core, core->new_rate); 2306 2307 core->rate = clk_recalc(core, best_parent_rate); 2308 2309 if (core->flags & CLK_SET_RATE_UNGATE) { 2310 clk_core_disable_lock(core); 2311 clk_core_unprepare(core); 2312 } 2313 2314 if (core->flags & CLK_OPS_PARENT_ENABLE) 2315 clk_core_disable_unprepare(parent); 2316 2317 if (core->notifier_count && old_rate != core->rate) 2318 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate); 2319 2320 if (core->flags & CLK_RECALC_NEW_RATES) 2321 (void)clk_calc_new_rates(core, core->new_rate); 2322 2323 /* 2324 * Use safe iteration, as change_rate can actually swap parents 2325 * for certain clock types. 2326 */ 2327 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) { 2328 /* Skip children who will be reparented to another clock */ 2329 if (child->new_parent && child->new_parent != core) 2330 continue; 2331 clk_change_rate(child); 2332 } 2333 2334 /* handle the new child who might not be in core->children yet */ 2335 if (core->new_child) 2336 clk_change_rate(core->new_child); 2337 2338 clk_pm_runtime_put(core); 2339 } 2340 2341 static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core, 2342 unsigned long req_rate) 2343 { 2344 int ret, cnt; 2345 struct clk_rate_request req; 2346 2347 lockdep_assert_held(&prepare_lock); 2348 2349 if (!core) 2350 return 0; 2351 2352 /* simulate what the rate would be if it could be freely set */ 2353 cnt = clk_core_rate_nuke_protect(core); 2354 if (cnt < 0) 2355 return cnt; 2356 2357 clk_core_init_rate_req(core, &req, req_rate); 2358 2359 trace_clk_rate_request_start(&req); 2360 2361 ret = clk_core_round_rate_nolock(core, &req); 2362 2363 trace_clk_rate_request_done(&req); 2364 2365 /* restore the protection */ 2366 clk_core_rate_restore_protect(core, cnt); 2367 2368 return ret ? 0 : req.rate; 2369 } 2370 2371 static int clk_core_set_rate_nolock(struct clk_core *core, 2372 unsigned long req_rate) 2373 { 2374 struct clk_core *top, *fail_clk; 2375 unsigned long rate; 2376 int ret; 2377 2378 if (!core) 2379 return 0; 2380 2381 rate = clk_core_req_round_rate_nolock(core, req_rate); 2382 2383 /* bail early if nothing to do */ 2384 if (rate == clk_core_get_rate_nolock(core)) 2385 return 0; 2386 2387 /* fail on a direct rate set of a protected provider */ 2388 if (clk_core_rate_is_protected(core)) 2389 return -EBUSY; 2390 2391 /* calculate new rates and get the topmost changed clock */ 2392 top = clk_calc_new_rates(core, req_rate); 2393 if (!top) 2394 return -EINVAL; 2395 2396 ret = clk_pm_runtime_get(core); 2397 if (ret) 2398 return ret; 2399 2400 /* notify that we are about to change rates */ 2401 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); 2402 if (fail_clk) { 2403 pr_debug("%s: failed to set %s rate\n", __func__, 2404 fail_clk->name); 2405 clk_propagate_rate_change(top, ABORT_RATE_CHANGE); 2406 ret = -EBUSY; 2407 goto err; 2408 } 2409 2410 /* change the rates */ 2411 clk_change_rate(top); 2412 2413 core->req_rate = req_rate; 2414 err: 2415 clk_pm_runtime_put(core); 2416 2417 return ret; 2418 } 2419 2420 /** 2421 * clk_set_rate - specify a new rate for clk 2422 * @clk: the clk whose rate is being changed 2423 * @rate: the new rate for clk 2424 * 2425 * In the simplest case clk_set_rate will only adjust the rate of clk. 2426 * 2427 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to 2428 * propagate up to clk's parent; whether or not this happens depends on the 2429 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged 2430 * after calling .round_rate then upstream parent propagation is ignored. If 2431 * *parent_rate comes back with a new rate for clk's parent then we propagate 2432 * up to clk's parent and set its rate. Upward propagation will continue 2433 * until either a clk does not support the CLK_SET_RATE_PARENT flag or 2434 * .round_rate stops requesting changes to clk's parent_rate. 2435 * 2436 * Rate changes are accomplished via tree traversal that also recalculates the 2437 * rates for the clocks and fires off POST_RATE_CHANGE notifiers. 2438 * 2439 * Returns 0 on success, -EERROR otherwise. 2440 */ 2441 int clk_set_rate(struct clk *clk, unsigned long rate) 2442 { 2443 int ret; 2444 2445 if (!clk) 2446 return 0; 2447 2448 /* prevent racing with updates to the clock topology */ 2449 clk_prepare_lock(); 2450 2451 if (clk->exclusive_count) 2452 clk_core_rate_unprotect(clk->core); 2453 2454 ret = clk_core_set_rate_nolock(clk->core, rate); 2455 2456 if (clk->exclusive_count) 2457 clk_core_rate_protect(clk->core); 2458 2459 clk_prepare_unlock(); 2460 2461 return ret; 2462 } 2463 EXPORT_SYMBOL_GPL(clk_set_rate); 2464 2465 /** 2466 * clk_set_rate_exclusive - specify a new rate and get exclusive control 2467 * @clk: the clk whose rate is being changed 2468 * @rate: the new rate for clk 2469 * 2470 * This is a combination of clk_set_rate() and clk_rate_exclusive_get() 2471 * within a critical section 2472 * 2473 * This can be used initially to ensure that at least 1 consumer is 2474 * satisfied when several consumers are competing for exclusivity over the 2475 * same clock provider. 2476 * 2477 * The exclusivity is not applied if setting the rate failed. 2478 * 2479 * Calls to clk_rate_exclusive_get() should be balanced with calls to 2480 * clk_rate_exclusive_put(). 2481 * 2482 * Returns 0 on success, -EERROR otherwise. 2483 */ 2484 int clk_set_rate_exclusive(struct clk *clk, unsigned long rate) 2485 { 2486 int ret; 2487 2488 if (!clk) 2489 return 0; 2490 2491 /* prevent racing with updates to the clock topology */ 2492 clk_prepare_lock(); 2493 2494 /* 2495 * The temporary protection removal is not here, on purpose 2496 * This function is meant to be used instead of clk_rate_protect, 2497 * so before the consumer code path protect the clock provider 2498 */ 2499 2500 ret = clk_core_set_rate_nolock(clk->core, rate); 2501 if (!ret) { 2502 clk_core_rate_protect(clk->core); 2503 clk->exclusive_count++; 2504 } 2505 2506 clk_prepare_unlock(); 2507 2508 return ret; 2509 } 2510 EXPORT_SYMBOL_GPL(clk_set_rate_exclusive); 2511 2512 static int clk_set_rate_range_nolock(struct clk *clk, 2513 unsigned long min, 2514 unsigned long max) 2515 { 2516 int ret = 0; 2517 unsigned long old_min, old_max, rate; 2518 2519 lockdep_assert_held(&prepare_lock); 2520 2521 if (!clk) 2522 return 0; 2523 2524 trace_clk_set_rate_range(clk->core, min, max); 2525 2526 if (min > max) { 2527 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n", 2528 __func__, clk->core->name, clk->dev_id, clk->con_id, 2529 min, max); 2530 return -EINVAL; 2531 } 2532 2533 if (clk->exclusive_count) 2534 clk_core_rate_unprotect(clk->core); 2535 2536 /* Save the current values in case we need to rollback the change */ 2537 old_min = clk->min_rate; 2538 old_max = clk->max_rate; 2539 clk->min_rate = min; 2540 clk->max_rate = max; 2541 2542 if (!clk_core_check_boundaries(clk->core, min, max)) { 2543 ret = -EINVAL; 2544 goto out; 2545 } 2546 2547 rate = clk->core->req_rate; 2548 if (clk->core->flags & CLK_GET_RATE_NOCACHE) 2549 rate = clk_core_get_rate_recalc(clk->core); 2550 2551 /* 2552 * Since the boundaries have been changed, let's give the 2553 * opportunity to the provider to adjust the clock rate based on 2554 * the new boundaries. 2555 * 2556 * We also need to handle the case where the clock is currently 2557 * outside of the boundaries. Clamping the last requested rate 2558 * to the current minimum and maximum will also handle this. 2559 * 2560 * FIXME: 2561 * There is a catch. It may fail for the usual reason (clock 2562 * broken, clock protected, etc) but also because: 2563 * - round_rate() was not favorable and fell on the wrong 2564 * side of the boundary 2565 * - the determine_rate() callback does not really check for 2566 * this corner case when determining the rate 2567 */ 2568 rate = clamp(rate, min, max); 2569 ret = clk_core_set_rate_nolock(clk->core, rate); 2570 if (ret) { 2571 /* rollback the changes */ 2572 clk->min_rate = old_min; 2573 clk->max_rate = old_max; 2574 } 2575 2576 out: 2577 if (clk->exclusive_count) 2578 clk_core_rate_protect(clk->core); 2579 2580 return ret; 2581 } 2582 2583 /** 2584 * clk_set_rate_range - set a rate range for a clock source 2585 * @clk: clock source 2586 * @min: desired minimum clock rate in Hz, inclusive 2587 * @max: desired maximum clock rate in Hz, inclusive 2588 * 2589 * Return: 0 for success or negative errno on failure. 2590 */ 2591 int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) 2592 { 2593 int ret; 2594 2595 if (!clk) 2596 return 0; 2597 2598 clk_prepare_lock(); 2599 2600 ret = clk_set_rate_range_nolock(clk, min, max); 2601 2602 clk_prepare_unlock(); 2603 2604 return ret; 2605 } 2606 EXPORT_SYMBOL_GPL(clk_set_rate_range); 2607 2608 /** 2609 * clk_set_min_rate - set a minimum clock rate for a clock source 2610 * @clk: clock source 2611 * @rate: desired minimum clock rate in Hz, inclusive 2612 * 2613 * Returns success (0) or negative errno. 2614 */ 2615 int clk_set_min_rate(struct clk *clk, unsigned long rate) 2616 { 2617 if (!clk) 2618 return 0; 2619 2620 trace_clk_set_min_rate(clk->core, rate); 2621 2622 return clk_set_rate_range(clk, rate, clk->max_rate); 2623 } 2624 EXPORT_SYMBOL_GPL(clk_set_min_rate); 2625 2626 /** 2627 * clk_set_max_rate - set a maximum clock rate for a clock source 2628 * @clk: clock source 2629 * @rate: desired maximum clock rate in Hz, inclusive 2630 * 2631 * Returns success (0) or negative errno. 2632 */ 2633 int clk_set_max_rate(struct clk *clk, unsigned long rate) 2634 { 2635 if (!clk) 2636 return 0; 2637 2638 trace_clk_set_max_rate(clk->core, rate); 2639 2640 return clk_set_rate_range(clk, clk->min_rate, rate); 2641 } 2642 EXPORT_SYMBOL_GPL(clk_set_max_rate); 2643 2644 /** 2645 * clk_get_parent - return the parent of a clk 2646 * @clk: the clk whose parent gets returned 2647 * 2648 * Simply returns clk->parent. Returns NULL if clk is NULL. 2649 */ 2650 struct clk *clk_get_parent(struct clk *clk) 2651 { 2652 struct clk *parent; 2653 2654 if (!clk) 2655 return NULL; 2656 2657 clk_prepare_lock(); 2658 /* TODO: Create a per-user clk and change callers to call clk_put */ 2659 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk; 2660 clk_prepare_unlock(); 2661 2662 return parent; 2663 } 2664 EXPORT_SYMBOL_GPL(clk_get_parent); 2665 2666 static struct clk_core *__clk_init_parent(struct clk_core *core) 2667 { 2668 u8 index = 0; 2669 2670 if (core->num_parents > 1 && core->ops->get_parent) 2671 index = core->ops->get_parent(core->hw); 2672 2673 return clk_core_get_parent_by_index(core, index); 2674 } 2675 2676 static void clk_core_reparent(struct clk_core *core, 2677 struct clk_core *new_parent) 2678 { 2679 clk_reparent(core, new_parent); 2680 __clk_recalc_accuracies(core); 2681 __clk_recalc_rates(core, true, POST_RATE_CHANGE); 2682 } 2683 2684 void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent) 2685 { 2686 if (!hw) 2687 return; 2688 2689 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core); 2690 } 2691 2692 /** 2693 * clk_has_parent - check if a clock is a possible parent for another 2694 * @clk: clock source 2695 * @parent: parent clock source 2696 * 2697 * This function can be used in drivers that need to check that a clock can be 2698 * the parent of another without actually changing the parent. 2699 * 2700 * Returns true if @parent is a possible parent for @clk, false otherwise. 2701 */ 2702 bool clk_has_parent(const struct clk *clk, const struct clk *parent) 2703 { 2704 /* NULL clocks should be nops, so return success if either is NULL. */ 2705 if (!clk || !parent) 2706 return true; 2707 2708 return clk_core_has_parent(clk->core, parent->core); 2709 } 2710 EXPORT_SYMBOL_GPL(clk_has_parent); 2711 2712 static int clk_core_set_parent_nolock(struct clk_core *core, 2713 struct clk_core *parent) 2714 { 2715 int ret = 0; 2716 int p_index = 0; 2717 unsigned long p_rate = 0; 2718 2719 lockdep_assert_held(&prepare_lock); 2720 2721 if (!core) 2722 return 0; 2723 2724 if (core->parent == parent) 2725 return 0; 2726 2727 /* verify ops for multi-parent clks */ 2728 if (core->num_parents > 1 && !core->ops->set_parent) 2729 return -EPERM; 2730 2731 /* check that we are allowed to re-parent if the clock is in use */ 2732 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) 2733 return -EBUSY; 2734 2735 if (clk_core_rate_is_protected(core)) 2736 return -EBUSY; 2737 2738 /* try finding the new parent index */ 2739 if (parent) { 2740 p_index = clk_fetch_parent_index(core, parent); 2741 if (p_index < 0) { 2742 pr_debug("%s: clk %s can not be parent of clk %s\n", 2743 __func__, parent->name, core->name); 2744 return p_index; 2745 } 2746 p_rate = parent->rate; 2747 } 2748 2749 ret = clk_pm_runtime_get(core); 2750 if (ret) 2751 return ret; 2752 2753 /* propagate PRE_RATE_CHANGE notifications */ 2754 ret = __clk_speculate_rates(core, p_rate); 2755 2756 /* abort if a driver objects */ 2757 if (ret & NOTIFY_STOP_MASK) 2758 goto runtime_put; 2759 2760 /* do the re-parent */ 2761 ret = __clk_set_parent(core, parent, p_index); 2762 2763 /* propagate rate an accuracy recalculation accordingly */ 2764 if (ret) { 2765 __clk_recalc_rates(core, true, ABORT_RATE_CHANGE); 2766 } else { 2767 __clk_recalc_rates(core, true, POST_RATE_CHANGE); 2768 __clk_recalc_accuracies(core); 2769 } 2770 2771 runtime_put: 2772 clk_pm_runtime_put(core); 2773 2774 return ret; 2775 } 2776 2777 int clk_hw_set_parent(struct clk_hw *hw, struct clk_hw *parent) 2778 { 2779 return clk_core_set_parent_nolock(hw->core, parent->core); 2780 } 2781 EXPORT_SYMBOL_GPL(clk_hw_set_parent); 2782 2783 /** 2784 * clk_set_parent - switch the parent of a mux clk 2785 * @clk: the mux clk whose input we are switching 2786 * @parent: the new input to clk 2787 * 2788 * Re-parent clk to use parent as its new input source. If clk is in 2789 * prepared state, the clk will get enabled for the duration of this call. If 2790 * that's not acceptable for a specific clk (Eg: the consumer can't handle 2791 * that, the reparenting is glitchy in hardware, etc), use the 2792 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared. 2793 * 2794 * After successfully changing clk's parent clk_set_parent will update the 2795 * clk topology, sysfs topology and propagate rate recalculation via 2796 * __clk_recalc_rates. 2797 * 2798 * Returns 0 on success, -EERROR otherwise. 2799 */ 2800 int clk_set_parent(struct clk *clk, struct clk *parent) 2801 { 2802 int ret; 2803 2804 if (!clk) 2805 return 0; 2806 2807 clk_prepare_lock(); 2808 2809 if (clk->exclusive_count) 2810 clk_core_rate_unprotect(clk->core); 2811 2812 ret = clk_core_set_parent_nolock(clk->core, 2813 parent ? parent->core : NULL); 2814 2815 if (clk->exclusive_count) 2816 clk_core_rate_protect(clk->core); 2817 2818 clk_prepare_unlock(); 2819 2820 return ret; 2821 } 2822 EXPORT_SYMBOL_GPL(clk_set_parent); 2823 2824 static int clk_core_set_phase_nolock(struct clk_core *core, int degrees) 2825 { 2826 int ret = -EINVAL; 2827 2828 lockdep_assert_held(&prepare_lock); 2829 2830 if (!core) 2831 return 0; 2832 2833 if (clk_core_rate_is_protected(core)) 2834 return -EBUSY; 2835 2836 trace_clk_set_phase(core, degrees); 2837 2838 if (core->ops->set_phase) { 2839 ret = core->ops->set_phase(core->hw, degrees); 2840 if (!ret) 2841 core->phase = degrees; 2842 } 2843 2844 trace_clk_set_phase_complete(core, degrees); 2845 2846 return ret; 2847 } 2848 2849 /** 2850 * clk_set_phase - adjust the phase shift of a clock signal 2851 * @clk: clock signal source 2852 * @degrees: number of degrees the signal is shifted 2853 * 2854 * Shifts the phase of a clock signal by the specified 2855 * degrees. Returns 0 on success, -EERROR otherwise. 2856 * 2857 * This function makes no distinction about the input or reference 2858 * signal that we adjust the clock signal phase against. For example 2859 * phase locked-loop clock signal generators we may shift phase with 2860 * respect to feedback clock signal input, but for other cases the 2861 * clock phase may be shifted with respect to some other, unspecified 2862 * signal. 2863 * 2864 * Additionally the concept of phase shift does not propagate through 2865 * the clock tree hierarchy, which sets it apart from clock rates and 2866 * clock accuracy. A parent clock phase attribute does not have an 2867 * impact on the phase attribute of a child clock. 2868 */ 2869 int clk_set_phase(struct clk *clk, int degrees) 2870 { 2871 int ret; 2872 2873 if (!clk) 2874 return 0; 2875 2876 /* sanity check degrees */ 2877 degrees %= 360; 2878 if (degrees < 0) 2879 degrees += 360; 2880 2881 clk_prepare_lock(); 2882 2883 if (clk->exclusive_count) 2884 clk_core_rate_unprotect(clk->core); 2885 2886 ret = clk_core_set_phase_nolock(clk->core, degrees); 2887 2888 if (clk->exclusive_count) 2889 clk_core_rate_protect(clk->core); 2890 2891 clk_prepare_unlock(); 2892 2893 return ret; 2894 } 2895 EXPORT_SYMBOL_GPL(clk_set_phase); 2896 2897 static int clk_core_get_phase(struct clk_core *core) 2898 { 2899 int ret; 2900 2901 lockdep_assert_held(&prepare_lock); 2902 if (!core->ops->get_phase) 2903 return 0; 2904 2905 /* Always try to update cached phase if possible */ 2906 ret = core->ops->get_phase(core->hw); 2907 if (ret >= 0) 2908 core->phase = ret; 2909 2910 return ret; 2911 } 2912 2913 /** 2914 * clk_get_phase - return the phase shift of a clock signal 2915 * @clk: clock signal source 2916 * 2917 * Returns the phase shift of a clock node in degrees, otherwise returns 2918 * -EERROR. 2919 */ 2920 int clk_get_phase(struct clk *clk) 2921 { 2922 int ret; 2923 2924 if (!clk) 2925 return 0; 2926 2927 clk_prepare_lock(); 2928 ret = clk_core_get_phase(clk->core); 2929 clk_prepare_unlock(); 2930 2931 return ret; 2932 } 2933 EXPORT_SYMBOL_GPL(clk_get_phase); 2934 2935 static void clk_core_reset_duty_cycle_nolock(struct clk_core *core) 2936 { 2937 /* Assume a default value of 50% */ 2938 core->duty.num = 1; 2939 core->duty.den = 2; 2940 } 2941 2942 static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core); 2943 2944 static int clk_core_update_duty_cycle_nolock(struct clk_core *core) 2945 { 2946 struct clk_duty *duty = &core->duty; 2947 int ret = 0; 2948 2949 if (!core->ops->get_duty_cycle) 2950 return clk_core_update_duty_cycle_parent_nolock(core); 2951 2952 ret = core->ops->get_duty_cycle(core->hw, duty); 2953 if (ret) 2954 goto reset; 2955 2956 /* Don't trust the clock provider too much */ 2957 if (duty->den == 0 || duty->num > duty->den) { 2958 ret = -EINVAL; 2959 goto reset; 2960 } 2961 2962 return 0; 2963 2964 reset: 2965 clk_core_reset_duty_cycle_nolock(core); 2966 return ret; 2967 } 2968 2969 static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core) 2970 { 2971 int ret = 0; 2972 2973 if (core->parent && 2974 core->flags & CLK_DUTY_CYCLE_PARENT) { 2975 ret = clk_core_update_duty_cycle_nolock(core->parent); 2976 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty)); 2977 } else { 2978 clk_core_reset_duty_cycle_nolock(core); 2979 } 2980 2981 return ret; 2982 } 2983 2984 static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core, 2985 struct clk_duty *duty); 2986 2987 static int clk_core_set_duty_cycle_nolock(struct clk_core *core, 2988 struct clk_duty *duty) 2989 { 2990 int ret; 2991 2992 lockdep_assert_held(&prepare_lock); 2993 2994 if (clk_core_rate_is_protected(core)) 2995 return -EBUSY; 2996 2997 trace_clk_set_duty_cycle(core, duty); 2998 2999 if (!core->ops->set_duty_cycle) 3000 return clk_core_set_duty_cycle_parent_nolock(core, duty); 3001 3002 ret = core->ops->set_duty_cycle(core->hw, duty); 3003 if (!ret) 3004 memcpy(&core->duty, duty, sizeof(*duty)); 3005 3006 trace_clk_set_duty_cycle_complete(core, duty); 3007 3008 return ret; 3009 } 3010 3011 static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core, 3012 struct clk_duty *duty) 3013 { 3014 int ret = 0; 3015 3016 if (core->parent && 3017 core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) { 3018 ret = clk_core_set_duty_cycle_nolock(core->parent, duty); 3019 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty)); 3020 } 3021 3022 return ret; 3023 } 3024 3025 /** 3026 * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal 3027 * @clk: clock signal source 3028 * @num: numerator of the duty cycle ratio to be applied 3029 * @den: denominator of the duty cycle ratio to be applied 3030 * 3031 * Apply the duty cycle ratio if the ratio is valid and the clock can 3032 * perform this operation 3033 * 3034 * Returns (0) on success, a negative errno otherwise. 3035 */ 3036 int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den) 3037 { 3038 int ret; 3039 struct clk_duty duty; 3040 3041 if (!clk) 3042 return 0; 3043 3044 /* sanity check the ratio */ 3045 if (den == 0 || num > den) 3046 return -EINVAL; 3047 3048 duty.num = num; 3049 duty.den = den; 3050 3051 clk_prepare_lock(); 3052 3053 if (clk->exclusive_count) 3054 clk_core_rate_unprotect(clk->core); 3055 3056 ret = clk_core_set_duty_cycle_nolock(clk->core, &duty); 3057 3058 if (clk->exclusive_count) 3059 clk_core_rate_protect(clk->core); 3060 3061 clk_prepare_unlock(); 3062 3063 return ret; 3064 } 3065 EXPORT_SYMBOL_GPL(clk_set_duty_cycle); 3066 3067 static int clk_core_get_scaled_duty_cycle(struct clk_core *core, 3068 unsigned int scale) 3069 { 3070 struct clk_duty *duty = &core->duty; 3071 int ret; 3072 3073 clk_prepare_lock(); 3074 3075 ret = clk_core_update_duty_cycle_nolock(core); 3076 if (!ret) 3077 ret = mult_frac(scale, duty->num, duty->den); 3078 3079 clk_prepare_unlock(); 3080 3081 return ret; 3082 } 3083 3084 /** 3085 * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal 3086 * @clk: clock signal source 3087 * @scale: scaling factor to be applied to represent the ratio as an integer 3088 * 3089 * Returns the duty cycle ratio of a clock node multiplied by the provided 3090 * scaling factor, or negative errno on error. 3091 */ 3092 int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale) 3093 { 3094 if (!clk) 3095 return 0; 3096 3097 return clk_core_get_scaled_duty_cycle(clk->core, scale); 3098 } 3099 EXPORT_SYMBOL_GPL(clk_get_scaled_duty_cycle); 3100 3101 /** 3102 * clk_is_match - check if two clk's point to the same hardware clock 3103 * @p: clk compared against q 3104 * @q: clk compared against p 3105 * 3106 * Returns true if the two struct clk pointers both point to the same hardware 3107 * clock node. Put differently, returns true if struct clk *p and struct clk *q 3108 * share the same struct clk_core object. 3109 * 3110 * Returns false otherwise. Note that two NULL clks are treated as matching. 3111 */ 3112 bool clk_is_match(const struct clk *p, const struct clk *q) 3113 { 3114 /* trivial case: identical struct clk's or both NULL */ 3115 if (p == q) 3116 return true; 3117 3118 /* true if clk->core pointers match. Avoid dereferencing garbage */ 3119 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q)) 3120 if (p->core == q->core) 3121 return true; 3122 3123 return false; 3124 } 3125 EXPORT_SYMBOL_GPL(clk_is_match); 3126 3127 /*** debugfs support ***/ 3128 3129 #ifdef CONFIG_DEBUG_FS 3130 #include <linux/debugfs.h> 3131 3132 static struct dentry *rootdir; 3133 static int inited = 0; 3134 static DEFINE_MUTEX(clk_debug_lock); 3135 static HLIST_HEAD(clk_debug_list); 3136 3137 static struct hlist_head *orphan_list[] = { 3138 &clk_orphan_list, 3139 NULL, 3140 }; 3141 3142 static void clk_summary_show_one(struct seq_file *s, struct clk_core *c, 3143 int level) 3144 { 3145 int phase; 3146 3147 seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu ", 3148 level * 3 + 1, "", 3149 30 - level * 3, c->name, 3150 c->enable_count, c->prepare_count, c->protect_count, 3151 clk_core_get_rate_recalc(c), 3152 clk_core_get_accuracy_recalc(c)); 3153 3154 phase = clk_core_get_phase(c); 3155 if (phase >= 0) 3156 seq_printf(s, "%5d", phase); 3157 else 3158 seq_puts(s, "-----"); 3159 3160 seq_printf(s, " %6d", clk_core_get_scaled_duty_cycle(c, 100000)); 3161 3162 if (c->ops->is_enabled) 3163 seq_printf(s, " %9c\n", clk_core_is_enabled(c) ? 'Y' : 'N'); 3164 else if (!c->ops->enable) 3165 seq_printf(s, " %9c\n", 'Y'); 3166 else 3167 seq_printf(s, " %9c\n", '?'); 3168 } 3169 3170 static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c, 3171 int level) 3172 { 3173 struct clk_core *child; 3174 3175 clk_pm_runtime_get(c); 3176 clk_summary_show_one(s, c, level); 3177 clk_pm_runtime_put(c); 3178 3179 hlist_for_each_entry(child, &c->children, child_node) 3180 clk_summary_show_subtree(s, child, level + 1); 3181 } 3182 3183 static int clk_summary_show(struct seq_file *s, void *data) 3184 { 3185 struct clk_core *c; 3186 struct hlist_head **lists = (struct hlist_head **)s->private; 3187 3188 seq_puts(s, " enable prepare protect duty hardware\n"); 3189 seq_puts(s, " clock count count count rate accuracy phase cycle enable\n"); 3190 seq_puts(s, "-------------------------------------------------------------------------------------------------------\n"); 3191 3192 clk_prepare_lock(); 3193 3194 for (; *lists; lists++) 3195 hlist_for_each_entry(c, *lists, child_node) 3196 clk_summary_show_subtree(s, c, 0); 3197 3198 clk_prepare_unlock(); 3199 3200 return 0; 3201 } 3202 DEFINE_SHOW_ATTRIBUTE(clk_summary); 3203 3204 static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level) 3205 { 3206 int phase; 3207 unsigned long min_rate, max_rate; 3208 3209 clk_core_get_boundaries(c, &min_rate, &max_rate); 3210 3211 /* This should be JSON format, i.e. elements separated with a comma */ 3212 seq_printf(s, "\"%s\": { ", c->name); 3213 seq_printf(s, "\"enable_count\": %d,", c->enable_count); 3214 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); 3215 seq_printf(s, "\"protect_count\": %d,", c->protect_count); 3216 seq_printf(s, "\"rate\": %lu,", clk_core_get_rate_recalc(c)); 3217 seq_printf(s, "\"min_rate\": %lu,", min_rate); 3218 seq_printf(s, "\"max_rate\": %lu,", max_rate); 3219 seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy_recalc(c)); 3220 phase = clk_core_get_phase(c); 3221 if (phase >= 0) 3222 seq_printf(s, "\"phase\": %d,", phase); 3223 seq_printf(s, "\"duty_cycle\": %u", 3224 clk_core_get_scaled_duty_cycle(c, 100000)); 3225 } 3226 3227 static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level) 3228 { 3229 struct clk_core *child; 3230 3231 clk_dump_one(s, c, level); 3232 3233 hlist_for_each_entry(child, &c->children, child_node) { 3234 seq_putc(s, ','); 3235 clk_dump_subtree(s, child, level + 1); 3236 } 3237 3238 seq_putc(s, '}'); 3239 } 3240 3241 static int clk_dump_show(struct seq_file *s, void *data) 3242 { 3243 struct clk_core *c; 3244 bool first_node = true; 3245 struct hlist_head **lists = (struct hlist_head **)s->private; 3246 3247 seq_putc(s, '{'); 3248 clk_prepare_lock(); 3249 3250 for (; *lists; lists++) { 3251 hlist_for_each_entry(c, *lists, child_node) { 3252 if (!first_node) 3253 seq_putc(s, ','); 3254 first_node = false; 3255 clk_dump_subtree(s, c, 0); 3256 } 3257 } 3258 3259 clk_prepare_unlock(); 3260 3261 seq_puts(s, "}\n"); 3262 return 0; 3263 } 3264 DEFINE_SHOW_ATTRIBUTE(clk_dump); 3265 3266 #undef CLOCK_ALLOW_WRITE_DEBUGFS 3267 #ifdef CLOCK_ALLOW_WRITE_DEBUGFS 3268 /* 3269 * This can be dangerous, therefore don't provide any real compile time 3270 * configuration option for this feature. 3271 * People who want to use this will need to modify the source code directly. 3272 */ 3273 static int clk_rate_set(void *data, u64 val) 3274 { 3275 struct clk_core *core = data; 3276 int ret; 3277 3278 clk_prepare_lock(); 3279 ret = clk_core_set_rate_nolock(core, val); 3280 clk_prepare_unlock(); 3281 3282 return ret; 3283 } 3284 3285 #define clk_rate_mode 0644 3286 3287 static int clk_prepare_enable_set(void *data, u64 val) 3288 { 3289 struct clk_core *core = data; 3290 int ret = 0; 3291 3292 if (val) 3293 ret = clk_prepare_enable(core->hw->clk); 3294 else 3295 clk_disable_unprepare(core->hw->clk); 3296 3297 return ret; 3298 } 3299 3300 static int clk_prepare_enable_get(void *data, u64 *val) 3301 { 3302 struct clk_core *core = data; 3303 3304 *val = core->enable_count && core->prepare_count; 3305 return 0; 3306 } 3307 3308 DEFINE_DEBUGFS_ATTRIBUTE(clk_prepare_enable_fops, clk_prepare_enable_get, 3309 clk_prepare_enable_set, "%llu\n"); 3310 3311 #else 3312 #define clk_rate_set NULL 3313 #define clk_rate_mode 0444 3314 #endif 3315 3316 static int clk_rate_get(void *data, u64 *val) 3317 { 3318 struct clk_core *core = data; 3319 3320 clk_prepare_lock(); 3321 *val = clk_core_get_rate_recalc(core); 3322 clk_prepare_unlock(); 3323 3324 return 0; 3325 } 3326 3327 DEFINE_DEBUGFS_ATTRIBUTE(clk_rate_fops, clk_rate_get, clk_rate_set, "%llu\n"); 3328 3329 static const struct { 3330 unsigned long flag; 3331 const char *name; 3332 } clk_flags[] = { 3333 #define ENTRY(f) { f, #f } 3334 ENTRY(CLK_SET_RATE_GATE), 3335 ENTRY(CLK_SET_PARENT_GATE), 3336 ENTRY(CLK_SET_RATE_PARENT), 3337 ENTRY(CLK_IGNORE_UNUSED), 3338 ENTRY(CLK_GET_RATE_NOCACHE), 3339 ENTRY(CLK_SET_RATE_NO_REPARENT), 3340 ENTRY(CLK_GET_ACCURACY_NOCACHE), 3341 ENTRY(CLK_RECALC_NEW_RATES), 3342 ENTRY(CLK_SET_RATE_UNGATE), 3343 ENTRY(CLK_IS_CRITICAL), 3344 ENTRY(CLK_OPS_PARENT_ENABLE), 3345 ENTRY(CLK_DUTY_CYCLE_PARENT), 3346 #undef ENTRY 3347 }; 3348 3349 static int clk_flags_show(struct seq_file *s, void *data) 3350 { 3351 struct clk_core *core = s->private; 3352 unsigned long flags = core->flags; 3353 unsigned int i; 3354 3355 for (i = 0; flags && i < ARRAY_SIZE(clk_flags); i++) { 3356 if (flags & clk_flags[i].flag) { 3357 seq_printf(s, "%s\n", clk_flags[i].name); 3358 flags &= ~clk_flags[i].flag; 3359 } 3360 } 3361 if (flags) { 3362 /* Unknown flags */ 3363 seq_printf(s, "0x%lx\n", flags); 3364 } 3365 3366 return 0; 3367 } 3368 DEFINE_SHOW_ATTRIBUTE(clk_flags); 3369 3370 static void possible_parent_show(struct seq_file *s, struct clk_core *core, 3371 unsigned int i, char terminator) 3372 { 3373 struct clk_core *parent; 3374 3375 /* 3376 * Go through the following options to fetch a parent's name. 3377 * 3378 * 1. Fetch the registered parent clock and use its name 3379 * 2. Use the global (fallback) name if specified 3380 * 3. Use the local fw_name if provided 3381 * 4. Fetch parent clock's clock-output-name if DT index was set 3382 * 3383 * This may still fail in some cases, such as when the parent is 3384 * specified directly via a struct clk_hw pointer, but it isn't 3385 * registered (yet). 3386 */ 3387 parent = clk_core_get_parent_by_index(core, i); 3388 if (parent) 3389 seq_puts(s, parent->name); 3390 else if (core->parents[i].name) 3391 seq_puts(s, core->parents[i].name); 3392 else if (core->parents[i].fw_name) 3393 seq_printf(s, "<%s>(fw)", core->parents[i].fw_name); 3394 else if (core->parents[i].index >= 0) 3395 seq_puts(s, 3396 of_clk_get_parent_name(core->of_node, 3397 core->parents[i].index)); 3398 else 3399 seq_puts(s, "(missing)"); 3400 3401 seq_putc(s, terminator); 3402 } 3403 3404 static int possible_parents_show(struct seq_file *s, void *data) 3405 { 3406 struct clk_core *core = s->private; 3407 int i; 3408 3409 for (i = 0; i < core->num_parents - 1; i++) 3410 possible_parent_show(s, core, i, ' '); 3411 3412 possible_parent_show(s, core, i, '\n'); 3413 3414 return 0; 3415 } 3416 DEFINE_SHOW_ATTRIBUTE(possible_parents); 3417 3418 static int current_parent_show(struct seq_file *s, void *data) 3419 { 3420 struct clk_core *core = s->private; 3421 3422 if (core->parent) 3423 seq_printf(s, "%s\n", core->parent->name); 3424 3425 return 0; 3426 } 3427 DEFINE_SHOW_ATTRIBUTE(current_parent); 3428 3429 #ifdef CLOCK_ALLOW_WRITE_DEBUGFS 3430 static ssize_t current_parent_write(struct file *file, const char __user *ubuf, 3431 size_t count, loff_t *ppos) 3432 { 3433 struct seq_file *s = file->private_data; 3434 struct clk_core *core = s->private; 3435 struct clk_core *parent; 3436 u8 idx; 3437 int err; 3438 3439 err = kstrtou8_from_user(ubuf, count, 0, &idx); 3440 if (err < 0) 3441 return err; 3442 3443 parent = clk_core_get_parent_by_index(core, idx); 3444 if (!parent) 3445 return -ENOENT; 3446 3447 clk_prepare_lock(); 3448 err = clk_core_set_parent_nolock(core, parent); 3449 clk_prepare_unlock(); 3450 if (err) 3451 return err; 3452 3453 return count; 3454 } 3455 3456 static const struct file_operations current_parent_rw_fops = { 3457 .open = current_parent_open, 3458 .write = current_parent_write, 3459 .read = seq_read, 3460 .llseek = seq_lseek, 3461 .release = single_release, 3462 }; 3463 #endif 3464 3465 static int clk_duty_cycle_show(struct seq_file *s, void *data) 3466 { 3467 struct clk_core *core = s->private; 3468 struct clk_duty *duty = &core->duty; 3469 3470 seq_printf(s, "%u/%u\n", duty->num, duty->den); 3471 3472 return 0; 3473 } 3474 DEFINE_SHOW_ATTRIBUTE(clk_duty_cycle); 3475 3476 static int clk_min_rate_show(struct seq_file *s, void *data) 3477 { 3478 struct clk_core *core = s->private; 3479 unsigned long min_rate, max_rate; 3480 3481 clk_prepare_lock(); 3482 clk_core_get_boundaries(core, &min_rate, &max_rate); 3483 clk_prepare_unlock(); 3484 seq_printf(s, "%lu\n", min_rate); 3485 3486 return 0; 3487 } 3488 DEFINE_SHOW_ATTRIBUTE(clk_min_rate); 3489 3490 static int clk_max_rate_show(struct seq_file *s, void *data) 3491 { 3492 struct clk_core *core = s->private; 3493 unsigned long min_rate, max_rate; 3494 3495 clk_prepare_lock(); 3496 clk_core_get_boundaries(core, &min_rate, &max_rate); 3497 clk_prepare_unlock(); 3498 seq_printf(s, "%lu\n", max_rate); 3499 3500 return 0; 3501 } 3502 DEFINE_SHOW_ATTRIBUTE(clk_max_rate); 3503 3504 static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry) 3505 { 3506 struct dentry *root; 3507 3508 if (!core || !pdentry) 3509 return; 3510 3511 root = debugfs_create_dir(core->name, pdentry); 3512 core->dentry = root; 3513 3514 debugfs_create_file("clk_rate", clk_rate_mode, root, core, 3515 &clk_rate_fops); 3516 debugfs_create_file("clk_min_rate", 0444, root, core, &clk_min_rate_fops); 3517 debugfs_create_file("clk_max_rate", 0444, root, core, &clk_max_rate_fops); 3518 debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy); 3519 debugfs_create_u32("clk_phase", 0444, root, &core->phase); 3520 debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops); 3521 debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count); 3522 debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count); 3523 debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count); 3524 debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count); 3525 debugfs_create_file("clk_duty_cycle", 0444, root, core, 3526 &clk_duty_cycle_fops); 3527 #ifdef CLOCK_ALLOW_WRITE_DEBUGFS 3528 debugfs_create_file("clk_prepare_enable", 0644, root, core, 3529 &clk_prepare_enable_fops); 3530 3531 if (core->num_parents > 1) 3532 debugfs_create_file("clk_parent", 0644, root, core, 3533 ¤t_parent_rw_fops); 3534 else 3535 #endif 3536 if (core->num_parents > 0) 3537 debugfs_create_file("clk_parent", 0444, root, core, 3538 ¤t_parent_fops); 3539 3540 if (core->num_parents > 1) 3541 debugfs_create_file("clk_possible_parents", 0444, root, core, 3542 &possible_parents_fops); 3543 3544 if (core->ops->debug_init) 3545 core->ops->debug_init(core->hw, core->dentry); 3546 } 3547 3548 /** 3549 * clk_debug_register - add a clk node to the debugfs clk directory 3550 * @core: the clk being added to the debugfs clk directory 3551 * 3552 * Dynamically adds a clk to the debugfs clk directory if debugfs has been 3553 * initialized. Otherwise it bails out early since the debugfs clk directory 3554 * will be created lazily by clk_debug_init as part of a late_initcall. 3555 */ 3556 static void clk_debug_register(struct clk_core *core) 3557 { 3558 mutex_lock(&clk_debug_lock); 3559 hlist_add_head(&core->debug_node, &clk_debug_list); 3560 if (inited) 3561 clk_debug_create_one(core, rootdir); 3562 mutex_unlock(&clk_debug_lock); 3563 } 3564 3565 /** 3566 * clk_debug_unregister - remove a clk node from the debugfs clk directory 3567 * @core: the clk being removed from the debugfs clk directory 3568 * 3569 * Dynamically removes a clk and all its child nodes from the 3570 * debugfs clk directory if clk->dentry points to debugfs created by 3571 * clk_debug_register in __clk_core_init. 3572 */ 3573 static void clk_debug_unregister(struct clk_core *core) 3574 { 3575 mutex_lock(&clk_debug_lock); 3576 hlist_del_init(&core->debug_node); 3577 debugfs_remove_recursive(core->dentry); 3578 core->dentry = NULL; 3579 mutex_unlock(&clk_debug_lock); 3580 } 3581 3582 /** 3583 * clk_debug_init - lazily populate the debugfs clk directory 3584 * 3585 * clks are often initialized very early during boot before memory can be 3586 * dynamically allocated and well before debugfs is setup. This function 3587 * populates the debugfs clk directory once at boot-time when we know that 3588 * debugfs is setup. It should only be called once at boot-time, all other clks 3589 * added dynamically will be done so with clk_debug_register. 3590 */ 3591 static int __init clk_debug_init(void) 3592 { 3593 struct clk_core *core; 3594 3595 #ifdef CLOCK_ALLOW_WRITE_DEBUGFS 3596 pr_warn("\n"); 3597 pr_warn("********************************************************************\n"); 3598 pr_warn("** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE **\n"); 3599 pr_warn("** **\n"); 3600 pr_warn("** WRITEABLE clk DebugFS SUPPORT HAS BEEN ENABLED IN THIS KERNEL **\n"); 3601 pr_warn("** **\n"); 3602 pr_warn("** This means that this kernel is built to expose clk operations **\n"); 3603 pr_warn("** such as parent or rate setting, enabling, disabling, etc. **\n"); 3604 pr_warn("** to userspace, which may compromise security on your system. **\n"); 3605 pr_warn("** **\n"); 3606 pr_warn("** If you see this message and you are not debugging the **\n"); 3607 pr_warn("** kernel, report this immediately to your vendor! **\n"); 3608 pr_warn("** **\n"); 3609 pr_warn("** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE **\n"); 3610 pr_warn("********************************************************************\n"); 3611 #endif 3612 3613 rootdir = debugfs_create_dir("clk", NULL); 3614 3615 debugfs_create_file("clk_summary", 0444, rootdir, &all_lists, 3616 &clk_summary_fops); 3617 debugfs_create_file("clk_dump", 0444, rootdir, &all_lists, 3618 &clk_dump_fops); 3619 debugfs_create_file("clk_orphan_summary", 0444, rootdir, &orphan_list, 3620 &clk_summary_fops); 3621 debugfs_create_file("clk_orphan_dump", 0444, rootdir, &orphan_list, 3622 &clk_dump_fops); 3623 3624 mutex_lock(&clk_debug_lock); 3625 hlist_for_each_entry(core, &clk_debug_list, debug_node) 3626 clk_debug_create_one(core, rootdir); 3627 3628 inited = 1; 3629 mutex_unlock(&clk_debug_lock); 3630 3631 return 0; 3632 } 3633 late_initcall(clk_debug_init); 3634 #else 3635 static inline void clk_debug_register(struct clk_core *core) { } 3636 static inline void clk_debug_unregister(struct clk_core *core) 3637 { 3638 } 3639 #endif 3640 3641 static void clk_core_reparent_orphans_nolock(void) 3642 { 3643 struct clk_core *orphan; 3644 struct hlist_node *tmp2; 3645 3646 /* 3647 * walk the list of orphan clocks and reparent any that newly finds a 3648 * parent. 3649 */ 3650 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { 3651 struct clk_core *parent = __clk_init_parent(orphan); 3652 3653 /* 3654 * We need to use __clk_set_parent_before() and _after() to 3655 * properly migrate any prepare/enable count of the orphan 3656 * clock. This is important for CLK_IS_CRITICAL clocks, which 3657 * are enabled during init but might not have a parent yet. 3658 */ 3659 if (parent) { 3660 /* update the clk tree topology */ 3661 __clk_set_parent_before(orphan, parent); 3662 __clk_set_parent_after(orphan, parent, NULL); 3663 __clk_recalc_accuracies(orphan); 3664 __clk_recalc_rates(orphan, true, 0); 3665 3666 /* 3667 * __clk_init_parent() will set the initial req_rate to 3668 * 0 if the clock doesn't have clk_ops::recalc_rate and 3669 * is an orphan when it's registered. 3670 * 3671 * 'req_rate' is used by clk_set_rate_range() and 3672 * clk_put() to trigger a clk_set_rate() call whenever 3673 * the boundaries are modified. Let's make sure 3674 * 'req_rate' is set to something non-zero so that 3675 * clk_set_rate_range() doesn't drop the frequency. 3676 */ 3677 orphan->req_rate = orphan->rate; 3678 } 3679 } 3680 } 3681 3682 /** 3683 * __clk_core_init - initialize the data structures in a struct clk_core 3684 * @core: clk_core being initialized 3685 * 3686 * Initializes the lists in struct clk_core, queries the hardware for the 3687 * parent and rate and sets them both. 3688 */ 3689 static int __clk_core_init(struct clk_core *core) 3690 { 3691 int ret; 3692 struct clk_core *parent; 3693 unsigned long rate; 3694 int phase; 3695 3696 clk_prepare_lock(); 3697 3698 /* 3699 * Set hw->core after grabbing the prepare_lock to synchronize with 3700 * callers of clk_core_fill_parent_index() where we treat hw->core 3701 * being NULL as the clk not being registered yet. This is crucial so 3702 * that clks aren't parented until their parent is fully registered. 3703 */ 3704 core->hw->core = core; 3705 3706 ret = clk_pm_runtime_get(core); 3707 if (ret) 3708 goto unlock; 3709 3710 /* check to see if a clock with this name is already registered */ 3711 if (clk_core_lookup(core->name)) { 3712 pr_debug("%s: clk %s already initialized\n", 3713 __func__, core->name); 3714 ret = -EEXIST; 3715 goto out; 3716 } 3717 3718 /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */ 3719 if (core->ops->set_rate && 3720 !((core->ops->round_rate || core->ops->determine_rate) && 3721 core->ops->recalc_rate)) { 3722 pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n", 3723 __func__, core->name); 3724 ret = -EINVAL; 3725 goto out; 3726 } 3727 3728 if (core->ops->set_parent && !core->ops->get_parent) { 3729 pr_err("%s: %s must implement .get_parent & .set_parent\n", 3730 __func__, core->name); 3731 ret = -EINVAL; 3732 goto out; 3733 } 3734 3735 if (core->num_parents > 1 && !core->ops->get_parent) { 3736 pr_err("%s: %s must implement .get_parent as it has multi parents\n", 3737 __func__, core->name); 3738 ret = -EINVAL; 3739 goto out; 3740 } 3741 3742 if (core->ops->set_rate_and_parent && 3743 !(core->ops->set_parent && core->ops->set_rate)) { 3744 pr_err("%s: %s must implement .set_parent & .set_rate\n", 3745 __func__, core->name); 3746 ret = -EINVAL; 3747 goto out; 3748 } 3749 3750 /* 3751 * optional platform-specific magic 3752 * 3753 * The .init callback is not used by any of the basic clock types, but 3754 * exists for weird hardware that must perform initialization magic for 3755 * CCF to get an accurate view of clock for any other callbacks. It may 3756 * also be used needs to perform dynamic allocations. Such allocation 3757 * must be freed in the terminate() callback. 3758 * This callback shall not be used to initialize the parameters state, 3759 * such as rate, parent, etc ... 3760 * 3761 * If it exist, this callback should called before any other callback of 3762 * the clock 3763 */ 3764 if (core->ops->init) { 3765 ret = core->ops->init(core->hw); 3766 if (ret) 3767 goto out; 3768 } 3769 3770 parent = core->parent = __clk_init_parent(core); 3771 3772 /* 3773 * Populate core->parent if parent has already been clk_core_init'd. If 3774 * parent has not yet been clk_core_init'd then place clk in the orphan 3775 * list. If clk doesn't have any parents then place it in the root 3776 * clk list. 3777 * 3778 * Every time a new clk is clk_init'd then we walk the list of orphan 3779 * clocks and re-parent any that are children of the clock currently 3780 * being clk_init'd. 3781 */ 3782 if (parent) { 3783 hlist_add_head(&core->child_node, &parent->children); 3784 core->orphan = parent->orphan; 3785 } else if (!core->num_parents) { 3786 hlist_add_head(&core->child_node, &clk_root_list); 3787 core->orphan = false; 3788 } else { 3789 hlist_add_head(&core->child_node, &clk_orphan_list); 3790 core->orphan = true; 3791 } 3792 3793 /* 3794 * Set clk's accuracy. The preferred method is to use 3795 * .recalc_accuracy. For simple clocks and lazy developers the default 3796 * fallback is to use the parent's accuracy. If a clock doesn't have a 3797 * parent (or is orphaned) then accuracy is set to zero (perfect 3798 * clock). 3799 */ 3800 if (core->ops->recalc_accuracy) 3801 core->accuracy = core->ops->recalc_accuracy(core->hw, 3802 clk_core_get_accuracy_no_lock(parent)); 3803 else if (parent) 3804 core->accuracy = parent->accuracy; 3805 else 3806 core->accuracy = 0; 3807 3808 /* 3809 * Set clk's phase by clk_core_get_phase() caching the phase. 3810 * Since a phase is by definition relative to its parent, just 3811 * query the current clock phase, or just assume it's in phase. 3812 */ 3813 phase = clk_core_get_phase(core); 3814 if (phase < 0) { 3815 ret = phase; 3816 pr_warn("%s: Failed to get phase for clk '%s'\n", __func__, 3817 core->name); 3818 goto out; 3819 } 3820 3821 /* 3822 * Set clk's duty cycle. 3823 */ 3824 clk_core_update_duty_cycle_nolock(core); 3825 3826 /* 3827 * Set clk's rate. The preferred method is to use .recalc_rate. For 3828 * simple clocks and lazy developers the default fallback is to use the 3829 * parent's rate. If a clock doesn't have a parent (or is orphaned) 3830 * then rate is set to zero. 3831 */ 3832 if (core->ops->recalc_rate) 3833 rate = core->ops->recalc_rate(core->hw, 3834 clk_core_get_rate_nolock(parent)); 3835 else if (parent) 3836 rate = parent->rate; 3837 else 3838 rate = 0; 3839 core->rate = core->req_rate = rate; 3840 3841 /* 3842 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks 3843 * don't get accidentally disabled when walking the orphan tree and 3844 * reparenting clocks 3845 */ 3846 if (core->flags & CLK_IS_CRITICAL) { 3847 ret = clk_core_prepare(core); 3848 if (ret) { 3849 pr_warn("%s: critical clk '%s' failed to prepare\n", 3850 __func__, core->name); 3851 goto out; 3852 } 3853 3854 ret = clk_core_enable_lock(core); 3855 if (ret) { 3856 pr_warn("%s: critical clk '%s' failed to enable\n", 3857 __func__, core->name); 3858 clk_core_unprepare(core); 3859 goto out; 3860 } 3861 } 3862 3863 clk_core_reparent_orphans_nolock(); 3864 3865 kref_init(&core->ref); 3866 out: 3867 clk_pm_runtime_put(core); 3868 unlock: 3869 if (ret) { 3870 hlist_del_init(&core->child_node); 3871 core->hw->core = NULL; 3872 } 3873 3874 clk_prepare_unlock(); 3875 3876 if (!ret) 3877 clk_debug_register(core); 3878 3879 return ret; 3880 } 3881 3882 /** 3883 * clk_core_link_consumer - Add a clk consumer to the list of consumers in a clk_core 3884 * @core: clk to add consumer to 3885 * @clk: consumer to link to a clk 3886 */ 3887 static void clk_core_link_consumer(struct clk_core *core, struct clk *clk) 3888 { 3889 clk_prepare_lock(); 3890 hlist_add_head(&clk->clks_node, &core->clks); 3891 clk_prepare_unlock(); 3892 } 3893 3894 /** 3895 * clk_core_unlink_consumer - Remove a clk consumer from the list of consumers in a clk_core 3896 * @clk: consumer to unlink 3897 */ 3898 static void clk_core_unlink_consumer(struct clk *clk) 3899 { 3900 lockdep_assert_held(&prepare_lock); 3901 hlist_del(&clk->clks_node); 3902 } 3903 3904 /** 3905 * alloc_clk - Allocate a clk consumer, but leave it unlinked to the clk_core 3906 * @core: clk to allocate a consumer for 3907 * @dev_id: string describing device name 3908 * @con_id: connection ID string on device 3909 * 3910 * Returns: clk consumer left unlinked from the consumer list 3911 */ 3912 static struct clk *alloc_clk(struct clk_core *core, const char *dev_id, 3913 const char *con_id) 3914 { 3915 struct clk *clk; 3916 3917 clk = kzalloc(sizeof(*clk), GFP_KERNEL); 3918 if (!clk) 3919 return ERR_PTR(-ENOMEM); 3920 3921 clk->core = core; 3922 clk->dev_id = dev_id; 3923 clk->con_id = kstrdup_const(con_id, GFP_KERNEL); 3924 clk->max_rate = ULONG_MAX; 3925 3926 return clk; 3927 } 3928 3929 /** 3930 * free_clk - Free a clk consumer 3931 * @clk: clk consumer to free 3932 * 3933 * Note, this assumes the clk has been unlinked from the clk_core consumer 3934 * list. 3935 */ 3936 static void free_clk(struct clk *clk) 3937 { 3938 kfree_const(clk->con_id); 3939 kfree(clk); 3940 } 3941 3942 /** 3943 * clk_hw_create_clk: Allocate and link a clk consumer to a clk_core given 3944 * a clk_hw 3945 * @dev: clk consumer device 3946 * @hw: clk_hw associated with the clk being consumed 3947 * @dev_id: string describing device name 3948 * @con_id: connection ID string on device 3949 * 3950 * This is the main function used to create a clk pointer for use by clk 3951 * consumers. It connects a consumer to the clk_core and clk_hw structures 3952 * used by the framework and clk provider respectively. 3953 */ 3954 struct clk *clk_hw_create_clk(struct device *dev, struct clk_hw *hw, 3955 const char *dev_id, const char *con_id) 3956 { 3957 struct clk *clk; 3958 struct clk_core *core; 3959 3960 /* This is to allow this function to be chained to others */ 3961 if (IS_ERR_OR_NULL(hw)) 3962 return ERR_CAST(hw); 3963 3964 core = hw->core; 3965 clk = alloc_clk(core, dev_id, con_id); 3966 if (IS_ERR(clk)) 3967 return clk; 3968 clk->dev = dev; 3969 3970 if (!try_module_get(core->owner)) { 3971 free_clk(clk); 3972 return ERR_PTR(-ENOENT); 3973 } 3974 3975 kref_get(&core->ref); 3976 clk_core_link_consumer(core, clk); 3977 3978 return clk; 3979 } 3980 3981 /** 3982 * clk_hw_get_clk - get clk consumer given an clk_hw 3983 * @hw: clk_hw associated with the clk being consumed 3984 * @con_id: connection ID string on device 3985 * 3986 * Returns: new clk consumer 3987 * This is the function to be used by providers which need 3988 * to get a consumer clk and act on the clock element 3989 * Calls to this function must be balanced with calls clk_put() 3990 */ 3991 struct clk *clk_hw_get_clk(struct clk_hw *hw, const char *con_id) 3992 { 3993 struct device *dev = hw->core->dev; 3994 const char *name = dev ? dev_name(dev) : NULL; 3995 3996 return clk_hw_create_clk(dev, hw, name, con_id); 3997 } 3998 EXPORT_SYMBOL(clk_hw_get_clk); 3999 4000 static int clk_cpy_name(const char **dst_p, const char *src, bool must_exist) 4001 { 4002 const char *dst; 4003 4004 if (!src) { 4005 if (must_exist) 4006 return -EINVAL; 4007 return 0; 4008 } 4009 4010 *dst_p = dst = kstrdup_const(src, GFP_KERNEL); 4011 if (!dst) 4012 return -ENOMEM; 4013 4014 return 0; 4015 } 4016 4017 static int clk_core_populate_parent_map(struct clk_core *core, 4018 const struct clk_init_data *init) 4019 { 4020 u8 num_parents = init->num_parents; 4021 const char * const *parent_names = init->parent_names; 4022 const struct clk_hw **parent_hws = init->parent_hws; 4023 const struct clk_parent_data *parent_data = init->parent_data; 4024 int i, ret = 0; 4025 struct clk_parent_map *parents, *parent; 4026 4027 if (!num_parents) 4028 return 0; 4029 4030 /* 4031 * Avoid unnecessary string look-ups of clk_core's possible parents by 4032 * having a cache of names/clk_hw pointers to clk_core pointers. 4033 */ 4034 parents = kcalloc(num_parents, sizeof(*parents), GFP_KERNEL); 4035 core->parents = parents; 4036 if (!parents) 4037 return -ENOMEM; 4038 4039 /* Copy everything over because it might be __initdata */ 4040 for (i = 0, parent = parents; i < num_parents; i++, parent++) { 4041 parent->index = -1; 4042 if (parent_names) { 4043 /* throw a WARN if any entries are NULL */ 4044 WARN(!parent_names[i], 4045 "%s: invalid NULL in %s's .parent_names\n", 4046 __func__, core->name); 4047 ret = clk_cpy_name(&parent->name, parent_names[i], 4048 true); 4049 } else if (parent_data) { 4050 parent->hw = parent_data[i].hw; 4051 parent->index = parent_data[i].index; 4052 ret = clk_cpy_name(&parent->fw_name, 4053 parent_data[i].fw_name, false); 4054 if (!ret) 4055 ret = clk_cpy_name(&parent->name, 4056 parent_data[i].name, 4057 false); 4058 } else if (parent_hws) { 4059 parent->hw = parent_hws[i]; 4060 } else { 4061 ret = -EINVAL; 4062 WARN(1, "Must specify parents if num_parents > 0\n"); 4063 } 4064 4065 if (ret) { 4066 do { 4067 kfree_const(parents[i].name); 4068 kfree_const(parents[i].fw_name); 4069 } while (--i >= 0); 4070 kfree(parents); 4071 4072 return ret; 4073 } 4074 } 4075 4076 return 0; 4077 } 4078 4079 static void clk_core_free_parent_map(struct clk_core *core) 4080 { 4081 int i = core->num_parents; 4082 4083 if (!core->num_parents) 4084 return; 4085 4086 while (--i >= 0) { 4087 kfree_const(core->parents[i].name); 4088 kfree_const(core->parents[i].fw_name); 4089 } 4090 4091 kfree(core->parents); 4092 } 4093 4094 static struct clk * 4095 __clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw) 4096 { 4097 int ret; 4098 struct clk_core *core; 4099 const struct clk_init_data *init = hw->init; 4100 4101 /* 4102 * The init data is not supposed to be used outside of registration path. 4103 * Set it to NULL so that provider drivers can't use it either and so that 4104 * we catch use of hw->init early on in the core. 4105 */ 4106 hw->init = NULL; 4107 4108 core = kzalloc(sizeof(*core), GFP_KERNEL); 4109 if (!core) { 4110 ret = -ENOMEM; 4111 goto fail_out; 4112 } 4113 4114 core->name = kstrdup_const(init->name, GFP_KERNEL); 4115 if (!core->name) { 4116 ret = -ENOMEM; 4117 goto fail_name; 4118 } 4119 4120 if (WARN_ON(!init->ops)) { 4121 ret = -EINVAL; 4122 goto fail_ops; 4123 } 4124 core->ops = init->ops; 4125 4126 if (dev && pm_runtime_enabled(dev)) 4127 core->rpm_enabled = true; 4128 core->dev = dev; 4129 core->of_node = np; 4130 if (dev && dev->driver) 4131 core->owner = dev->driver->owner; 4132 core->hw = hw; 4133 core->flags = init->flags; 4134 core->num_parents = init->num_parents; 4135 core->min_rate = 0; 4136 core->max_rate = ULONG_MAX; 4137 4138 ret = clk_core_populate_parent_map(core, init); 4139 if (ret) 4140 goto fail_parents; 4141 4142 INIT_HLIST_HEAD(&core->clks); 4143 4144 /* 4145 * Don't call clk_hw_create_clk() here because that would pin the 4146 * provider module to itself and prevent it from ever being removed. 4147 */ 4148 hw->clk = alloc_clk(core, NULL, NULL); 4149 if (IS_ERR(hw->clk)) { 4150 ret = PTR_ERR(hw->clk); 4151 goto fail_create_clk; 4152 } 4153 4154 clk_core_link_consumer(core, hw->clk); 4155 4156 ret = __clk_core_init(core); 4157 if (!ret) 4158 return hw->clk; 4159 4160 clk_prepare_lock(); 4161 clk_core_unlink_consumer(hw->clk); 4162 clk_prepare_unlock(); 4163 4164 free_clk(hw->clk); 4165 hw->clk = NULL; 4166 4167 fail_create_clk: 4168 clk_core_free_parent_map(core); 4169 fail_parents: 4170 fail_ops: 4171 kfree_const(core->name); 4172 fail_name: 4173 kfree(core); 4174 fail_out: 4175 return ERR_PTR(ret); 4176 } 4177 4178 /** 4179 * dev_or_parent_of_node() - Get device node of @dev or @dev's parent 4180 * @dev: Device to get device node of 4181 * 4182 * Return: device node pointer of @dev, or the device node pointer of 4183 * @dev->parent if dev doesn't have a device node, or NULL if neither 4184 * @dev or @dev->parent have a device node. 4185 */ 4186 static struct device_node *dev_or_parent_of_node(struct device *dev) 4187 { 4188 struct device_node *np; 4189 4190 if (!dev) 4191 return NULL; 4192 4193 np = dev_of_node(dev); 4194 if (!np) 4195 np = dev_of_node(dev->parent); 4196 4197 return np; 4198 } 4199 4200 /** 4201 * clk_register - allocate a new clock, register it and return an opaque cookie 4202 * @dev: device that is registering this clock 4203 * @hw: link to hardware-specific clock data 4204 * 4205 * clk_register is the *deprecated* interface for populating the clock tree with 4206 * new clock nodes. Use clk_hw_register() instead. 4207 * 4208 * Returns: a pointer to the newly allocated struct clk which 4209 * cannot be dereferenced by driver code but may be used in conjunction with the 4210 * rest of the clock API. In the event of an error clk_register will return an 4211 * error code; drivers must test for an error code after calling clk_register. 4212 */ 4213 struct clk *clk_register(struct device *dev, struct clk_hw *hw) 4214 { 4215 return __clk_register(dev, dev_or_parent_of_node(dev), hw); 4216 } 4217 EXPORT_SYMBOL_GPL(clk_register); 4218 4219 /** 4220 * clk_hw_register - register a clk_hw and return an error code 4221 * @dev: device that is registering this clock 4222 * @hw: link to hardware-specific clock data 4223 * 4224 * clk_hw_register is the primary interface for populating the clock tree with 4225 * new clock nodes. It returns an integer equal to zero indicating success or 4226 * less than zero indicating failure. Drivers must test for an error code after 4227 * calling clk_hw_register(). 4228 */ 4229 int clk_hw_register(struct device *dev, struct clk_hw *hw) 4230 { 4231 return PTR_ERR_OR_ZERO(__clk_register(dev, dev_or_parent_of_node(dev), 4232 hw)); 4233 } 4234 EXPORT_SYMBOL_GPL(clk_hw_register); 4235 4236 /* 4237 * of_clk_hw_register - register a clk_hw and return an error code 4238 * @node: device_node of device that is registering this clock 4239 * @hw: link to hardware-specific clock data 4240 * 4241 * of_clk_hw_register() is the primary interface for populating the clock tree 4242 * with new clock nodes when a struct device is not available, but a struct 4243 * device_node is. It returns an integer equal to zero indicating success or 4244 * less than zero indicating failure. Drivers must test for an error code after 4245 * calling of_clk_hw_register(). 4246 */ 4247 int of_clk_hw_register(struct device_node *node, struct clk_hw *hw) 4248 { 4249 return PTR_ERR_OR_ZERO(__clk_register(NULL, node, hw)); 4250 } 4251 EXPORT_SYMBOL_GPL(of_clk_hw_register); 4252 4253 /* Free memory allocated for a clock. */ 4254 static void __clk_release(struct kref *ref) 4255 { 4256 struct clk_core *core = container_of(ref, struct clk_core, ref); 4257 4258 lockdep_assert_held(&prepare_lock); 4259 4260 clk_core_free_parent_map(core); 4261 kfree_const(core->name); 4262 kfree(core); 4263 } 4264 4265 /* 4266 * Empty clk_ops for unregistered clocks. These are used temporarily 4267 * after clk_unregister() was called on a clock and until last clock 4268 * consumer calls clk_put() and the struct clk object is freed. 4269 */ 4270 static int clk_nodrv_prepare_enable(struct clk_hw *hw) 4271 { 4272 return -ENXIO; 4273 } 4274 4275 static void clk_nodrv_disable_unprepare(struct clk_hw *hw) 4276 { 4277 WARN_ON_ONCE(1); 4278 } 4279 4280 static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate, 4281 unsigned long parent_rate) 4282 { 4283 return -ENXIO; 4284 } 4285 4286 static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index) 4287 { 4288 return -ENXIO; 4289 } 4290 4291 static const struct clk_ops clk_nodrv_ops = { 4292 .enable = clk_nodrv_prepare_enable, 4293 .disable = clk_nodrv_disable_unprepare, 4294 .prepare = clk_nodrv_prepare_enable, 4295 .unprepare = clk_nodrv_disable_unprepare, 4296 .set_rate = clk_nodrv_set_rate, 4297 .set_parent = clk_nodrv_set_parent, 4298 }; 4299 4300 static void clk_core_evict_parent_cache_subtree(struct clk_core *root, 4301 const struct clk_core *target) 4302 { 4303 int i; 4304 struct clk_core *child; 4305 4306 for (i = 0; i < root->num_parents; i++) 4307 if (root->parents[i].core == target) 4308 root->parents[i].core = NULL; 4309 4310 hlist_for_each_entry(child, &root->children, child_node) 4311 clk_core_evict_parent_cache_subtree(child, target); 4312 } 4313 4314 /* Remove this clk from all parent caches */ 4315 static void clk_core_evict_parent_cache(struct clk_core *core) 4316 { 4317 const struct hlist_head **lists; 4318 struct clk_core *root; 4319 4320 lockdep_assert_held(&prepare_lock); 4321 4322 for (lists = all_lists; *lists; lists++) 4323 hlist_for_each_entry(root, *lists, child_node) 4324 clk_core_evict_parent_cache_subtree(root, core); 4325 4326 } 4327 4328 /** 4329 * clk_unregister - unregister a currently registered clock 4330 * @clk: clock to unregister 4331 */ 4332 void clk_unregister(struct clk *clk) 4333 { 4334 unsigned long flags; 4335 const struct clk_ops *ops; 4336 4337 if (!clk || WARN_ON_ONCE(IS_ERR(clk))) 4338 return; 4339 4340 clk_debug_unregister(clk->core); 4341 4342 clk_prepare_lock(); 4343 4344 ops = clk->core->ops; 4345 if (ops == &clk_nodrv_ops) { 4346 pr_err("%s: unregistered clock: %s\n", __func__, 4347 clk->core->name); 4348 goto unlock; 4349 } 4350 /* 4351 * Assign empty clock ops for consumers that might still hold 4352 * a reference to this clock. 4353 */ 4354 flags = clk_enable_lock(); 4355 clk->core->ops = &clk_nodrv_ops; 4356 clk_enable_unlock(flags); 4357 4358 if (ops->terminate) 4359 ops->terminate(clk->core->hw); 4360 4361 if (!hlist_empty(&clk->core->children)) { 4362 struct clk_core *child; 4363 struct hlist_node *t; 4364 4365 /* Reparent all children to the orphan list. */ 4366 hlist_for_each_entry_safe(child, t, &clk->core->children, 4367 child_node) 4368 clk_core_set_parent_nolock(child, NULL); 4369 } 4370 4371 clk_core_evict_parent_cache(clk->core); 4372 4373 hlist_del_init(&clk->core->child_node); 4374 4375 if (clk->core->prepare_count) 4376 pr_warn("%s: unregistering prepared clock: %s\n", 4377 __func__, clk->core->name); 4378 4379 if (clk->core->protect_count) 4380 pr_warn("%s: unregistering protected clock: %s\n", 4381 __func__, clk->core->name); 4382 4383 kref_put(&clk->core->ref, __clk_release); 4384 free_clk(clk); 4385 unlock: 4386 clk_prepare_unlock(); 4387 } 4388 EXPORT_SYMBOL_GPL(clk_unregister); 4389 4390 /** 4391 * clk_hw_unregister - unregister a currently registered clk_hw 4392 * @hw: hardware-specific clock data to unregister 4393 */ 4394 void clk_hw_unregister(struct clk_hw *hw) 4395 { 4396 clk_unregister(hw->clk); 4397 } 4398 EXPORT_SYMBOL_GPL(clk_hw_unregister); 4399 4400 static void devm_clk_unregister_cb(struct device *dev, void *res) 4401 { 4402 clk_unregister(*(struct clk **)res); 4403 } 4404 4405 static void devm_clk_hw_unregister_cb(struct device *dev, void *res) 4406 { 4407 clk_hw_unregister(*(struct clk_hw **)res); 4408 } 4409 4410 /** 4411 * devm_clk_register - resource managed clk_register() 4412 * @dev: device that is registering this clock 4413 * @hw: link to hardware-specific clock data 4414 * 4415 * Managed clk_register(). This function is *deprecated*, use devm_clk_hw_register() instead. 4416 * 4417 * Clocks returned from this function are automatically clk_unregister()ed on 4418 * driver detach. See clk_register() for more information. 4419 */ 4420 struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) 4421 { 4422 struct clk *clk; 4423 struct clk **clkp; 4424 4425 clkp = devres_alloc(devm_clk_unregister_cb, sizeof(*clkp), GFP_KERNEL); 4426 if (!clkp) 4427 return ERR_PTR(-ENOMEM); 4428 4429 clk = clk_register(dev, hw); 4430 if (!IS_ERR(clk)) { 4431 *clkp = clk; 4432 devres_add(dev, clkp); 4433 } else { 4434 devres_free(clkp); 4435 } 4436 4437 return clk; 4438 } 4439 EXPORT_SYMBOL_GPL(devm_clk_register); 4440 4441 /** 4442 * devm_clk_hw_register - resource managed clk_hw_register() 4443 * @dev: device that is registering this clock 4444 * @hw: link to hardware-specific clock data 4445 * 4446 * Managed clk_hw_register(). Clocks registered by this function are 4447 * automatically clk_hw_unregister()ed on driver detach. See clk_hw_register() 4448 * for more information. 4449 */ 4450 int devm_clk_hw_register(struct device *dev, struct clk_hw *hw) 4451 { 4452 struct clk_hw **hwp; 4453 int ret; 4454 4455 hwp = devres_alloc(devm_clk_hw_unregister_cb, sizeof(*hwp), GFP_KERNEL); 4456 if (!hwp) 4457 return -ENOMEM; 4458 4459 ret = clk_hw_register(dev, hw); 4460 if (!ret) { 4461 *hwp = hw; 4462 devres_add(dev, hwp); 4463 } else { 4464 devres_free(hwp); 4465 } 4466 4467 return ret; 4468 } 4469 EXPORT_SYMBOL_GPL(devm_clk_hw_register); 4470 4471 static void devm_clk_release(struct device *dev, void *res) 4472 { 4473 clk_put(*(struct clk **)res); 4474 } 4475 4476 /** 4477 * devm_clk_hw_get_clk - resource managed clk_hw_get_clk() 4478 * @dev: device that is registering this clock 4479 * @hw: clk_hw associated with the clk being consumed 4480 * @con_id: connection ID string on device 4481 * 4482 * Managed clk_hw_get_clk(). Clocks got with this function are 4483 * automatically clk_put() on driver detach. See clk_put() 4484 * for more information. 4485 */ 4486 struct clk *devm_clk_hw_get_clk(struct device *dev, struct clk_hw *hw, 4487 const char *con_id) 4488 { 4489 struct clk *clk; 4490 struct clk **clkp; 4491 4492 /* This should not happen because it would mean we have drivers 4493 * passing around clk_hw pointers instead of having the caller use 4494 * proper clk_get() style APIs 4495 */ 4496 WARN_ON_ONCE(dev != hw->core->dev); 4497 4498 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL); 4499 if (!clkp) 4500 return ERR_PTR(-ENOMEM); 4501 4502 clk = clk_hw_get_clk(hw, con_id); 4503 if (!IS_ERR(clk)) { 4504 *clkp = clk; 4505 devres_add(dev, clkp); 4506 } else { 4507 devres_free(clkp); 4508 } 4509 4510 return clk; 4511 } 4512 EXPORT_SYMBOL_GPL(devm_clk_hw_get_clk); 4513 4514 /* 4515 * clkdev helpers 4516 */ 4517 4518 void __clk_put(struct clk *clk) 4519 { 4520 struct module *owner; 4521 4522 if (!clk || WARN_ON_ONCE(IS_ERR(clk))) 4523 return; 4524 4525 clk_prepare_lock(); 4526 4527 /* 4528 * Before calling clk_put, all calls to clk_rate_exclusive_get() from a 4529 * given user should be balanced with calls to clk_rate_exclusive_put() 4530 * and by that same consumer 4531 */ 4532 if (WARN_ON(clk->exclusive_count)) { 4533 /* We voiced our concern, let's sanitize the situation */ 4534 clk->core->protect_count -= (clk->exclusive_count - 1); 4535 clk_core_rate_unprotect(clk->core); 4536 clk->exclusive_count = 0; 4537 } 4538 4539 hlist_del(&clk->clks_node); 4540 4541 /* If we had any boundaries on that clock, let's drop them. */ 4542 if (clk->min_rate > 0 || clk->max_rate < ULONG_MAX) 4543 clk_set_rate_range_nolock(clk, 0, ULONG_MAX); 4544 4545 owner = clk->core->owner; 4546 kref_put(&clk->core->ref, __clk_release); 4547 4548 clk_prepare_unlock(); 4549 4550 module_put(owner); 4551 4552 free_clk(clk); 4553 } 4554 4555 /*** clk rate change notifiers ***/ 4556 4557 /** 4558 * clk_notifier_register - add a clk rate change notifier 4559 * @clk: struct clk * to watch 4560 * @nb: struct notifier_block * with callback info 4561 * 4562 * Request notification when clk's rate changes. This uses an SRCU 4563 * notifier because we want it to block and notifier unregistrations are 4564 * uncommon. The callbacks associated with the notifier must not 4565 * re-enter into the clk framework by calling any top-level clk APIs; 4566 * this will cause a nested prepare_lock mutex. 4567 * 4568 * In all notification cases (pre, post and abort rate change) the original 4569 * clock rate is passed to the callback via struct clk_notifier_data.old_rate 4570 * and the new frequency is passed via struct clk_notifier_data.new_rate. 4571 * 4572 * clk_notifier_register() must be called from non-atomic context. 4573 * Returns -EINVAL if called with null arguments, -ENOMEM upon 4574 * allocation failure; otherwise, passes along the return value of 4575 * srcu_notifier_chain_register(). 4576 */ 4577 int clk_notifier_register(struct clk *clk, struct notifier_block *nb) 4578 { 4579 struct clk_notifier *cn; 4580 int ret = -ENOMEM; 4581 4582 if (!clk || !nb) 4583 return -EINVAL; 4584 4585 clk_prepare_lock(); 4586 4587 /* search the list of notifiers for this clk */ 4588 list_for_each_entry(cn, &clk_notifier_list, node) 4589 if (cn->clk == clk) 4590 goto found; 4591 4592 /* if clk wasn't in the notifier list, allocate new clk_notifier */ 4593 cn = kzalloc(sizeof(*cn), GFP_KERNEL); 4594 if (!cn) 4595 goto out; 4596 4597 cn->clk = clk; 4598 srcu_init_notifier_head(&cn->notifier_head); 4599 4600 list_add(&cn->node, &clk_notifier_list); 4601 4602 found: 4603 ret = srcu_notifier_chain_register(&cn->notifier_head, nb); 4604 4605 clk->core->notifier_count++; 4606 4607 out: 4608 clk_prepare_unlock(); 4609 4610 return ret; 4611 } 4612 EXPORT_SYMBOL_GPL(clk_notifier_register); 4613 4614 /** 4615 * clk_notifier_unregister - remove a clk rate change notifier 4616 * @clk: struct clk * 4617 * @nb: struct notifier_block * with callback info 4618 * 4619 * Request no further notification for changes to 'clk' and frees memory 4620 * allocated in clk_notifier_register. 4621 * 4622 * Returns -EINVAL if called with null arguments; otherwise, passes 4623 * along the return value of srcu_notifier_chain_unregister(). 4624 */ 4625 int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) 4626 { 4627 struct clk_notifier *cn; 4628 int ret = -ENOENT; 4629 4630 if (!clk || !nb) 4631 return -EINVAL; 4632 4633 clk_prepare_lock(); 4634 4635 list_for_each_entry(cn, &clk_notifier_list, node) { 4636 if (cn->clk == clk) { 4637 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); 4638 4639 clk->core->notifier_count--; 4640 4641 /* XXX the notifier code should handle this better */ 4642 if (!cn->notifier_head.head) { 4643 srcu_cleanup_notifier_head(&cn->notifier_head); 4644 list_del(&cn->node); 4645 kfree(cn); 4646 } 4647 break; 4648 } 4649 } 4650 4651 clk_prepare_unlock(); 4652 4653 return ret; 4654 } 4655 EXPORT_SYMBOL_GPL(clk_notifier_unregister); 4656 4657 struct clk_notifier_devres { 4658 struct clk *clk; 4659 struct notifier_block *nb; 4660 }; 4661 4662 static void devm_clk_notifier_release(struct device *dev, void *res) 4663 { 4664 struct clk_notifier_devres *devres = res; 4665 4666 clk_notifier_unregister(devres->clk, devres->nb); 4667 } 4668 4669 int devm_clk_notifier_register(struct device *dev, struct clk *clk, 4670 struct notifier_block *nb) 4671 { 4672 struct clk_notifier_devres *devres; 4673 int ret; 4674 4675 devres = devres_alloc(devm_clk_notifier_release, 4676 sizeof(*devres), GFP_KERNEL); 4677 4678 if (!devres) 4679 return -ENOMEM; 4680 4681 ret = clk_notifier_register(clk, nb); 4682 if (!ret) { 4683 devres->clk = clk; 4684 devres->nb = nb; 4685 } else { 4686 devres_free(devres); 4687 } 4688 4689 return ret; 4690 } 4691 EXPORT_SYMBOL_GPL(devm_clk_notifier_register); 4692 4693 #ifdef CONFIG_OF 4694 static void clk_core_reparent_orphans(void) 4695 { 4696 clk_prepare_lock(); 4697 clk_core_reparent_orphans_nolock(); 4698 clk_prepare_unlock(); 4699 } 4700 4701 /** 4702 * struct of_clk_provider - Clock provider registration structure 4703 * @link: Entry in global list of clock providers 4704 * @node: Pointer to device tree node of clock provider 4705 * @get: Get clock callback. Returns NULL or a struct clk for the 4706 * given clock specifier 4707 * @get_hw: Get clk_hw callback. Returns NULL, ERR_PTR or a 4708 * struct clk_hw for the given clock specifier 4709 * @data: context pointer to be passed into @get callback 4710 */ 4711 struct of_clk_provider { 4712 struct list_head link; 4713 4714 struct device_node *node; 4715 struct clk *(*get)(struct of_phandle_args *clkspec, void *data); 4716 struct clk_hw *(*get_hw)(struct of_phandle_args *clkspec, void *data); 4717 void *data; 4718 }; 4719 4720 extern struct of_device_id __clk_of_table; 4721 static const struct of_device_id __clk_of_table_sentinel 4722 __used __section("__clk_of_table_end"); 4723 4724 static LIST_HEAD(of_clk_providers); 4725 static DEFINE_MUTEX(of_clk_mutex); 4726 4727 struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, 4728 void *data) 4729 { 4730 return data; 4731 } 4732 EXPORT_SYMBOL_GPL(of_clk_src_simple_get); 4733 4734 struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data) 4735 { 4736 return data; 4737 } 4738 EXPORT_SYMBOL_GPL(of_clk_hw_simple_get); 4739 4740 struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data) 4741 { 4742 struct clk_onecell_data *clk_data = data; 4743 unsigned int idx = clkspec->args[0]; 4744 4745 if (idx >= clk_data->clk_num) { 4746 pr_err("%s: invalid clock index %u\n", __func__, idx); 4747 return ERR_PTR(-EINVAL); 4748 } 4749 4750 return clk_data->clks[idx]; 4751 } 4752 EXPORT_SYMBOL_GPL(of_clk_src_onecell_get); 4753 4754 struct clk_hw * 4755 of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data) 4756 { 4757 struct clk_hw_onecell_data *hw_data = data; 4758 unsigned int idx = clkspec->args[0]; 4759 4760 if (idx >= hw_data->num) { 4761 pr_err("%s: invalid index %u\n", __func__, idx); 4762 return ERR_PTR(-EINVAL); 4763 } 4764 4765 return hw_data->hws[idx]; 4766 } 4767 EXPORT_SYMBOL_GPL(of_clk_hw_onecell_get); 4768 4769 /** 4770 * of_clk_add_provider() - Register a clock provider for a node 4771 * @np: Device node pointer associated with clock provider 4772 * @clk_src_get: callback for decoding clock 4773 * @data: context pointer for @clk_src_get callback. 4774 * 4775 * This function is *deprecated*. Use of_clk_add_hw_provider() instead. 4776 */ 4777 int of_clk_add_provider(struct device_node *np, 4778 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec, 4779 void *data), 4780 void *data) 4781 { 4782 struct of_clk_provider *cp; 4783 int ret; 4784 4785 if (!np) 4786 return 0; 4787 4788 cp = kzalloc(sizeof(*cp), GFP_KERNEL); 4789 if (!cp) 4790 return -ENOMEM; 4791 4792 cp->node = of_node_get(np); 4793 cp->data = data; 4794 cp->get = clk_src_get; 4795 4796 mutex_lock(&of_clk_mutex); 4797 list_add(&cp->link, &of_clk_providers); 4798 mutex_unlock(&of_clk_mutex); 4799 pr_debug("Added clock from %pOF\n", np); 4800 4801 clk_core_reparent_orphans(); 4802 4803 ret = of_clk_set_defaults(np, true); 4804 if (ret < 0) 4805 of_clk_del_provider(np); 4806 4807 fwnode_dev_initialized(&np->fwnode, true); 4808 4809 return ret; 4810 } 4811 EXPORT_SYMBOL_GPL(of_clk_add_provider); 4812 4813 /** 4814 * of_clk_add_hw_provider() - Register a clock provider for a node 4815 * @np: Device node pointer associated with clock provider 4816 * @get: callback for decoding clk_hw 4817 * @data: context pointer for @get callback. 4818 */ 4819 int of_clk_add_hw_provider(struct device_node *np, 4820 struct clk_hw *(*get)(struct of_phandle_args *clkspec, 4821 void *data), 4822 void *data) 4823 { 4824 struct of_clk_provider *cp; 4825 int ret; 4826 4827 if (!np) 4828 return 0; 4829 4830 cp = kzalloc(sizeof(*cp), GFP_KERNEL); 4831 if (!cp) 4832 return -ENOMEM; 4833 4834 cp->node = of_node_get(np); 4835 cp->data = data; 4836 cp->get_hw = get; 4837 4838 mutex_lock(&of_clk_mutex); 4839 list_add(&cp->link, &of_clk_providers); 4840 mutex_unlock(&of_clk_mutex); 4841 pr_debug("Added clk_hw provider from %pOF\n", np); 4842 4843 clk_core_reparent_orphans(); 4844 4845 ret = of_clk_set_defaults(np, true); 4846 if (ret < 0) 4847 of_clk_del_provider(np); 4848 4849 fwnode_dev_initialized(&np->fwnode, true); 4850 4851 return ret; 4852 } 4853 EXPORT_SYMBOL_GPL(of_clk_add_hw_provider); 4854 4855 static void devm_of_clk_release_provider(struct device *dev, void *res) 4856 { 4857 of_clk_del_provider(*(struct device_node **)res); 4858 } 4859 4860 /* 4861 * We allow a child device to use its parent device as the clock provider node 4862 * for cases like MFD sub-devices where the child device driver wants to use 4863 * devm_*() APIs but not list the device in DT as a sub-node. 4864 */ 4865 static struct device_node *get_clk_provider_node(struct device *dev) 4866 { 4867 struct device_node *np, *parent_np; 4868 4869 np = dev->of_node; 4870 parent_np = dev->parent ? dev->parent->of_node : NULL; 4871 4872 if (!of_find_property(np, "#clock-cells", NULL)) 4873 if (of_find_property(parent_np, "#clock-cells", NULL)) 4874 np = parent_np; 4875 4876 return np; 4877 } 4878 4879 /** 4880 * devm_of_clk_add_hw_provider() - Managed clk provider node registration 4881 * @dev: Device acting as the clock provider (used for DT node and lifetime) 4882 * @get: callback for decoding clk_hw 4883 * @data: context pointer for @get callback 4884 * 4885 * Registers clock provider for given device's node. If the device has no DT 4886 * node or if the device node lacks of clock provider information (#clock-cells) 4887 * then the parent device's node is scanned for this information. If parent node 4888 * has the #clock-cells then it is used in registration. Provider is 4889 * automatically released at device exit. 4890 * 4891 * Return: 0 on success or an errno on failure. 4892 */ 4893 int devm_of_clk_add_hw_provider(struct device *dev, 4894 struct clk_hw *(*get)(struct of_phandle_args *clkspec, 4895 void *data), 4896 void *data) 4897 { 4898 struct device_node **ptr, *np; 4899 int ret; 4900 4901 ptr = devres_alloc(devm_of_clk_release_provider, sizeof(*ptr), 4902 GFP_KERNEL); 4903 if (!ptr) 4904 return -ENOMEM; 4905 4906 np = get_clk_provider_node(dev); 4907 ret = of_clk_add_hw_provider(np, get, data); 4908 if (!ret) { 4909 *ptr = np; 4910 devres_add(dev, ptr); 4911 } else { 4912 devres_free(ptr); 4913 } 4914 4915 return ret; 4916 } 4917 EXPORT_SYMBOL_GPL(devm_of_clk_add_hw_provider); 4918 4919 /** 4920 * of_clk_del_provider() - Remove a previously registered clock provider 4921 * @np: Device node pointer associated with clock provider 4922 */ 4923 void of_clk_del_provider(struct device_node *np) 4924 { 4925 struct of_clk_provider *cp; 4926 4927 if (!np) 4928 return; 4929 4930 mutex_lock(&of_clk_mutex); 4931 list_for_each_entry(cp, &of_clk_providers, link) { 4932 if (cp->node == np) { 4933 list_del(&cp->link); 4934 fwnode_dev_initialized(&np->fwnode, false); 4935 of_node_put(cp->node); 4936 kfree(cp); 4937 break; 4938 } 4939 } 4940 mutex_unlock(&of_clk_mutex); 4941 } 4942 EXPORT_SYMBOL_GPL(of_clk_del_provider); 4943 4944 /** 4945 * of_parse_clkspec() - Parse a DT clock specifier for a given device node 4946 * @np: device node to parse clock specifier from 4947 * @index: index of phandle to parse clock out of. If index < 0, @name is used 4948 * @name: clock name to find and parse. If name is NULL, the index is used 4949 * @out_args: Result of parsing the clock specifier 4950 * 4951 * Parses a device node's "clocks" and "clock-names" properties to find the 4952 * phandle and cells for the index or name that is desired. The resulting clock 4953 * specifier is placed into @out_args, or an errno is returned when there's a 4954 * parsing error. The @index argument is ignored if @name is non-NULL. 4955 * 4956 * Example: 4957 * 4958 * phandle1: clock-controller@1 { 4959 * #clock-cells = <2>; 4960 * } 4961 * 4962 * phandle2: clock-controller@2 { 4963 * #clock-cells = <1>; 4964 * } 4965 * 4966 * clock-consumer@3 { 4967 * clocks = <&phandle1 1 2 &phandle2 3>; 4968 * clock-names = "name1", "name2"; 4969 * } 4970 * 4971 * To get a device_node for `clock-controller@2' node you may call this 4972 * function a few different ways: 4973 * 4974 * of_parse_clkspec(clock-consumer@3, -1, "name2", &args); 4975 * of_parse_clkspec(clock-consumer@3, 1, NULL, &args); 4976 * of_parse_clkspec(clock-consumer@3, 1, "name2", &args); 4977 * 4978 * Return: 0 upon successfully parsing the clock specifier. Otherwise, -ENOENT 4979 * if @name is NULL or -EINVAL if @name is non-NULL and it can't be found in 4980 * the "clock-names" property of @np. 4981 */ 4982 static int of_parse_clkspec(const struct device_node *np, int index, 4983 const char *name, struct of_phandle_args *out_args) 4984 { 4985 int ret = -ENOENT; 4986 4987 /* Walk up the tree of devices looking for a clock property that matches */ 4988 while (np) { 4989 /* 4990 * For named clocks, first look up the name in the 4991 * "clock-names" property. If it cannot be found, then index 4992 * will be an error code and of_parse_phandle_with_args() will 4993 * return -EINVAL. 4994 */ 4995 if (name) 4996 index = of_property_match_string(np, "clock-names", name); 4997 ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells", 4998 index, out_args); 4999 if (!ret) 5000 break; 5001 if (name && index >= 0) 5002 break; 5003 5004 /* 5005 * No matching clock found on this node. If the parent node 5006 * has a "clock-ranges" property, then we can try one of its 5007 * clocks. 5008 */ 5009 np = np->parent; 5010 if (np && !of_get_property(np, "clock-ranges", NULL)) 5011 break; 5012 index = 0; 5013 } 5014 5015 return ret; 5016 } 5017 5018 static struct clk_hw * 5019 __of_clk_get_hw_from_provider(struct of_clk_provider *provider, 5020 struct of_phandle_args *clkspec) 5021 { 5022 struct clk *clk; 5023 5024 if (provider->get_hw) 5025 return provider->get_hw(clkspec, provider->data); 5026 5027 clk = provider->get(clkspec, provider->data); 5028 if (IS_ERR(clk)) 5029 return ERR_CAST(clk); 5030 return __clk_get_hw(clk); 5031 } 5032 5033 static struct clk_hw * 5034 of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec) 5035 { 5036 struct of_clk_provider *provider; 5037 struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER); 5038 5039 if (!clkspec) 5040 return ERR_PTR(-EINVAL); 5041 5042 mutex_lock(&of_clk_mutex); 5043 list_for_each_entry(provider, &of_clk_providers, link) { 5044 if (provider->node == clkspec->np) { 5045 hw = __of_clk_get_hw_from_provider(provider, clkspec); 5046 if (!IS_ERR(hw)) 5047 break; 5048 } 5049 } 5050 mutex_unlock(&of_clk_mutex); 5051 5052 return hw; 5053 } 5054 5055 /** 5056 * of_clk_get_from_provider() - Lookup a clock from a clock provider 5057 * @clkspec: pointer to a clock specifier data structure 5058 * 5059 * This function looks up a struct clk from the registered list of clock 5060 * providers, an input is a clock specifier data structure as returned 5061 * from the of_parse_phandle_with_args() function call. 5062 */ 5063 struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) 5064 { 5065 struct clk_hw *hw = of_clk_get_hw_from_clkspec(clkspec); 5066 5067 return clk_hw_create_clk(NULL, hw, NULL, __func__); 5068 } 5069 EXPORT_SYMBOL_GPL(of_clk_get_from_provider); 5070 5071 struct clk_hw *of_clk_get_hw(struct device_node *np, int index, 5072 const char *con_id) 5073 { 5074 int ret; 5075 struct clk_hw *hw; 5076 struct of_phandle_args clkspec; 5077 5078 ret = of_parse_clkspec(np, index, con_id, &clkspec); 5079 if (ret) 5080 return ERR_PTR(ret); 5081 5082 hw = of_clk_get_hw_from_clkspec(&clkspec); 5083 of_node_put(clkspec.np); 5084 5085 return hw; 5086 } 5087 5088 static struct clk *__of_clk_get(struct device_node *np, 5089 int index, const char *dev_id, 5090 const char *con_id) 5091 { 5092 struct clk_hw *hw = of_clk_get_hw(np, index, con_id); 5093 5094 return clk_hw_create_clk(NULL, hw, dev_id, con_id); 5095 } 5096 5097 struct clk *of_clk_get(struct device_node *np, int index) 5098 { 5099 return __of_clk_get(np, index, np->full_name, NULL); 5100 } 5101 EXPORT_SYMBOL(of_clk_get); 5102 5103 /** 5104 * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node 5105 * @np: pointer to clock consumer node 5106 * @name: name of consumer's clock input, or NULL for the first clock reference 5107 * 5108 * This function parses the clocks and clock-names properties, 5109 * and uses them to look up the struct clk from the registered list of clock 5110 * providers. 5111 */ 5112 struct clk *of_clk_get_by_name(struct device_node *np, const char *name) 5113 { 5114 if (!np) 5115 return ERR_PTR(-ENOENT); 5116 5117 return __of_clk_get(np, 0, np->full_name, name); 5118 } 5119 EXPORT_SYMBOL(of_clk_get_by_name); 5120 5121 /** 5122 * of_clk_get_parent_count() - Count the number of clocks a device node has 5123 * @np: device node to count 5124 * 5125 * Returns: The number of clocks that are possible parents of this node 5126 */ 5127 unsigned int of_clk_get_parent_count(const struct device_node *np) 5128 { 5129 int count; 5130 5131 count = of_count_phandle_with_args(np, "clocks", "#clock-cells"); 5132 if (count < 0) 5133 return 0; 5134 5135 return count; 5136 } 5137 EXPORT_SYMBOL_GPL(of_clk_get_parent_count); 5138 5139 const char *of_clk_get_parent_name(const struct device_node *np, int index) 5140 { 5141 struct of_phandle_args clkspec; 5142 struct property *prop; 5143 const char *clk_name; 5144 const __be32 *vp; 5145 u32 pv; 5146 int rc; 5147 int count; 5148 struct clk *clk; 5149 5150 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index, 5151 &clkspec); 5152 if (rc) 5153 return NULL; 5154 5155 index = clkspec.args_count ? clkspec.args[0] : 0; 5156 count = 0; 5157 5158 /* if there is an indices property, use it to transfer the index 5159 * specified into an array offset for the clock-output-names property. 5160 */ 5161 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) { 5162 if (index == pv) { 5163 index = count; 5164 break; 5165 } 5166 count++; 5167 } 5168 /* We went off the end of 'clock-indices' without finding it */ 5169 if (prop && !vp) 5170 return NULL; 5171 5172 if (of_property_read_string_index(clkspec.np, "clock-output-names", 5173 index, 5174 &clk_name) < 0) { 5175 /* 5176 * Best effort to get the name if the clock has been 5177 * registered with the framework. If the clock isn't 5178 * registered, we return the node name as the name of 5179 * the clock as long as #clock-cells = 0. 5180 */ 5181 clk = of_clk_get_from_provider(&clkspec); 5182 if (IS_ERR(clk)) { 5183 if (clkspec.args_count == 0) 5184 clk_name = clkspec.np->name; 5185 else 5186 clk_name = NULL; 5187 } else { 5188 clk_name = __clk_get_name(clk); 5189 clk_put(clk); 5190 } 5191 } 5192 5193 5194 of_node_put(clkspec.np); 5195 return clk_name; 5196 } 5197 EXPORT_SYMBOL_GPL(of_clk_get_parent_name); 5198 5199 /** 5200 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return 5201 * number of parents 5202 * @np: Device node pointer associated with clock provider 5203 * @parents: pointer to char array that hold the parents' names 5204 * @size: size of the @parents array 5205 * 5206 * Return: number of parents for the clock node. 5207 */ 5208 int of_clk_parent_fill(struct device_node *np, const char **parents, 5209 unsigned int size) 5210 { 5211 unsigned int i = 0; 5212 5213 while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL) 5214 i++; 5215 5216 return i; 5217 } 5218 EXPORT_SYMBOL_GPL(of_clk_parent_fill); 5219 5220 struct clock_provider { 5221 void (*clk_init_cb)(struct device_node *); 5222 struct device_node *np; 5223 struct list_head node; 5224 }; 5225 5226 /* 5227 * This function looks for a parent clock. If there is one, then it 5228 * checks that the provider for this parent clock was initialized, in 5229 * this case the parent clock will be ready. 5230 */ 5231 static int parent_ready(struct device_node *np) 5232 { 5233 int i = 0; 5234 5235 while (true) { 5236 struct clk *clk = of_clk_get(np, i); 5237 5238 /* this parent is ready we can check the next one */ 5239 if (!IS_ERR(clk)) { 5240 clk_put(clk); 5241 i++; 5242 continue; 5243 } 5244 5245 /* at least one parent is not ready, we exit now */ 5246 if (PTR_ERR(clk) == -EPROBE_DEFER) 5247 return 0; 5248 5249 /* 5250 * Here we make assumption that the device tree is 5251 * written correctly. So an error means that there is 5252 * no more parent. As we didn't exit yet, then the 5253 * previous parent are ready. If there is no clock 5254 * parent, no need to wait for them, then we can 5255 * consider their absence as being ready 5256 */ 5257 return 1; 5258 } 5259 } 5260 5261 /** 5262 * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree 5263 * @np: Device node pointer associated with clock provider 5264 * @index: clock index 5265 * @flags: pointer to top-level framework flags 5266 * 5267 * Detects if the clock-critical property exists and, if so, sets the 5268 * corresponding CLK_IS_CRITICAL flag. 5269 * 5270 * Do not use this function. It exists only for legacy Device Tree 5271 * bindings, such as the one-clock-per-node style that are outdated. 5272 * Those bindings typically put all clock data into .dts and the Linux 5273 * driver has no clock data, thus making it impossible to set this flag 5274 * correctly from the driver. Only those drivers may call 5275 * of_clk_detect_critical from their setup functions. 5276 * 5277 * Return: error code or zero on success 5278 */ 5279 int of_clk_detect_critical(struct device_node *np, int index, 5280 unsigned long *flags) 5281 { 5282 struct property *prop; 5283 const __be32 *cur; 5284 uint32_t idx; 5285 5286 if (!np || !flags) 5287 return -EINVAL; 5288 5289 of_property_for_each_u32(np, "clock-critical", prop, cur, idx) 5290 if (index == idx) 5291 *flags |= CLK_IS_CRITICAL; 5292 5293 return 0; 5294 } 5295 5296 /** 5297 * of_clk_init() - Scan and init clock providers from the DT 5298 * @matches: array of compatible values and init functions for providers. 5299 * 5300 * This function scans the device tree for matching clock providers 5301 * and calls their initialization functions. It also does it by trying 5302 * to follow the dependencies. 5303 */ 5304 void __init of_clk_init(const struct of_device_id *matches) 5305 { 5306 const struct of_device_id *match; 5307 struct device_node *np; 5308 struct clock_provider *clk_provider, *next; 5309 bool is_init_done; 5310 bool force = false; 5311 LIST_HEAD(clk_provider_list); 5312 5313 if (!matches) 5314 matches = &__clk_of_table; 5315 5316 /* First prepare the list of the clocks providers */ 5317 for_each_matching_node_and_match(np, matches, &match) { 5318 struct clock_provider *parent; 5319 5320 if (!of_device_is_available(np)) 5321 continue; 5322 5323 parent = kzalloc(sizeof(*parent), GFP_KERNEL); 5324 if (!parent) { 5325 list_for_each_entry_safe(clk_provider, next, 5326 &clk_provider_list, node) { 5327 list_del(&clk_provider->node); 5328 of_node_put(clk_provider->np); 5329 kfree(clk_provider); 5330 } 5331 of_node_put(np); 5332 return; 5333 } 5334 5335 parent->clk_init_cb = match->data; 5336 parent->np = of_node_get(np); 5337 list_add_tail(&parent->node, &clk_provider_list); 5338 } 5339 5340 while (!list_empty(&clk_provider_list)) { 5341 is_init_done = false; 5342 list_for_each_entry_safe(clk_provider, next, 5343 &clk_provider_list, node) { 5344 if (force || parent_ready(clk_provider->np)) { 5345 5346 /* Don't populate platform devices */ 5347 of_node_set_flag(clk_provider->np, 5348 OF_POPULATED); 5349 5350 clk_provider->clk_init_cb(clk_provider->np); 5351 of_clk_set_defaults(clk_provider->np, true); 5352 5353 list_del(&clk_provider->node); 5354 of_node_put(clk_provider->np); 5355 kfree(clk_provider); 5356 is_init_done = true; 5357 } 5358 } 5359 5360 /* 5361 * We didn't manage to initialize any of the 5362 * remaining providers during the last loop, so now we 5363 * initialize all the remaining ones unconditionally 5364 * in case the clock parent was not mandatory 5365 */ 5366 if (!is_init_done) 5367 force = true; 5368 } 5369 } 5370 #endif 5371