1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com> 4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> 5 * 6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst 7 */ 8 9 #include <linux/clk.h> 10 #include <linux/clk-provider.h> 11 #include <linux/clk/clk-conf.h> 12 #include <linux/module.h> 13 #include <linux/mutex.h> 14 #include <linux/spinlock.h> 15 #include <linux/err.h> 16 #include <linux/list.h> 17 #include <linux/slab.h> 18 #include <linux/of.h> 19 #include <linux/device.h> 20 #include <linux/init.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/sched.h> 23 #include <linux/clkdev.h> 24 25 #include "clk.h" 26 27 static DEFINE_SPINLOCK(enable_lock); 28 static DEFINE_MUTEX(prepare_lock); 29 30 static struct task_struct *prepare_owner; 31 static struct task_struct *enable_owner; 32 33 static int prepare_refcnt; 34 static int enable_refcnt; 35 36 static HLIST_HEAD(clk_root_list); 37 static HLIST_HEAD(clk_orphan_list); 38 static LIST_HEAD(clk_notifier_list); 39 40 static const struct hlist_head *all_lists[] = { 41 &clk_root_list, 42 &clk_orphan_list, 43 NULL, 44 }; 45 46 /*** private data structures ***/ 47 48 struct clk_parent_map { 49 const struct clk_hw *hw; 50 struct clk_core *core; 51 const char *fw_name; 52 const char *name; 53 int index; 54 }; 55 56 struct clk_core { 57 const char *name; 58 const struct clk_ops *ops; 59 struct clk_hw *hw; 60 struct module *owner; 61 struct device *dev; 62 struct device_node *of_node; 63 struct clk_core *parent; 64 struct clk_parent_map *parents; 65 u8 num_parents; 66 u8 new_parent_index; 67 unsigned long rate; 68 unsigned long req_rate; 69 unsigned long new_rate; 70 struct clk_core *new_parent; 71 struct clk_core *new_child; 72 unsigned long flags; 73 bool orphan; 74 bool rpm_enabled; 75 unsigned int enable_count; 76 unsigned int prepare_count; 77 unsigned int protect_count; 78 unsigned long min_rate; 79 unsigned long max_rate; 80 unsigned long accuracy; 81 int phase; 82 struct clk_duty duty; 83 struct hlist_head children; 84 struct hlist_node child_node; 85 struct hlist_head clks; 86 unsigned int notifier_count; 87 #ifdef CONFIG_DEBUG_FS 88 struct dentry *dentry; 89 struct hlist_node debug_node; 90 #endif 91 struct kref ref; 92 }; 93 94 #define CREATE_TRACE_POINTS 95 #include <trace/events/clk.h> 96 97 struct clk { 98 struct clk_core *core; 99 struct device *dev; 100 const char *dev_id; 101 const char *con_id; 102 unsigned long min_rate; 103 unsigned long max_rate; 104 unsigned int exclusive_count; 105 struct hlist_node clks_node; 106 }; 107 108 /*** runtime pm ***/ 109 static int clk_pm_runtime_get(struct clk_core *core) 110 { 111 if (!core->rpm_enabled) 112 return 0; 113 114 return pm_runtime_resume_and_get(core->dev); 115 } 116 117 static void clk_pm_runtime_put(struct clk_core *core) 118 { 119 if (!core->rpm_enabled) 120 return; 121 122 pm_runtime_put_sync(core->dev); 123 } 124 125 /*** locking ***/ 126 static void clk_prepare_lock(void) 127 { 128 if (!mutex_trylock(&prepare_lock)) { 129 if (prepare_owner == current) { 130 prepare_refcnt++; 131 return; 132 } 133 mutex_lock(&prepare_lock); 134 } 135 WARN_ON_ONCE(prepare_owner != NULL); 136 WARN_ON_ONCE(prepare_refcnt != 0); 137 prepare_owner = current; 138 prepare_refcnt = 1; 139 } 140 141 static void clk_prepare_unlock(void) 142 { 143 WARN_ON_ONCE(prepare_owner != current); 144 WARN_ON_ONCE(prepare_refcnt == 0); 145 146 if (--prepare_refcnt) 147 return; 148 prepare_owner = NULL; 149 mutex_unlock(&prepare_lock); 150 } 151 152 static unsigned long clk_enable_lock(void) 153 __acquires(enable_lock) 154 { 155 unsigned long flags; 156 157 /* 158 * On UP systems, spin_trylock_irqsave() always returns true, even if 159 * we already hold the lock. So, in that case, we rely only on 160 * reference counting. 161 */ 162 if (!IS_ENABLED(CONFIG_SMP) || 163 !spin_trylock_irqsave(&enable_lock, flags)) { 164 if (enable_owner == current) { 165 enable_refcnt++; 166 __acquire(enable_lock); 167 if (!IS_ENABLED(CONFIG_SMP)) 168 local_save_flags(flags); 169 return flags; 170 } 171 spin_lock_irqsave(&enable_lock, flags); 172 } 173 WARN_ON_ONCE(enable_owner != NULL); 174 WARN_ON_ONCE(enable_refcnt != 0); 175 enable_owner = current; 176 enable_refcnt = 1; 177 return flags; 178 } 179 180 static void clk_enable_unlock(unsigned long flags) 181 __releases(enable_lock) 182 { 183 WARN_ON_ONCE(enable_owner != current); 184 WARN_ON_ONCE(enable_refcnt == 0); 185 186 if (--enable_refcnt) { 187 __release(enable_lock); 188 return; 189 } 190 enable_owner = NULL; 191 spin_unlock_irqrestore(&enable_lock, flags); 192 } 193 194 static bool clk_core_rate_is_protected(struct clk_core *core) 195 { 196 return core->protect_count; 197 } 198 199 static bool clk_core_is_prepared(struct clk_core *core) 200 { 201 bool ret = false; 202 203 /* 204 * .is_prepared is optional for clocks that can prepare 205 * fall back to software usage counter if it is missing 206 */ 207 if (!core->ops->is_prepared) 208 return core->prepare_count; 209 210 if (!clk_pm_runtime_get(core)) { 211 ret = core->ops->is_prepared(core->hw); 212 clk_pm_runtime_put(core); 213 } 214 215 return ret; 216 } 217 218 static bool clk_core_is_enabled(struct clk_core *core) 219 { 220 bool ret = false; 221 222 /* 223 * .is_enabled is only mandatory for clocks that gate 224 * fall back to software usage counter if .is_enabled is missing 225 */ 226 if (!core->ops->is_enabled) 227 return core->enable_count; 228 229 /* 230 * Check if clock controller's device is runtime active before 231 * calling .is_enabled callback. If not, assume that clock is 232 * disabled, because we might be called from atomic context, from 233 * which pm_runtime_get() is not allowed. 234 * This function is called mainly from clk_disable_unused_subtree, 235 * which ensures proper runtime pm activation of controller before 236 * taking enable spinlock, but the below check is needed if one tries 237 * to call it from other places. 238 */ 239 if (core->rpm_enabled) { 240 pm_runtime_get_noresume(core->dev); 241 if (!pm_runtime_active(core->dev)) { 242 ret = false; 243 goto done; 244 } 245 } 246 247 /* 248 * This could be called with the enable lock held, or from atomic 249 * context. If the parent isn't enabled already, we can't do 250 * anything here. We can also assume this clock isn't enabled. 251 */ 252 if ((core->flags & CLK_OPS_PARENT_ENABLE) && core->parent) 253 if (!clk_core_is_enabled(core->parent)) { 254 ret = false; 255 goto done; 256 } 257 258 ret = core->ops->is_enabled(core->hw); 259 done: 260 if (core->rpm_enabled) 261 pm_runtime_put(core->dev); 262 263 return ret; 264 } 265 266 /*** helper functions ***/ 267 268 const char *__clk_get_name(const struct clk *clk) 269 { 270 return !clk ? NULL : clk->core->name; 271 } 272 EXPORT_SYMBOL_GPL(__clk_get_name); 273 274 const char *clk_hw_get_name(const struct clk_hw *hw) 275 { 276 return hw->core->name; 277 } 278 EXPORT_SYMBOL_GPL(clk_hw_get_name); 279 280 struct clk_hw *__clk_get_hw(struct clk *clk) 281 { 282 return !clk ? NULL : clk->core->hw; 283 } 284 EXPORT_SYMBOL_GPL(__clk_get_hw); 285 286 unsigned int clk_hw_get_num_parents(const struct clk_hw *hw) 287 { 288 return hw->core->num_parents; 289 } 290 EXPORT_SYMBOL_GPL(clk_hw_get_num_parents); 291 292 struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw) 293 { 294 return hw->core->parent ? hw->core->parent->hw : NULL; 295 } 296 EXPORT_SYMBOL_GPL(clk_hw_get_parent); 297 298 static struct clk_core *__clk_lookup_subtree(const char *name, 299 struct clk_core *core) 300 { 301 struct clk_core *child; 302 struct clk_core *ret; 303 304 if (!strcmp(core->name, name)) 305 return core; 306 307 hlist_for_each_entry(child, &core->children, child_node) { 308 ret = __clk_lookup_subtree(name, child); 309 if (ret) 310 return ret; 311 } 312 313 return NULL; 314 } 315 316 static struct clk_core *clk_core_lookup(const char *name) 317 { 318 struct clk_core *root_clk; 319 struct clk_core *ret; 320 321 if (!name) 322 return NULL; 323 324 /* search the 'proper' clk tree first */ 325 hlist_for_each_entry(root_clk, &clk_root_list, child_node) { 326 ret = __clk_lookup_subtree(name, root_clk); 327 if (ret) 328 return ret; 329 } 330 331 /* if not found, then search the orphan tree */ 332 hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) { 333 ret = __clk_lookup_subtree(name, root_clk); 334 if (ret) 335 return ret; 336 } 337 338 return NULL; 339 } 340 341 #ifdef CONFIG_OF 342 static int of_parse_clkspec(const struct device_node *np, int index, 343 const char *name, struct of_phandle_args *out_args); 344 static struct clk_hw * 345 of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec); 346 #else 347 static inline int of_parse_clkspec(const struct device_node *np, int index, 348 const char *name, 349 struct of_phandle_args *out_args) 350 { 351 return -ENOENT; 352 } 353 static inline struct clk_hw * 354 of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec) 355 { 356 return ERR_PTR(-ENOENT); 357 } 358 #endif 359 360 /** 361 * clk_core_get - Find the clk_core parent of a clk 362 * @core: clk to find parent of 363 * @p_index: parent index to search for 364 * 365 * This is the preferred method for clk providers to find the parent of a 366 * clk when that parent is external to the clk controller. The parent_names 367 * array is indexed and treated as a local name matching a string in the device 368 * node's 'clock-names' property or as the 'con_id' matching the device's 369 * dev_name() in a clk_lookup. This allows clk providers to use their own 370 * namespace instead of looking for a globally unique parent string. 371 * 372 * For example the following DT snippet would allow a clock registered by the 373 * clock-controller@c001 that has a clk_init_data::parent_data array 374 * with 'xtal' in the 'name' member to find the clock provided by the 375 * clock-controller@f00abcd without needing to get the globally unique name of 376 * the xtal clk. 377 * 378 * parent: clock-controller@f00abcd { 379 * reg = <0xf00abcd 0xabcd>; 380 * #clock-cells = <0>; 381 * }; 382 * 383 * clock-controller@c001 { 384 * reg = <0xc001 0xf00d>; 385 * clocks = <&parent>; 386 * clock-names = "xtal"; 387 * #clock-cells = <1>; 388 * }; 389 * 390 * Returns: -ENOENT when the provider can't be found or the clk doesn't 391 * exist in the provider or the name can't be found in the DT node or 392 * in a clkdev lookup. NULL when the provider knows about the clk but it 393 * isn't provided on this system. 394 * A valid clk_core pointer when the clk can be found in the provider. 395 */ 396 static struct clk_core *clk_core_get(struct clk_core *core, u8 p_index) 397 { 398 const char *name = core->parents[p_index].fw_name; 399 int index = core->parents[p_index].index; 400 struct clk_hw *hw = ERR_PTR(-ENOENT); 401 struct device *dev = core->dev; 402 const char *dev_id = dev ? dev_name(dev) : NULL; 403 struct device_node *np = core->of_node; 404 struct of_phandle_args clkspec; 405 406 if (np && (name || index >= 0) && 407 !of_parse_clkspec(np, index, name, &clkspec)) { 408 hw = of_clk_get_hw_from_clkspec(&clkspec); 409 of_node_put(clkspec.np); 410 } else if (name) { 411 /* 412 * If the DT search above couldn't find the provider fallback to 413 * looking up via clkdev based clk_lookups. 414 */ 415 hw = clk_find_hw(dev_id, name); 416 } 417 418 if (IS_ERR(hw)) 419 return ERR_CAST(hw); 420 421 if (!hw) 422 return NULL; 423 424 return hw->core; 425 } 426 427 static void clk_core_fill_parent_index(struct clk_core *core, u8 index) 428 { 429 struct clk_parent_map *entry = &core->parents[index]; 430 struct clk_core *parent; 431 432 if (entry->hw) { 433 parent = entry->hw->core; 434 } else { 435 parent = clk_core_get(core, index); 436 if (PTR_ERR(parent) == -ENOENT && entry->name) 437 parent = clk_core_lookup(entry->name); 438 } 439 440 /* 441 * We have a direct reference but it isn't registered yet? 442 * Orphan it and let clk_reparent() update the orphan status 443 * when the parent is registered. 444 */ 445 if (!parent) 446 parent = ERR_PTR(-EPROBE_DEFER); 447 448 /* Only cache it if it's not an error */ 449 if (!IS_ERR(parent)) 450 entry->core = parent; 451 } 452 453 static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core, 454 u8 index) 455 { 456 if (!core || index >= core->num_parents || !core->parents) 457 return NULL; 458 459 if (!core->parents[index].core) 460 clk_core_fill_parent_index(core, index); 461 462 return core->parents[index].core; 463 } 464 465 struct clk_hw * 466 clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index) 467 { 468 struct clk_core *parent; 469 470 parent = clk_core_get_parent_by_index(hw->core, index); 471 472 return !parent ? NULL : parent->hw; 473 } 474 EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index); 475 476 unsigned int __clk_get_enable_count(struct clk *clk) 477 { 478 return !clk ? 0 : clk->core->enable_count; 479 } 480 481 static unsigned long clk_core_get_rate_nolock(struct clk_core *core) 482 { 483 if (!core) 484 return 0; 485 486 if (!core->num_parents || core->parent) 487 return core->rate; 488 489 /* 490 * Clk must have a parent because num_parents > 0 but the parent isn't 491 * known yet. Best to return 0 as the rate of this clk until we can 492 * properly recalc the rate based on the parent's rate. 493 */ 494 return 0; 495 } 496 497 unsigned long clk_hw_get_rate(const struct clk_hw *hw) 498 { 499 return clk_core_get_rate_nolock(hw->core); 500 } 501 EXPORT_SYMBOL_GPL(clk_hw_get_rate); 502 503 static unsigned long clk_core_get_accuracy_no_lock(struct clk_core *core) 504 { 505 if (!core) 506 return 0; 507 508 return core->accuracy; 509 } 510 511 unsigned long clk_hw_get_flags(const struct clk_hw *hw) 512 { 513 return hw->core->flags; 514 } 515 EXPORT_SYMBOL_GPL(clk_hw_get_flags); 516 517 bool clk_hw_is_prepared(const struct clk_hw *hw) 518 { 519 return clk_core_is_prepared(hw->core); 520 } 521 EXPORT_SYMBOL_GPL(clk_hw_is_prepared); 522 523 bool clk_hw_rate_is_protected(const struct clk_hw *hw) 524 { 525 return clk_core_rate_is_protected(hw->core); 526 } 527 EXPORT_SYMBOL_GPL(clk_hw_rate_is_protected); 528 529 bool clk_hw_is_enabled(const struct clk_hw *hw) 530 { 531 return clk_core_is_enabled(hw->core); 532 } 533 EXPORT_SYMBOL_GPL(clk_hw_is_enabled); 534 535 bool __clk_is_enabled(struct clk *clk) 536 { 537 if (!clk) 538 return false; 539 540 return clk_core_is_enabled(clk->core); 541 } 542 EXPORT_SYMBOL_GPL(__clk_is_enabled); 543 544 static bool mux_is_better_rate(unsigned long rate, unsigned long now, 545 unsigned long best, unsigned long flags) 546 { 547 if (flags & CLK_MUX_ROUND_CLOSEST) 548 return abs(now - rate) < abs(best - rate); 549 550 return now <= rate && now > best; 551 } 552 553 static void clk_core_init_rate_req(struct clk_core * const core, 554 struct clk_rate_request *req, 555 unsigned long rate); 556 557 static int clk_core_round_rate_nolock(struct clk_core *core, 558 struct clk_rate_request *req); 559 560 static bool clk_core_has_parent(struct clk_core *core, const struct clk_core *parent) 561 { 562 struct clk_core *tmp; 563 unsigned int i; 564 565 /* Optimize for the case where the parent is already the parent. */ 566 if (core->parent == parent) 567 return true; 568 569 for (i = 0; i < core->num_parents; i++) { 570 tmp = clk_core_get_parent_by_index(core, i); 571 if (!tmp) 572 continue; 573 574 if (tmp == parent) 575 return true; 576 } 577 578 return false; 579 } 580 581 static void 582 clk_core_forward_rate_req(struct clk_core *core, 583 const struct clk_rate_request *old_req, 584 struct clk_core *parent, 585 struct clk_rate_request *req, 586 unsigned long parent_rate) 587 { 588 if (WARN_ON(!clk_core_has_parent(core, parent))) 589 return; 590 591 clk_core_init_rate_req(parent, req, parent_rate); 592 593 if (req->min_rate < old_req->min_rate) 594 req->min_rate = old_req->min_rate; 595 596 if (req->max_rate > old_req->max_rate) 597 req->max_rate = old_req->max_rate; 598 } 599 600 static int 601 clk_core_determine_rate_no_reparent(struct clk_hw *hw, 602 struct clk_rate_request *req) 603 { 604 struct clk_core *core = hw->core; 605 struct clk_core *parent = core->parent; 606 unsigned long best; 607 int ret; 608 609 if (core->flags & CLK_SET_RATE_PARENT) { 610 struct clk_rate_request parent_req; 611 612 if (!parent) { 613 req->rate = 0; 614 return 0; 615 } 616 617 clk_core_forward_rate_req(core, req, parent, &parent_req, 618 req->rate); 619 620 trace_clk_rate_request_start(&parent_req); 621 622 ret = clk_core_round_rate_nolock(parent, &parent_req); 623 if (ret) 624 return ret; 625 626 trace_clk_rate_request_done(&parent_req); 627 628 best = parent_req.rate; 629 } else if (parent) { 630 best = clk_core_get_rate_nolock(parent); 631 } else { 632 best = clk_core_get_rate_nolock(core); 633 } 634 635 req->best_parent_rate = best; 636 req->rate = best; 637 638 return 0; 639 } 640 641 int clk_mux_determine_rate_flags(struct clk_hw *hw, 642 struct clk_rate_request *req, 643 unsigned long flags) 644 { 645 struct clk_core *core = hw->core, *parent, *best_parent = NULL; 646 int i, num_parents, ret; 647 unsigned long best = 0; 648 649 /* if NO_REPARENT flag set, pass through to current parent */ 650 if (core->flags & CLK_SET_RATE_NO_REPARENT) 651 return clk_core_determine_rate_no_reparent(hw, req); 652 653 /* find the parent that can provide the fastest rate <= rate */ 654 num_parents = core->num_parents; 655 for (i = 0; i < num_parents; i++) { 656 unsigned long parent_rate; 657 658 parent = clk_core_get_parent_by_index(core, i); 659 if (!parent) 660 continue; 661 662 if (core->flags & CLK_SET_RATE_PARENT) { 663 struct clk_rate_request parent_req; 664 665 clk_core_forward_rate_req(core, req, parent, &parent_req, req->rate); 666 667 trace_clk_rate_request_start(&parent_req); 668 669 ret = clk_core_round_rate_nolock(parent, &parent_req); 670 if (ret) 671 continue; 672 673 trace_clk_rate_request_done(&parent_req); 674 675 parent_rate = parent_req.rate; 676 } else { 677 parent_rate = clk_core_get_rate_nolock(parent); 678 } 679 680 if (mux_is_better_rate(req->rate, parent_rate, 681 best, flags)) { 682 best_parent = parent; 683 best = parent_rate; 684 } 685 } 686 687 if (!best_parent) 688 return -EINVAL; 689 690 req->best_parent_hw = best_parent->hw; 691 req->best_parent_rate = best; 692 req->rate = best; 693 694 return 0; 695 } 696 EXPORT_SYMBOL_GPL(clk_mux_determine_rate_flags); 697 698 struct clk *__clk_lookup(const char *name) 699 { 700 struct clk_core *core = clk_core_lookup(name); 701 702 return !core ? NULL : core->hw->clk; 703 } 704 705 static void clk_core_get_boundaries(struct clk_core *core, 706 unsigned long *min_rate, 707 unsigned long *max_rate) 708 { 709 struct clk *clk_user; 710 711 lockdep_assert_held(&prepare_lock); 712 713 *min_rate = core->min_rate; 714 *max_rate = core->max_rate; 715 716 hlist_for_each_entry(clk_user, &core->clks, clks_node) 717 *min_rate = max(*min_rate, clk_user->min_rate); 718 719 hlist_for_each_entry(clk_user, &core->clks, clks_node) 720 *max_rate = min(*max_rate, clk_user->max_rate); 721 } 722 723 /* 724 * clk_hw_get_rate_range() - returns the clock rate range for a hw clk 725 * @hw: the hw clk we want to get the range from 726 * @min_rate: pointer to the variable that will hold the minimum 727 * @max_rate: pointer to the variable that will hold the maximum 728 * 729 * Fills the @min_rate and @max_rate variables with the minimum and 730 * maximum that clock can reach. 731 */ 732 void clk_hw_get_rate_range(struct clk_hw *hw, unsigned long *min_rate, 733 unsigned long *max_rate) 734 { 735 clk_core_get_boundaries(hw->core, min_rate, max_rate); 736 } 737 EXPORT_SYMBOL_GPL(clk_hw_get_rate_range); 738 739 static bool clk_core_check_boundaries(struct clk_core *core, 740 unsigned long min_rate, 741 unsigned long max_rate) 742 { 743 struct clk *user; 744 745 lockdep_assert_held(&prepare_lock); 746 747 if (min_rate > core->max_rate || max_rate < core->min_rate) 748 return false; 749 750 hlist_for_each_entry(user, &core->clks, clks_node) 751 if (min_rate > user->max_rate || max_rate < user->min_rate) 752 return false; 753 754 return true; 755 } 756 757 void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate, 758 unsigned long max_rate) 759 { 760 hw->core->min_rate = min_rate; 761 hw->core->max_rate = max_rate; 762 } 763 EXPORT_SYMBOL_GPL(clk_hw_set_rate_range); 764 765 /* 766 * __clk_mux_determine_rate - clk_ops::determine_rate implementation for a mux type clk 767 * @hw: mux type clk to determine rate on 768 * @req: rate request, also used to return preferred parent and frequencies 769 * 770 * Helper for finding best parent to provide a given frequency. This can be used 771 * directly as a determine_rate callback (e.g. for a mux), or from a more 772 * complex clock that may combine a mux with other operations. 773 * 774 * Returns: 0 on success, -EERROR value on error 775 */ 776 int __clk_mux_determine_rate(struct clk_hw *hw, 777 struct clk_rate_request *req) 778 { 779 return clk_mux_determine_rate_flags(hw, req, 0); 780 } 781 EXPORT_SYMBOL_GPL(__clk_mux_determine_rate); 782 783 int __clk_mux_determine_rate_closest(struct clk_hw *hw, 784 struct clk_rate_request *req) 785 { 786 return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST); 787 } 788 EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest); 789 790 /* 791 * clk_hw_determine_rate_no_reparent - clk_ops::determine_rate implementation for a clk that doesn't reparent 792 * @hw: mux type clk to determine rate on 793 * @req: rate request, also used to return preferred frequency 794 * 795 * Helper for finding best parent rate to provide a given frequency. 796 * This can be used directly as a determine_rate callback (e.g. for a 797 * mux), or from a more complex clock that may combine a mux with other 798 * operations. 799 * 800 * Returns: 0 on success, -EERROR value on error 801 */ 802 int clk_hw_determine_rate_no_reparent(struct clk_hw *hw, 803 struct clk_rate_request *req) 804 { 805 return clk_core_determine_rate_no_reparent(hw, req); 806 } 807 EXPORT_SYMBOL_GPL(clk_hw_determine_rate_no_reparent); 808 809 /*** clk api ***/ 810 811 static void clk_core_rate_unprotect(struct clk_core *core) 812 { 813 lockdep_assert_held(&prepare_lock); 814 815 if (!core) 816 return; 817 818 if (WARN(core->protect_count == 0, 819 "%s already unprotected\n", core->name)) 820 return; 821 822 if (--core->protect_count > 0) 823 return; 824 825 clk_core_rate_unprotect(core->parent); 826 } 827 828 static int clk_core_rate_nuke_protect(struct clk_core *core) 829 { 830 int ret; 831 832 lockdep_assert_held(&prepare_lock); 833 834 if (!core) 835 return -EINVAL; 836 837 if (core->protect_count == 0) 838 return 0; 839 840 ret = core->protect_count; 841 core->protect_count = 1; 842 clk_core_rate_unprotect(core); 843 844 return ret; 845 } 846 847 /** 848 * clk_rate_exclusive_put - release exclusivity over clock rate control 849 * @clk: the clk over which the exclusivity is released 850 * 851 * clk_rate_exclusive_put() completes a critical section during which a clock 852 * consumer cannot tolerate any other consumer making any operation on the 853 * clock which could result in a rate change or rate glitch. Exclusive clocks 854 * cannot have their rate changed, either directly or indirectly due to changes 855 * further up the parent chain of clocks. As a result, clocks up parent chain 856 * also get under exclusive control of the calling consumer. 857 * 858 * If exlusivity is claimed more than once on clock, even by the same consumer, 859 * the rate effectively gets locked as exclusivity can't be preempted. 860 * 861 * Calls to clk_rate_exclusive_put() must be balanced with calls to 862 * clk_rate_exclusive_get(). Calls to this function may sleep, and do not return 863 * error status. 864 */ 865 void clk_rate_exclusive_put(struct clk *clk) 866 { 867 if (!clk) 868 return; 869 870 clk_prepare_lock(); 871 872 /* 873 * if there is something wrong with this consumer protect count, stop 874 * here before messing with the provider 875 */ 876 if (WARN_ON(clk->exclusive_count <= 0)) 877 goto out; 878 879 clk_core_rate_unprotect(clk->core); 880 clk->exclusive_count--; 881 out: 882 clk_prepare_unlock(); 883 } 884 EXPORT_SYMBOL_GPL(clk_rate_exclusive_put); 885 886 static void clk_core_rate_protect(struct clk_core *core) 887 { 888 lockdep_assert_held(&prepare_lock); 889 890 if (!core) 891 return; 892 893 if (core->protect_count == 0) 894 clk_core_rate_protect(core->parent); 895 896 core->protect_count++; 897 } 898 899 static void clk_core_rate_restore_protect(struct clk_core *core, int count) 900 { 901 lockdep_assert_held(&prepare_lock); 902 903 if (!core) 904 return; 905 906 if (count == 0) 907 return; 908 909 clk_core_rate_protect(core); 910 core->protect_count = count; 911 } 912 913 /** 914 * clk_rate_exclusive_get - get exclusivity over the clk rate control 915 * @clk: the clk over which the exclusity of rate control is requested 916 * 917 * clk_rate_exclusive_get() begins a critical section during which a clock 918 * consumer cannot tolerate any other consumer making any operation on the 919 * clock which could result in a rate change or rate glitch. Exclusive clocks 920 * cannot have their rate changed, either directly or indirectly due to changes 921 * further up the parent chain of clocks. As a result, clocks up parent chain 922 * also get under exclusive control of the calling consumer. 923 * 924 * If exlusivity is claimed more than once on clock, even by the same consumer, 925 * the rate effectively gets locked as exclusivity can't be preempted. 926 * 927 * Calls to clk_rate_exclusive_get() should be balanced with calls to 928 * clk_rate_exclusive_put(). Calls to this function may sleep. 929 * Returns 0 on success, -EERROR otherwise 930 */ 931 int clk_rate_exclusive_get(struct clk *clk) 932 { 933 if (!clk) 934 return 0; 935 936 clk_prepare_lock(); 937 clk_core_rate_protect(clk->core); 938 clk->exclusive_count++; 939 clk_prepare_unlock(); 940 941 return 0; 942 } 943 EXPORT_SYMBOL_GPL(clk_rate_exclusive_get); 944 945 static void devm_clk_rate_exclusive_put(void *data) 946 { 947 struct clk *clk = data; 948 949 clk_rate_exclusive_put(clk); 950 } 951 952 int devm_clk_rate_exclusive_get(struct device *dev, struct clk *clk) 953 { 954 int ret; 955 956 ret = clk_rate_exclusive_get(clk); 957 if (ret) 958 return ret; 959 960 return devm_add_action_or_reset(dev, devm_clk_rate_exclusive_put, clk); 961 } 962 EXPORT_SYMBOL_GPL(devm_clk_rate_exclusive_get); 963 964 static void clk_core_unprepare(struct clk_core *core) 965 { 966 lockdep_assert_held(&prepare_lock); 967 968 if (!core) 969 return; 970 971 if (WARN(core->prepare_count == 0, 972 "%s already unprepared\n", core->name)) 973 return; 974 975 if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL, 976 "Unpreparing critical %s\n", core->name)) 977 return; 978 979 if (core->flags & CLK_SET_RATE_GATE) 980 clk_core_rate_unprotect(core); 981 982 if (--core->prepare_count > 0) 983 return; 984 985 WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name); 986 987 trace_clk_unprepare(core); 988 989 if (core->ops->unprepare) 990 core->ops->unprepare(core->hw); 991 992 trace_clk_unprepare_complete(core); 993 clk_core_unprepare(core->parent); 994 clk_pm_runtime_put(core); 995 } 996 997 static void clk_core_unprepare_lock(struct clk_core *core) 998 { 999 clk_prepare_lock(); 1000 clk_core_unprepare(core); 1001 clk_prepare_unlock(); 1002 } 1003 1004 /** 1005 * clk_unprepare - undo preparation of a clock source 1006 * @clk: the clk being unprepared 1007 * 1008 * clk_unprepare may sleep, which differentiates it from clk_disable. In a 1009 * simple case, clk_unprepare can be used instead of clk_disable to gate a clk 1010 * if the operation may sleep. One example is a clk which is accessed over 1011 * I2c. In the complex case a clk gate operation may require a fast and a slow 1012 * part. It is this reason that clk_unprepare and clk_disable are not mutually 1013 * exclusive. In fact clk_disable must be called before clk_unprepare. 1014 */ 1015 void clk_unprepare(struct clk *clk) 1016 { 1017 if (IS_ERR_OR_NULL(clk)) 1018 return; 1019 1020 clk_core_unprepare_lock(clk->core); 1021 } 1022 EXPORT_SYMBOL_GPL(clk_unprepare); 1023 1024 static int clk_core_prepare(struct clk_core *core) 1025 { 1026 int ret = 0; 1027 1028 lockdep_assert_held(&prepare_lock); 1029 1030 if (!core) 1031 return 0; 1032 1033 if (core->prepare_count == 0) { 1034 ret = clk_pm_runtime_get(core); 1035 if (ret) 1036 return ret; 1037 1038 ret = clk_core_prepare(core->parent); 1039 if (ret) 1040 goto runtime_put; 1041 1042 trace_clk_prepare(core); 1043 1044 if (core->ops->prepare) 1045 ret = core->ops->prepare(core->hw); 1046 1047 trace_clk_prepare_complete(core); 1048 1049 if (ret) 1050 goto unprepare; 1051 } 1052 1053 core->prepare_count++; 1054 1055 /* 1056 * CLK_SET_RATE_GATE is a special case of clock protection 1057 * Instead of a consumer claiming exclusive rate control, it is 1058 * actually the provider which prevents any consumer from making any 1059 * operation which could result in a rate change or rate glitch while 1060 * the clock is prepared. 1061 */ 1062 if (core->flags & CLK_SET_RATE_GATE) 1063 clk_core_rate_protect(core); 1064 1065 return 0; 1066 unprepare: 1067 clk_core_unprepare(core->parent); 1068 runtime_put: 1069 clk_pm_runtime_put(core); 1070 return ret; 1071 } 1072 1073 static int clk_core_prepare_lock(struct clk_core *core) 1074 { 1075 int ret; 1076 1077 clk_prepare_lock(); 1078 ret = clk_core_prepare(core); 1079 clk_prepare_unlock(); 1080 1081 return ret; 1082 } 1083 1084 /** 1085 * clk_prepare - prepare a clock source 1086 * @clk: the clk being prepared 1087 * 1088 * clk_prepare may sleep, which differentiates it from clk_enable. In a simple 1089 * case, clk_prepare can be used instead of clk_enable to ungate a clk if the 1090 * operation may sleep. One example is a clk which is accessed over I2c. In 1091 * the complex case a clk ungate operation may require a fast and a slow part. 1092 * It is this reason that clk_prepare and clk_enable are not mutually 1093 * exclusive. In fact clk_prepare must be called before clk_enable. 1094 * Returns 0 on success, -EERROR otherwise. 1095 */ 1096 int clk_prepare(struct clk *clk) 1097 { 1098 if (!clk) 1099 return 0; 1100 1101 return clk_core_prepare_lock(clk->core); 1102 } 1103 EXPORT_SYMBOL_GPL(clk_prepare); 1104 1105 static void clk_core_disable(struct clk_core *core) 1106 { 1107 lockdep_assert_held(&enable_lock); 1108 1109 if (!core) 1110 return; 1111 1112 if (WARN(core->enable_count == 0, "%s already disabled\n", core->name)) 1113 return; 1114 1115 if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL, 1116 "Disabling critical %s\n", core->name)) 1117 return; 1118 1119 if (--core->enable_count > 0) 1120 return; 1121 1122 trace_clk_disable(core); 1123 1124 if (core->ops->disable) 1125 core->ops->disable(core->hw); 1126 1127 trace_clk_disable_complete(core); 1128 1129 clk_core_disable(core->parent); 1130 } 1131 1132 static void clk_core_disable_lock(struct clk_core *core) 1133 { 1134 unsigned long flags; 1135 1136 flags = clk_enable_lock(); 1137 clk_core_disable(core); 1138 clk_enable_unlock(flags); 1139 } 1140 1141 /** 1142 * clk_disable - gate a clock 1143 * @clk: the clk being gated 1144 * 1145 * clk_disable must not sleep, which differentiates it from clk_unprepare. In 1146 * a simple case, clk_disable can be used instead of clk_unprepare to gate a 1147 * clk if the operation is fast and will never sleep. One example is a 1148 * SoC-internal clk which is controlled via simple register writes. In the 1149 * complex case a clk gate operation may require a fast and a slow part. It is 1150 * this reason that clk_unprepare and clk_disable are not mutually exclusive. 1151 * In fact clk_disable must be called before clk_unprepare. 1152 */ 1153 void clk_disable(struct clk *clk) 1154 { 1155 if (IS_ERR_OR_NULL(clk)) 1156 return; 1157 1158 clk_core_disable_lock(clk->core); 1159 } 1160 EXPORT_SYMBOL_GPL(clk_disable); 1161 1162 static int clk_core_enable(struct clk_core *core) 1163 { 1164 int ret = 0; 1165 1166 lockdep_assert_held(&enable_lock); 1167 1168 if (!core) 1169 return 0; 1170 1171 if (WARN(core->prepare_count == 0, 1172 "Enabling unprepared %s\n", core->name)) 1173 return -ESHUTDOWN; 1174 1175 if (core->enable_count == 0) { 1176 ret = clk_core_enable(core->parent); 1177 1178 if (ret) 1179 return ret; 1180 1181 trace_clk_enable(core); 1182 1183 if (core->ops->enable) 1184 ret = core->ops->enable(core->hw); 1185 1186 trace_clk_enable_complete(core); 1187 1188 if (ret) { 1189 clk_core_disable(core->parent); 1190 return ret; 1191 } 1192 } 1193 1194 core->enable_count++; 1195 return 0; 1196 } 1197 1198 static int clk_core_enable_lock(struct clk_core *core) 1199 { 1200 unsigned long flags; 1201 int ret; 1202 1203 flags = clk_enable_lock(); 1204 ret = clk_core_enable(core); 1205 clk_enable_unlock(flags); 1206 1207 return ret; 1208 } 1209 1210 /** 1211 * clk_gate_restore_context - restore context for poweroff 1212 * @hw: the clk_hw pointer of clock whose state is to be restored 1213 * 1214 * The clock gate restore context function enables or disables 1215 * the gate clocks based on the enable_count. This is done in cases 1216 * where the clock context is lost and based on the enable_count 1217 * the clock either needs to be enabled/disabled. This 1218 * helps restore the state of gate clocks. 1219 */ 1220 void clk_gate_restore_context(struct clk_hw *hw) 1221 { 1222 struct clk_core *core = hw->core; 1223 1224 if (core->enable_count) 1225 core->ops->enable(hw); 1226 else 1227 core->ops->disable(hw); 1228 } 1229 EXPORT_SYMBOL_GPL(clk_gate_restore_context); 1230 1231 static int clk_core_save_context(struct clk_core *core) 1232 { 1233 struct clk_core *child; 1234 int ret = 0; 1235 1236 hlist_for_each_entry(child, &core->children, child_node) { 1237 ret = clk_core_save_context(child); 1238 if (ret < 0) 1239 return ret; 1240 } 1241 1242 if (core->ops && core->ops->save_context) 1243 ret = core->ops->save_context(core->hw); 1244 1245 return ret; 1246 } 1247 1248 static void clk_core_restore_context(struct clk_core *core) 1249 { 1250 struct clk_core *child; 1251 1252 if (core->ops && core->ops->restore_context) 1253 core->ops->restore_context(core->hw); 1254 1255 hlist_for_each_entry(child, &core->children, child_node) 1256 clk_core_restore_context(child); 1257 } 1258 1259 /** 1260 * clk_save_context - save clock context for poweroff 1261 * 1262 * Saves the context of the clock register for powerstates in which the 1263 * contents of the registers will be lost. Occurs deep within the suspend 1264 * code. Returns 0 on success. 1265 */ 1266 int clk_save_context(void) 1267 { 1268 struct clk_core *clk; 1269 int ret; 1270 1271 hlist_for_each_entry(clk, &clk_root_list, child_node) { 1272 ret = clk_core_save_context(clk); 1273 if (ret < 0) 1274 return ret; 1275 } 1276 1277 hlist_for_each_entry(clk, &clk_orphan_list, child_node) { 1278 ret = clk_core_save_context(clk); 1279 if (ret < 0) 1280 return ret; 1281 } 1282 1283 return 0; 1284 } 1285 EXPORT_SYMBOL_GPL(clk_save_context); 1286 1287 /** 1288 * clk_restore_context - restore clock context after poweroff 1289 * 1290 * Restore the saved clock context upon resume. 1291 * 1292 */ 1293 void clk_restore_context(void) 1294 { 1295 struct clk_core *core; 1296 1297 hlist_for_each_entry(core, &clk_root_list, child_node) 1298 clk_core_restore_context(core); 1299 1300 hlist_for_each_entry(core, &clk_orphan_list, child_node) 1301 clk_core_restore_context(core); 1302 } 1303 EXPORT_SYMBOL_GPL(clk_restore_context); 1304 1305 /** 1306 * clk_enable - ungate a clock 1307 * @clk: the clk being ungated 1308 * 1309 * clk_enable must not sleep, which differentiates it from clk_prepare. In a 1310 * simple case, clk_enable can be used instead of clk_prepare to ungate a clk 1311 * if the operation will never sleep. One example is a SoC-internal clk which 1312 * is controlled via simple register writes. In the complex case a clk ungate 1313 * operation may require a fast and a slow part. It is this reason that 1314 * clk_enable and clk_prepare are not mutually exclusive. In fact clk_prepare 1315 * must be called before clk_enable. Returns 0 on success, -EERROR 1316 * otherwise. 1317 */ 1318 int clk_enable(struct clk *clk) 1319 { 1320 if (!clk) 1321 return 0; 1322 1323 return clk_core_enable_lock(clk->core); 1324 } 1325 EXPORT_SYMBOL_GPL(clk_enable); 1326 1327 /** 1328 * clk_is_enabled_when_prepared - indicate if preparing a clock also enables it. 1329 * @clk: clock source 1330 * 1331 * Returns true if clk_prepare() implicitly enables the clock, effectively 1332 * making clk_enable()/clk_disable() no-ops, false otherwise. 1333 * 1334 * This is of interest mainly to power management code where actually 1335 * disabling the clock also requires unpreparing it to have any material 1336 * effect. 1337 * 1338 * Regardless of the value returned here, the caller must always invoke 1339 * clk_enable() or clk_prepare_enable() and counterparts for usage counts 1340 * to be right. 1341 */ 1342 bool clk_is_enabled_when_prepared(struct clk *clk) 1343 { 1344 return clk && !(clk->core->ops->enable && clk->core->ops->disable); 1345 } 1346 EXPORT_SYMBOL_GPL(clk_is_enabled_when_prepared); 1347 1348 static int clk_core_prepare_enable(struct clk_core *core) 1349 { 1350 int ret; 1351 1352 ret = clk_core_prepare_lock(core); 1353 if (ret) 1354 return ret; 1355 1356 ret = clk_core_enable_lock(core); 1357 if (ret) 1358 clk_core_unprepare_lock(core); 1359 1360 return ret; 1361 } 1362 1363 static void clk_core_disable_unprepare(struct clk_core *core) 1364 { 1365 clk_core_disable_lock(core); 1366 clk_core_unprepare_lock(core); 1367 } 1368 1369 static void __init clk_unprepare_unused_subtree(struct clk_core *core) 1370 { 1371 struct clk_core *child; 1372 1373 lockdep_assert_held(&prepare_lock); 1374 1375 hlist_for_each_entry(child, &core->children, child_node) 1376 clk_unprepare_unused_subtree(child); 1377 1378 if (core->prepare_count) 1379 return; 1380 1381 if (core->flags & CLK_IGNORE_UNUSED) 1382 return; 1383 1384 if (clk_pm_runtime_get(core)) 1385 return; 1386 1387 if (clk_core_is_prepared(core)) { 1388 trace_clk_unprepare(core); 1389 if (core->ops->unprepare_unused) 1390 core->ops->unprepare_unused(core->hw); 1391 else if (core->ops->unprepare) 1392 core->ops->unprepare(core->hw); 1393 trace_clk_unprepare_complete(core); 1394 } 1395 1396 clk_pm_runtime_put(core); 1397 } 1398 1399 static void __init clk_disable_unused_subtree(struct clk_core *core) 1400 { 1401 struct clk_core *child; 1402 unsigned long flags; 1403 1404 lockdep_assert_held(&prepare_lock); 1405 1406 hlist_for_each_entry(child, &core->children, child_node) 1407 clk_disable_unused_subtree(child); 1408 1409 if (core->flags & CLK_OPS_PARENT_ENABLE) 1410 clk_core_prepare_enable(core->parent); 1411 1412 if (clk_pm_runtime_get(core)) 1413 goto unprepare_out; 1414 1415 flags = clk_enable_lock(); 1416 1417 if (core->enable_count) 1418 goto unlock_out; 1419 1420 if (core->flags & CLK_IGNORE_UNUSED) 1421 goto unlock_out; 1422 1423 /* 1424 * some gate clocks have special needs during the disable-unused 1425 * sequence. call .disable_unused if available, otherwise fall 1426 * back to .disable 1427 */ 1428 if (clk_core_is_enabled(core)) { 1429 trace_clk_disable(core); 1430 if (core->ops->disable_unused) 1431 core->ops->disable_unused(core->hw); 1432 else if (core->ops->disable) 1433 core->ops->disable(core->hw); 1434 trace_clk_disable_complete(core); 1435 } 1436 1437 unlock_out: 1438 clk_enable_unlock(flags); 1439 clk_pm_runtime_put(core); 1440 unprepare_out: 1441 if (core->flags & CLK_OPS_PARENT_ENABLE) 1442 clk_core_disable_unprepare(core->parent); 1443 } 1444 1445 static bool clk_ignore_unused __initdata; 1446 static int __init clk_ignore_unused_setup(char *__unused) 1447 { 1448 clk_ignore_unused = true; 1449 return 1; 1450 } 1451 __setup("clk_ignore_unused", clk_ignore_unused_setup); 1452 1453 static int __init clk_disable_unused(void) 1454 { 1455 struct clk_core *core; 1456 1457 if (clk_ignore_unused) { 1458 pr_warn("clk: Not disabling unused clocks\n"); 1459 return 0; 1460 } 1461 1462 pr_info("clk: Disabling unused clocks\n"); 1463 1464 clk_prepare_lock(); 1465 1466 hlist_for_each_entry(core, &clk_root_list, child_node) 1467 clk_disable_unused_subtree(core); 1468 1469 hlist_for_each_entry(core, &clk_orphan_list, child_node) 1470 clk_disable_unused_subtree(core); 1471 1472 hlist_for_each_entry(core, &clk_root_list, child_node) 1473 clk_unprepare_unused_subtree(core); 1474 1475 hlist_for_each_entry(core, &clk_orphan_list, child_node) 1476 clk_unprepare_unused_subtree(core); 1477 1478 clk_prepare_unlock(); 1479 1480 return 0; 1481 } 1482 late_initcall_sync(clk_disable_unused); 1483 1484 static int clk_core_determine_round_nolock(struct clk_core *core, 1485 struct clk_rate_request *req) 1486 { 1487 long rate; 1488 1489 lockdep_assert_held(&prepare_lock); 1490 1491 if (!core) 1492 return 0; 1493 1494 /* 1495 * Some clock providers hand-craft their clk_rate_requests and 1496 * might not fill min_rate and max_rate. 1497 * 1498 * If it's the case, clamping the rate is equivalent to setting 1499 * the rate to 0 which is bad. Skip the clamping but complain so 1500 * that it gets fixed, hopefully. 1501 */ 1502 if (!req->min_rate && !req->max_rate) 1503 pr_warn("%s: %s: clk_rate_request has initialized min or max rate.\n", 1504 __func__, core->name); 1505 else 1506 req->rate = clamp(req->rate, req->min_rate, req->max_rate); 1507 1508 /* 1509 * At this point, core protection will be disabled 1510 * - if the provider is not protected at all 1511 * - if the calling consumer is the only one which has exclusivity 1512 * over the provider 1513 */ 1514 if (clk_core_rate_is_protected(core)) { 1515 req->rate = core->rate; 1516 } else if (core->ops->determine_rate) { 1517 return core->ops->determine_rate(core->hw, req); 1518 } else if (core->ops->round_rate) { 1519 rate = core->ops->round_rate(core->hw, req->rate, 1520 &req->best_parent_rate); 1521 if (rate < 0) 1522 return rate; 1523 1524 req->rate = rate; 1525 } else { 1526 return -EINVAL; 1527 } 1528 1529 return 0; 1530 } 1531 1532 static void clk_core_init_rate_req(struct clk_core * const core, 1533 struct clk_rate_request *req, 1534 unsigned long rate) 1535 { 1536 struct clk_core *parent; 1537 1538 if (WARN_ON(!req)) 1539 return; 1540 1541 memset(req, 0, sizeof(*req)); 1542 req->max_rate = ULONG_MAX; 1543 1544 if (!core) 1545 return; 1546 1547 req->core = core; 1548 req->rate = rate; 1549 clk_core_get_boundaries(core, &req->min_rate, &req->max_rate); 1550 1551 parent = core->parent; 1552 if (parent) { 1553 req->best_parent_hw = parent->hw; 1554 req->best_parent_rate = parent->rate; 1555 } else { 1556 req->best_parent_hw = NULL; 1557 req->best_parent_rate = 0; 1558 } 1559 } 1560 1561 /** 1562 * clk_hw_init_rate_request - Initializes a clk_rate_request 1563 * @hw: the clk for which we want to submit a rate request 1564 * @req: the clk_rate_request structure we want to initialise 1565 * @rate: the rate which is to be requested 1566 * 1567 * Initializes a clk_rate_request structure to submit to 1568 * __clk_determine_rate() or similar functions. 1569 */ 1570 void clk_hw_init_rate_request(const struct clk_hw *hw, 1571 struct clk_rate_request *req, 1572 unsigned long rate) 1573 { 1574 if (WARN_ON(!hw || !req)) 1575 return; 1576 1577 clk_core_init_rate_req(hw->core, req, rate); 1578 } 1579 EXPORT_SYMBOL_GPL(clk_hw_init_rate_request); 1580 1581 /** 1582 * clk_hw_forward_rate_request - Forwards a clk_rate_request to a clock's parent 1583 * @hw: the original clock that got the rate request 1584 * @old_req: the original clk_rate_request structure we want to forward 1585 * @parent: the clk we want to forward @old_req to 1586 * @req: the clk_rate_request structure we want to initialise 1587 * @parent_rate: The rate which is to be requested to @parent 1588 * 1589 * Initializes a clk_rate_request structure to submit to a clock parent 1590 * in __clk_determine_rate() or similar functions. 1591 */ 1592 void clk_hw_forward_rate_request(const struct clk_hw *hw, 1593 const struct clk_rate_request *old_req, 1594 const struct clk_hw *parent, 1595 struct clk_rate_request *req, 1596 unsigned long parent_rate) 1597 { 1598 if (WARN_ON(!hw || !old_req || !parent || !req)) 1599 return; 1600 1601 clk_core_forward_rate_req(hw->core, old_req, 1602 parent->core, req, 1603 parent_rate); 1604 } 1605 EXPORT_SYMBOL_GPL(clk_hw_forward_rate_request); 1606 1607 static bool clk_core_can_round(struct clk_core * const core) 1608 { 1609 return core->ops->determine_rate || core->ops->round_rate; 1610 } 1611 1612 static int clk_core_round_rate_nolock(struct clk_core *core, 1613 struct clk_rate_request *req) 1614 { 1615 int ret; 1616 1617 lockdep_assert_held(&prepare_lock); 1618 1619 if (!core) { 1620 req->rate = 0; 1621 return 0; 1622 } 1623 1624 if (clk_core_can_round(core)) 1625 return clk_core_determine_round_nolock(core, req); 1626 1627 if (core->flags & CLK_SET_RATE_PARENT) { 1628 struct clk_rate_request parent_req; 1629 1630 clk_core_forward_rate_req(core, req, core->parent, &parent_req, req->rate); 1631 1632 trace_clk_rate_request_start(&parent_req); 1633 1634 ret = clk_core_round_rate_nolock(core->parent, &parent_req); 1635 if (ret) 1636 return ret; 1637 1638 trace_clk_rate_request_done(&parent_req); 1639 1640 req->best_parent_rate = parent_req.rate; 1641 req->rate = parent_req.rate; 1642 1643 return 0; 1644 } 1645 1646 req->rate = core->rate; 1647 return 0; 1648 } 1649 1650 /** 1651 * __clk_determine_rate - get the closest rate actually supported by a clock 1652 * @hw: determine the rate of this clock 1653 * @req: target rate request 1654 * 1655 * Useful for clk_ops such as .set_rate and .determine_rate. 1656 */ 1657 int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) 1658 { 1659 if (!hw) { 1660 req->rate = 0; 1661 return 0; 1662 } 1663 1664 return clk_core_round_rate_nolock(hw->core, req); 1665 } 1666 EXPORT_SYMBOL_GPL(__clk_determine_rate); 1667 1668 /** 1669 * clk_hw_round_rate() - round the given rate for a hw clk 1670 * @hw: the hw clk for which we are rounding a rate 1671 * @rate: the rate which is to be rounded 1672 * 1673 * Takes in a rate as input and rounds it to a rate that the clk can actually 1674 * use. 1675 * 1676 * Context: prepare_lock must be held. 1677 * For clk providers to call from within clk_ops such as .round_rate, 1678 * .determine_rate. 1679 * 1680 * Return: returns rounded rate of hw clk if clk supports round_rate operation 1681 * else returns the parent rate. 1682 */ 1683 unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate) 1684 { 1685 int ret; 1686 struct clk_rate_request req; 1687 1688 clk_core_init_rate_req(hw->core, &req, rate); 1689 1690 trace_clk_rate_request_start(&req); 1691 1692 ret = clk_core_round_rate_nolock(hw->core, &req); 1693 if (ret) 1694 return 0; 1695 1696 trace_clk_rate_request_done(&req); 1697 1698 return req.rate; 1699 } 1700 EXPORT_SYMBOL_GPL(clk_hw_round_rate); 1701 1702 /** 1703 * clk_round_rate - round the given rate for a clk 1704 * @clk: the clk for which we are rounding a rate 1705 * @rate: the rate which is to be rounded 1706 * 1707 * Takes in a rate as input and rounds it to a rate that the clk can actually 1708 * use which is then returned. If clk doesn't support round_rate operation 1709 * then the parent rate is returned. 1710 */ 1711 long clk_round_rate(struct clk *clk, unsigned long rate) 1712 { 1713 struct clk_rate_request req; 1714 int ret; 1715 1716 if (!clk) 1717 return 0; 1718 1719 clk_prepare_lock(); 1720 1721 if (clk->exclusive_count) 1722 clk_core_rate_unprotect(clk->core); 1723 1724 clk_core_init_rate_req(clk->core, &req, rate); 1725 1726 trace_clk_rate_request_start(&req); 1727 1728 ret = clk_core_round_rate_nolock(clk->core, &req); 1729 1730 trace_clk_rate_request_done(&req); 1731 1732 if (clk->exclusive_count) 1733 clk_core_rate_protect(clk->core); 1734 1735 clk_prepare_unlock(); 1736 1737 if (ret) 1738 return ret; 1739 1740 return req.rate; 1741 } 1742 EXPORT_SYMBOL_GPL(clk_round_rate); 1743 1744 /** 1745 * __clk_notify - call clk notifier chain 1746 * @core: clk that is changing rate 1747 * @msg: clk notifier type (see include/linux/clk.h) 1748 * @old_rate: old clk rate 1749 * @new_rate: new clk rate 1750 * 1751 * Triggers a notifier call chain on the clk rate-change notification 1752 * for 'clk'. Passes a pointer to the struct clk and the previous 1753 * and current rates to the notifier callback. Intended to be called by 1754 * internal clock code only. Returns NOTIFY_DONE from the last driver 1755 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if 1756 * a driver returns that. 1757 */ 1758 static int __clk_notify(struct clk_core *core, unsigned long msg, 1759 unsigned long old_rate, unsigned long new_rate) 1760 { 1761 struct clk_notifier *cn; 1762 struct clk_notifier_data cnd; 1763 int ret = NOTIFY_DONE; 1764 1765 cnd.old_rate = old_rate; 1766 cnd.new_rate = new_rate; 1767 1768 list_for_each_entry(cn, &clk_notifier_list, node) { 1769 if (cn->clk->core == core) { 1770 cnd.clk = cn->clk; 1771 ret = srcu_notifier_call_chain(&cn->notifier_head, msg, 1772 &cnd); 1773 if (ret & NOTIFY_STOP_MASK) 1774 return ret; 1775 } 1776 } 1777 1778 return ret; 1779 } 1780 1781 /** 1782 * __clk_recalc_accuracies 1783 * @core: first clk in the subtree 1784 * 1785 * Walks the subtree of clks starting with clk and recalculates accuracies as 1786 * it goes. Note that if a clk does not implement the .recalc_accuracy 1787 * callback then it is assumed that the clock will take on the accuracy of its 1788 * parent. 1789 */ 1790 static void __clk_recalc_accuracies(struct clk_core *core) 1791 { 1792 unsigned long parent_accuracy = 0; 1793 struct clk_core *child; 1794 1795 lockdep_assert_held(&prepare_lock); 1796 1797 if (core->parent) 1798 parent_accuracy = core->parent->accuracy; 1799 1800 if (core->ops->recalc_accuracy) 1801 core->accuracy = core->ops->recalc_accuracy(core->hw, 1802 parent_accuracy); 1803 else 1804 core->accuracy = parent_accuracy; 1805 1806 hlist_for_each_entry(child, &core->children, child_node) 1807 __clk_recalc_accuracies(child); 1808 } 1809 1810 static long clk_core_get_accuracy_recalc(struct clk_core *core) 1811 { 1812 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE)) 1813 __clk_recalc_accuracies(core); 1814 1815 return clk_core_get_accuracy_no_lock(core); 1816 } 1817 1818 /** 1819 * clk_get_accuracy - return the accuracy of clk 1820 * @clk: the clk whose accuracy is being returned 1821 * 1822 * Simply returns the cached accuracy of the clk, unless 1823 * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be 1824 * issued. 1825 * If clk is NULL then returns 0. 1826 */ 1827 long clk_get_accuracy(struct clk *clk) 1828 { 1829 long accuracy; 1830 1831 if (!clk) 1832 return 0; 1833 1834 clk_prepare_lock(); 1835 accuracy = clk_core_get_accuracy_recalc(clk->core); 1836 clk_prepare_unlock(); 1837 1838 return accuracy; 1839 } 1840 EXPORT_SYMBOL_GPL(clk_get_accuracy); 1841 1842 static unsigned long clk_recalc(struct clk_core *core, 1843 unsigned long parent_rate) 1844 { 1845 unsigned long rate = parent_rate; 1846 1847 if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) { 1848 rate = core->ops->recalc_rate(core->hw, parent_rate); 1849 clk_pm_runtime_put(core); 1850 } 1851 return rate; 1852 } 1853 1854 /** 1855 * __clk_recalc_rates 1856 * @core: first clk in the subtree 1857 * @update_req: Whether req_rate should be updated with the new rate 1858 * @msg: notification type (see include/linux/clk.h) 1859 * 1860 * Walks the subtree of clks starting with clk and recalculates rates as it 1861 * goes. Note that if a clk does not implement the .recalc_rate callback then 1862 * it is assumed that the clock will take on the rate of its parent. 1863 * 1864 * clk_recalc_rates also propagates the POST_RATE_CHANGE notification, 1865 * if necessary. 1866 */ 1867 static void __clk_recalc_rates(struct clk_core *core, bool update_req, 1868 unsigned long msg) 1869 { 1870 unsigned long old_rate; 1871 unsigned long parent_rate = 0; 1872 struct clk_core *child; 1873 1874 lockdep_assert_held(&prepare_lock); 1875 1876 old_rate = core->rate; 1877 1878 if (core->parent) 1879 parent_rate = core->parent->rate; 1880 1881 core->rate = clk_recalc(core, parent_rate); 1882 if (update_req) 1883 core->req_rate = core->rate; 1884 1885 /* 1886 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE 1887 * & ABORT_RATE_CHANGE notifiers 1888 */ 1889 if (core->notifier_count && msg) 1890 __clk_notify(core, msg, old_rate, core->rate); 1891 1892 hlist_for_each_entry(child, &core->children, child_node) 1893 __clk_recalc_rates(child, update_req, msg); 1894 } 1895 1896 static unsigned long clk_core_get_rate_recalc(struct clk_core *core) 1897 { 1898 if (core && (core->flags & CLK_GET_RATE_NOCACHE)) 1899 __clk_recalc_rates(core, false, 0); 1900 1901 return clk_core_get_rate_nolock(core); 1902 } 1903 1904 /** 1905 * clk_get_rate - return the rate of clk 1906 * @clk: the clk whose rate is being returned 1907 * 1908 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag 1909 * is set, which means a recalc_rate will be issued. Can be called regardless of 1910 * the clock enabledness. If clk is NULL, or if an error occurred, then returns 1911 * 0. 1912 */ 1913 unsigned long clk_get_rate(struct clk *clk) 1914 { 1915 unsigned long rate; 1916 1917 if (!clk) 1918 return 0; 1919 1920 clk_prepare_lock(); 1921 rate = clk_core_get_rate_recalc(clk->core); 1922 clk_prepare_unlock(); 1923 1924 return rate; 1925 } 1926 EXPORT_SYMBOL_GPL(clk_get_rate); 1927 1928 static int clk_fetch_parent_index(struct clk_core *core, 1929 struct clk_core *parent) 1930 { 1931 int i; 1932 1933 if (!parent) 1934 return -EINVAL; 1935 1936 for (i = 0; i < core->num_parents; i++) { 1937 /* Found it first try! */ 1938 if (core->parents[i].core == parent) 1939 return i; 1940 1941 /* Something else is here, so keep looking */ 1942 if (core->parents[i].core) 1943 continue; 1944 1945 /* Maybe core hasn't been cached but the hw is all we know? */ 1946 if (core->parents[i].hw) { 1947 if (core->parents[i].hw == parent->hw) 1948 break; 1949 1950 /* Didn't match, but we're expecting a clk_hw */ 1951 continue; 1952 } 1953 1954 /* Maybe it hasn't been cached (clk_set_parent() path) */ 1955 if (parent == clk_core_get(core, i)) 1956 break; 1957 1958 /* Fallback to comparing globally unique names */ 1959 if (core->parents[i].name && 1960 !strcmp(parent->name, core->parents[i].name)) 1961 break; 1962 } 1963 1964 if (i == core->num_parents) 1965 return -EINVAL; 1966 1967 core->parents[i].core = parent; 1968 return i; 1969 } 1970 1971 /** 1972 * clk_hw_get_parent_index - return the index of the parent clock 1973 * @hw: clk_hw associated with the clk being consumed 1974 * 1975 * Fetches and returns the index of parent clock. Returns -EINVAL if the given 1976 * clock does not have a current parent. 1977 */ 1978 int clk_hw_get_parent_index(struct clk_hw *hw) 1979 { 1980 struct clk_hw *parent = clk_hw_get_parent(hw); 1981 1982 if (WARN_ON(parent == NULL)) 1983 return -EINVAL; 1984 1985 return clk_fetch_parent_index(hw->core, parent->core); 1986 } 1987 EXPORT_SYMBOL_GPL(clk_hw_get_parent_index); 1988 1989 /* 1990 * Update the orphan status of @core and all its children. 1991 */ 1992 static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan) 1993 { 1994 struct clk_core *child; 1995 1996 core->orphan = is_orphan; 1997 1998 hlist_for_each_entry(child, &core->children, child_node) 1999 clk_core_update_orphan_status(child, is_orphan); 2000 } 2001 2002 static void clk_reparent(struct clk_core *core, struct clk_core *new_parent) 2003 { 2004 bool was_orphan = core->orphan; 2005 2006 hlist_del(&core->child_node); 2007 2008 if (new_parent) { 2009 bool becomes_orphan = new_parent->orphan; 2010 2011 /* avoid duplicate POST_RATE_CHANGE notifications */ 2012 if (new_parent->new_child == core) 2013 new_parent->new_child = NULL; 2014 2015 hlist_add_head(&core->child_node, &new_parent->children); 2016 2017 if (was_orphan != becomes_orphan) 2018 clk_core_update_orphan_status(core, becomes_orphan); 2019 } else { 2020 hlist_add_head(&core->child_node, &clk_orphan_list); 2021 if (!was_orphan) 2022 clk_core_update_orphan_status(core, true); 2023 } 2024 2025 core->parent = new_parent; 2026 } 2027 2028 static struct clk_core *__clk_set_parent_before(struct clk_core *core, 2029 struct clk_core *parent) 2030 { 2031 unsigned long flags; 2032 struct clk_core *old_parent = core->parent; 2033 2034 /* 2035 * 1. enable parents for CLK_OPS_PARENT_ENABLE clock 2036 * 2037 * 2. Migrate prepare state between parents and prevent race with 2038 * clk_enable(). 2039 * 2040 * If the clock is not prepared, then a race with 2041 * clk_enable/disable() is impossible since we already have the 2042 * prepare lock (future calls to clk_enable() need to be preceded by 2043 * a clk_prepare()). 2044 * 2045 * If the clock is prepared, migrate the prepared state to the new 2046 * parent and also protect against a race with clk_enable() by 2047 * forcing the clock and the new parent on. This ensures that all 2048 * future calls to clk_enable() are practically NOPs with respect to 2049 * hardware and software states. 2050 * 2051 * See also: Comment for clk_set_parent() below. 2052 */ 2053 2054 /* enable old_parent & parent if CLK_OPS_PARENT_ENABLE is set */ 2055 if (core->flags & CLK_OPS_PARENT_ENABLE) { 2056 clk_core_prepare_enable(old_parent); 2057 clk_core_prepare_enable(parent); 2058 } 2059 2060 /* migrate prepare count if > 0 */ 2061 if (core->prepare_count) { 2062 clk_core_prepare_enable(parent); 2063 clk_core_enable_lock(core); 2064 } 2065 2066 /* update the clk tree topology */ 2067 flags = clk_enable_lock(); 2068 clk_reparent(core, parent); 2069 clk_enable_unlock(flags); 2070 2071 return old_parent; 2072 } 2073 2074 static void __clk_set_parent_after(struct clk_core *core, 2075 struct clk_core *parent, 2076 struct clk_core *old_parent) 2077 { 2078 /* 2079 * Finish the migration of prepare state and undo the changes done 2080 * for preventing a race with clk_enable(). 2081 */ 2082 if (core->prepare_count) { 2083 clk_core_disable_lock(core); 2084 clk_core_disable_unprepare(old_parent); 2085 } 2086 2087 /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */ 2088 if (core->flags & CLK_OPS_PARENT_ENABLE) { 2089 clk_core_disable_unprepare(parent); 2090 clk_core_disable_unprepare(old_parent); 2091 } 2092 } 2093 2094 static int __clk_set_parent(struct clk_core *core, struct clk_core *parent, 2095 u8 p_index) 2096 { 2097 unsigned long flags; 2098 int ret = 0; 2099 struct clk_core *old_parent; 2100 2101 old_parent = __clk_set_parent_before(core, parent); 2102 2103 trace_clk_set_parent(core, parent); 2104 2105 /* change clock input source */ 2106 if (parent && core->ops->set_parent) 2107 ret = core->ops->set_parent(core->hw, p_index); 2108 2109 trace_clk_set_parent_complete(core, parent); 2110 2111 if (ret) { 2112 flags = clk_enable_lock(); 2113 clk_reparent(core, old_parent); 2114 clk_enable_unlock(flags); 2115 2116 __clk_set_parent_after(core, old_parent, parent); 2117 2118 return ret; 2119 } 2120 2121 __clk_set_parent_after(core, parent, old_parent); 2122 2123 return 0; 2124 } 2125 2126 /** 2127 * __clk_speculate_rates 2128 * @core: first clk in the subtree 2129 * @parent_rate: the "future" rate of clk's parent 2130 * 2131 * Walks the subtree of clks starting with clk, speculating rates as it 2132 * goes and firing off PRE_RATE_CHANGE notifications as necessary. 2133 * 2134 * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending 2135 * pre-rate change notifications and returns early if no clks in the 2136 * subtree have subscribed to the notifications. Note that if a clk does not 2137 * implement the .recalc_rate callback then it is assumed that the clock will 2138 * take on the rate of its parent. 2139 */ 2140 static int __clk_speculate_rates(struct clk_core *core, 2141 unsigned long parent_rate) 2142 { 2143 struct clk_core *child; 2144 unsigned long new_rate; 2145 int ret = NOTIFY_DONE; 2146 2147 lockdep_assert_held(&prepare_lock); 2148 2149 new_rate = clk_recalc(core, parent_rate); 2150 2151 /* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */ 2152 if (core->notifier_count) 2153 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate); 2154 2155 if (ret & NOTIFY_STOP_MASK) { 2156 pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n", 2157 __func__, core->name, ret); 2158 goto out; 2159 } 2160 2161 hlist_for_each_entry(child, &core->children, child_node) { 2162 ret = __clk_speculate_rates(child, new_rate); 2163 if (ret & NOTIFY_STOP_MASK) 2164 break; 2165 } 2166 2167 out: 2168 return ret; 2169 } 2170 2171 static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate, 2172 struct clk_core *new_parent, u8 p_index) 2173 { 2174 struct clk_core *child; 2175 2176 core->new_rate = new_rate; 2177 core->new_parent = new_parent; 2178 core->new_parent_index = p_index; 2179 /* include clk in new parent's PRE_RATE_CHANGE notifications */ 2180 core->new_child = NULL; 2181 if (new_parent && new_parent != core->parent) 2182 new_parent->new_child = core; 2183 2184 hlist_for_each_entry(child, &core->children, child_node) { 2185 child->new_rate = clk_recalc(child, new_rate); 2186 clk_calc_subtree(child, child->new_rate, NULL, 0); 2187 } 2188 } 2189 2190 /* 2191 * calculate the new rates returning the topmost clock that has to be 2192 * changed. 2193 */ 2194 static struct clk_core *clk_calc_new_rates(struct clk_core *core, 2195 unsigned long rate) 2196 { 2197 struct clk_core *top = core; 2198 struct clk_core *old_parent, *parent; 2199 unsigned long best_parent_rate = 0; 2200 unsigned long new_rate; 2201 unsigned long min_rate; 2202 unsigned long max_rate; 2203 int p_index = 0; 2204 long ret; 2205 2206 /* sanity */ 2207 if (IS_ERR_OR_NULL(core)) 2208 return NULL; 2209 2210 /* save parent rate, if it exists */ 2211 parent = old_parent = core->parent; 2212 if (parent) 2213 best_parent_rate = parent->rate; 2214 2215 clk_core_get_boundaries(core, &min_rate, &max_rate); 2216 2217 /* find the closest rate and parent clk/rate */ 2218 if (clk_core_can_round(core)) { 2219 struct clk_rate_request req; 2220 2221 clk_core_init_rate_req(core, &req, rate); 2222 2223 trace_clk_rate_request_start(&req); 2224 2225 ret = clk_core_determine_round_nolock(core, &req); 2226 if (ret < 0) 2227 return NULL; 2228 2229 trace_clk_rate_request_done(&req); 2230 2231 best_parent_rate = req.best_parent_rate; 2232 new_rate = req.rate; 2233 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL; 2234 2235 if (new_rate < min_rate || new_rate > max_rate) 2236 return NULL; 2237 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) { 2238 /* pass-through clock without adjustable parent */ 2239 core->new_rate = core->rate; 2240 return NULL; 2241 } else { 2242 /* pass-through clock with adjustable parent */ 2243 top = clk_calc_new_rates(parent, rate); 2244 new_rate = parent->new_rate; 2245 goto out; 2246 } 2247 2248 /* some clocks must be gated to change parent */ 2249 if (parent != old_parent && 2250 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) { 2251 pr_debug("%s: %s not gated but wants to reparent\n", 2252 __func__, core->name); 2253 return NULL; 2254 } 2255 2256 /* try finding the new parent index */ 2257 if (parent && core->num_parents > 1) { 2258 p_index = clk_fetch_parent_index(core, parent); 2259 if (p_index < 0) { 2260 pr_debug("%s: clk %s can not be parent of clk %s\n", 2261 __func__, parent->name, core->name); 2262 return NULL; 2263 } 2264 } 2265 2266 if ((core->flags & CLK_SET_RATE_PARENT) && parent && 2267 best_parent_rate != parent->rate) 2268 top = clk_calc_new_rates(parent, best_parent_rate); 2269 2270 out: 2271 clk_calc_subtree(core, new_rate, parent, p_index); 2272 2273 return top; 2274 } 2275 2276 /* 2277 * Notify about rate changes in a subtree. Always walk down the whole tree 2278 * so that in case of an error we can walk down the whole tree again and 2279 * abort the change. 2280 */ 2281 static struct clk_core *clk_propagate_rate_change(struct clk_core *core, 2282 unsigned long event) 2283 { 2284 struct clk_core *child, *tmp_clk, *fail_clk = NULL; 2285 int ret = NOTIFY_DONE; 2286 2287 if (core->rate == core->new_rate) 2288 return NULL; 2289 2290 if (core->notifier_count) { 2291 ret = __clk_notify(core, event, core->rate, core->new_rate); 2292 if (ret & NOTIFY_STOP_MASK) 2293 fail_clk = core; 2294 } 2295 2296 hlist_for_each_entry(child, &core->children, child_node) { 2297 /* Skip children who will be reparented to another clock */ 2298 if (child->new_parent && child->new_parent != core) 2299 continue; 2300 tmp_clk = clk_propagate_rate_change(child, event); 2301 if (tmp_clk) 2302 fail_clk = tmp_clk; 2303 } 2304 2305 /* handle the new child who might not be in core->children yet */ 2306 if (core->new_child) { 2307 tmp_clk = clk_propagate_rate_change(core->new_child, event); 2308 if (tmp_clk) 2309 fail_clk = tmp_clk; 2310 } 2311 2312 return fail_clk; 2313 } 2314 2315 /* 2316 * walk down a subtree and set the new rates notifying the rate 2317 * change on the way 2318 */ 2319 static void clk_change_rate(struct clk_core *core) 2320 { 2321 struct clk_core *child; 2322 struct hlist_node *tmp; 2323 unsigned long old_rate; 2324 unsigned long best_parent_rate = 0; 2325 bool skip_set_rate = false; 2326 struct clk_core *old_parent; 2327 struct clk_core *parent = NULL; 2328 2329 old_rate = core->rate; 2330 2331 if (core->new_parent) { 2332 parent = core->new_parent; 2333 best_parent_rate = core->new_parent->rate; 2334 } else if (core->parent) { 2335 parent = core->parent; 2336 best_parent_rate = core->parent->rate; 2337 } 2338 2339 if (clk_pm_runtime_get(core)) 2340 return; 2341 2342 if (core->flags & CLK_SET_RATE_UNGATE) { 2343 clk_core_prepare(core); 2344 clk_core_enable_lock(core); 2345 } 2346 2347 if (core->new_parent && core->new_parent != core->parent) { 2348 old_parent = __clk_set_parent_before(core, core->new_parent); 2349 trace_clk_set_parent(core, core->new_parent); 2350 2351 if (core->ops->set_rate_and_parent) { 2352 skip_set_rate = true; 2353 core->ops->set_rate_and_parent(core->hw, core->new_rate, 2354 best_parent_rate, 2355 core->new_parent_index); 2356 } else if (core->ops->set_parent) { 2357 core->ops->set_parent(core->hw, core->new_parent_index); 2358 } 2359 2360 trace_clk_set_parent_complete(core, core->new_parent); 2361 __clk_set_parent_after(core, core->new_parent, old_parent); 2362 } 2363 2364 if (core->flags & CLK_OPS_PARENT_ENABLE) 2365 clk_core_prepare_enable(parent); 2366 2367 trace_clk_set_rate(core, core->new_rate); 2368 2369 if (!skip_set_rate && core->ops->set_rate) 2370 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate); 2371 2372 trace_clk_set_rate_complete(core, core->new_rate); 2373 2374 core->rate = clk_recalc(core, best_parent_rate); 2375 2376 if (core->flags & CLK_SET_RATE_UNGATE) { 2377 clk_core_disable_lock(core); 2378 clk_core_unprepare(core); 2379 } 2380 2381 if (core->flags & CLK_OPS_PARENT_ENABLE) 2382 clk_core_disable_unprepare(parent); 2383 2384 if (core->notifier_count && old_rate != core->rate) 2385 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate); 2386 2387 if (core->flags & CLK_RECALC_NEW_RATES) 2388 (void)clk_calc_new_rates(core, core->new_rate); 2389 2390 /* 2391 * Use safe iteration, as change_rate can actually swap parents 2392 * for certain clock types. 2393 */ 2394 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) { 2395 /* Skip children who will be reparented to another clock */ 2396 if (child->new_parent && child->new_parent != core) 2397 continue; 2398 clk_change_rate(child); 2399 } 2400 2401 /* handle the new child who might not be in core->children yet */ 2402 if (core->new_child) 2403 clk_change_rate(core->new_child); 2404 2405 clk_pm_runtime_put(core); 2406 } 2407 2408 static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core, 2409 unsigned long req_rate) 2410 { 2411 int ret, cnt; 2412 struct clk_rate_request req; 2413 2414 lockdep_assert_held(&prepare_lock); 2415 2416 if (!core) 2417 return 0; 2418 2419 /* simulate what the rate would be if it could be freely set */ 2420 cnt = clk_core_rate_nuke_protect(core); 2421 if (cnt < 0) 2422 return cnt; 2423 2424 clk_core_init_rate_req(core, &req, req_rate); 2425 2426 trace_clk_rate_request_start(&req); 2427 2428 ret = clk_core_round_rate_nolock(core, &req); 2429 2430 trace_clk_rate_request_done(&req); 2431 2432 /* restore the protection */ 2433 clk_core_rate_restore_protect(core, cnt); 2434 2435 return ret ? 0 : req.rate; 2436 } 2437 2438 static int clk_core_set_rate_nolock(struct clk_core *core, 2439 unsigned long req_rate) 2440 { 2441 struct clk_core *top, *fail_clk; 2442 unsigned long rate; 2443 int ret; 2444 2445 if (!core) 2446 return 0; 2447 2448 rate = clk_core_req_round_rate_nolock(core, req_rate); 2449 2450 /* bail early if nothing to do */ 2451 if (rate == clk_core_get_rate_nolock(core)) 2452 return 0; 2453 2454 /* fail on a direct rate set of a protected provider */ 2455 if (clk_core_rate_is_protected(core)) 2456 return -EBUSY; 2457 2458 /* calculate new rates and get the topmost changed clock */ 2459 top = clk_calc_new_rates(core, req_rate); 2460 if (!top) 2461 return -EINVAL; 2462 2463 ret = clk_pm_runtime_get(core); 2464 if (ret) 2465 return ret; 2466 2467 /* notify that we are about to change rates */ 2468 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); 2469 if (fail_clk) { 2470 pr_debug("%s: failed to set %s rate\n", __func__, 2471 fail_clk->name); 2472 clk_propagate_rate_change(top, ABORT_RATE_CHANGE); 2473 ret = -EBUSY; 2474 goto err; 2475 } 2476 2477 /* change the rates */ 2478 clk_change_rate(top); 2479 2480 core->req_rate = req_rate; 2481 err: 2482 clk_pm_runtime_put(core); 2483 2484 return ret; 2485 } 2486 2487 /** 2488 * clk_set_rate - specify a new rate for clk 2489 * @clk: the clk whose rate is being changed 2490 * @rate: the new rate for clk 2491 * 2492 * In the simplest case clk_set_rate will only adjust the rate of clk. 2493 * 2494 * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to 2495 * propagate up to clk's parent; whether or not this happens depends on the 2496 * outcome of clk's .round_rate implementation. If *parent_rate is unchanged 2497 * after calling .round_rate then upstream parent propagation is ignored. If 2498 * *parent_rate comes back with a new rate for clk's parent then we propagate 2499 * up to clk's parent and set its rate. Upward propagation will continue 2500 * until either a clk does not support the CLK_SET_RATE_PARENT flag or 2501 * .round_rate stops requesting changes to clk's parent_rate. 2502 * 2503 * Rate changes are accomplished via tree traversal that also recalculates the 2504 * rates for the clocks and fires off POST_RATE_CHANGE notifiers. 2505 * 2506 * Returns 0 on success, -EERROR otherwise. 2507 */ 2508 int clk_set_rate(struct clk *clk, unsigned long rate) 2509 { 2510 int ret; 2511 2512 if (!clk) 2513 return 0; 2514 2515 /* prevent racing with updates to the clock topology */ 2516 clk_prepare_lock(); 2517 2518 if (clk->exclusive_count) 2519 clk_core_rate_unprotect(clk->core); 2520 2521 ret = clk_core_set_rate_nolock(clk->core, rate); 2522 2523 if (clk->exclusive_count) 2524 clk_core_rate_protect(clk->core); 2525 2526 clk_prepare_unlock(); 2527 2528 return ret; 2529 } 2530 EXPORT_SYMBOL_GPL(clk_set_rate); 2531 2532 /** 2533 * clk_set_rate_exclusive - specify a new rate and get exclusive control 2534 * @clk: the clk whose rate is being changed 2535 * @rate: the new rate for clk 2536 * 2537 * This is a combination of clk_set_rate() and clk_rate_exclusive_get() 2538 * within a critical section 2539 * 2540 * This can be used initially to ensure that at least 1 consumer is 2541 * satisfied when several consumers are competing for exclusivity over the 2542 * same clock provider. 2543 * 2544 * The exclusivity is not applied if setting the rate failed. 2545 * 2546 * Calls to clk_rate_exclusive_get() should be balanced with calls to 2547 * clk_rate_exclusive_put(). 2548 * 2549 * Returns 0 on success, -EERROR otherwise. 2550 */ 2551 int clk_set_rate_exclusive(struct clk *clk, unsigned long rate) 2552 { 2553 int ret; 2554 2555 if (!clk) 2556 return 0; 2557 2558 /* prevent racing with updates to the clock topology */ 2559 clk_prepare_lock(); 2560 2561 /* 2562 * The temporary protection removal is not here, on purpose 2563 * This function is meant to be used instead of clk_rate_protect, 2564 * so before the consumer code path protect the clock provider 2565 */ 2566 2567 ret = clk_core_set_rate_nolock(clk->core, rate); 2568 if (!ret) { 2569 clk_core_rate_protect(clk->core); 2570 clk->exclusive_count++; 2571 } 2572 2573 clk_prepare_unlock(); 2574 2575 return ret; 2576 } 2577 EXPORT_SYMBOL_GPL(clk_set_rate_exclusive); 2578 2579 static int clk_set_rate_range_nolock(struct clk *clk, 2580 unsigned long min, 2581 unsigned long max) 2582 { 2583 int ret = 0; 2584 unsigned long old_min, old_max, rate; 2585 2586 lockdep_assert_held(&prepare_lock); 2587 2588 if (!clk) 2589 return 0; 2590 2591 trace_clk_set_rate_range(clk->core, min, max); 2592 2593 if (min > max) { 2594 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n", 2595 __func__, clk->core->name, clk->dev_id, clk->con_id, 2596 min, max); 2597 return -EINVAL; 2598 } 2599 2600 if (clk->exclusive_count) 2601 clk_core_rate_unprotect(clk->core); 2602 2603 /* Save the current values in case we need to rollback the change */ 2604 old_min = clk->min_rate; 2605 old_max = clk->max_rate; 2606 clk->min_rate = min; 2607 clk->max_rate = max; 2608 2609 if (!clk_core_check_boundaries(clk->core, min, max)) { 2610 ret = -EINVAL; 2611 goto out; 2612 } 2613 2614 rate = clk->core->req_rate; 2615 if (clk->core->flags & CLK_GET_RATE_NOCACHE) 2616 rate = clk_core_get_rate_recalc(clk->core); 2617 2618 /* 2619 * Since the boundaries have been changed, let's give the 2620 * opportunity to the provider to adjust the clock rate based on 2621 * the new boundaries. 2622 * 2623 * We also need to handle the case where the clock is currently 2624 * outside of the boundaries. Clamping the last requested rate 2625 * to the current minimum and maximum will also handle this. 2626 * 2627 * FIXME: 2628 * There is a catch. It may fail for the usual reason (clock 2629 * broken, clock protected, etc) but also because: 2630 * - round_rate() was not favorable and fell on the wrong 2631 * side of the boundary 2632 * - the determine_rate() callback does not really check for 2633 * this corner case when determining the rate 2634 */ 2635 rate = clamp(rate, min, max); 2636 ret = clk_core_set_rate_nolock(clk->core, rate); 2637 if (ret) { 2638 /* rollback the changes */ 2639 clk->min_rate = old_min; 2640 clk->max_rate = old_max; 2641 } 2642 2643 out: 2644 if (clk->exclusive_count) 2645 clk_core_rate_protect(clk->core); 2646 2647 return ret; 2648 } 2649 2650 /** 2651 * clk_set_rate_range - set a rate range for a clock source 2652 * @clk: clock source 2653 * @min: desired minimum clock rate in Hz, inclusive 2654 * @max: desired maximum clock rate in Hz, inclusive 2655 * 2656 * Return: 0 for success or negative errno on failure. 2657 */ 2658 int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max) 2659 { 2660 int ret; 2661 2662 if (!clk) 2663 return 0; 2664 2665 clk_prepare_lock(); 2666 2667 ret = clk_set_rate_range_nolock(clk, min, max); 2668 2669 clk_prepare_unlock(); 2670 2671 return ret; 2672 } 2673 EXPORT_SYMBOL_GPL(clk_set_rate_range); 2674 2675 /** 2676 * clk_set_min_rate - set a minimum clock rate for a clock source 2677 * @clk: clock source 2678 * @rate: desired minimum clock rate in Hz, inclusive 2679 * 2680 * Returns success (0) or negative errno. 2681 */ 2682 int clk_set_min_rate(struct clk *clk, unsigned long rate) 2683 { 2684 if (!clk) 2685 return 0; 2686 2687 trace_clk_set_min_rate(clk->core, rate); 2688 2689 return clk_set_rate_range(clk, rate, clk->max_rate); 2690 } 2691 EXPORT_SYMBOL_GPL(clk_set_min_rate); 2692 2693 /** 2694 * clk_set_max_rate - set a maximum clock rate for a clock source 2695 * @clk: clock source 2696 * @rate: desired maximum clock rate in Hz, inclusive 2697 * 2698 * Returns success (0) or negative errno. 2699 */ 2700 int clk_set_max_rate(struct clk *clk, unsigned long rate) 2701 { 2702 if (!clk) 2703 return 0; 2704 2705 trace_clk_set_max_rate(clk->core, rate); 2706 2707 return clk_set_rate_range(clk, clk->min_rate, rate); 2708 } 2709 EXPORT_SYMBOL_GPL(clk_set_max_rate); 2710 2711 /** 2712 * clk_get_parent - return the parent of a clk 2713 * @clk: the clk whose parent gets returned 2714 * 2715 * Simply returns clk->parent. Returns NULL if clk is NULL. 2716 */ 2717 struct clk *clk_get_parent(struct clk *clk) 2718 { 2719 struct clk *parent; 2720 2721 if (!clk) 2722 return NULL; 2723 2724 clk_prepare_lock(); 2725 /* TODO: Create a per-user clk and change callers to call clk_put */ 2726 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk; 2727 clk_prepare_unlock(); 2728 2729 return parent; 2730 } 2731 EXPORT_SYMBOL_GPL(clk_get_parent); 2732 2733 static struct clk_core *__clk_init_parent(struct clk_core *core) 2734 { 2735 u8 index = 0; 2736 2737 if (core->num_parents > 1 && core->ops->get_parent) 2738 index = core->ops->get_parent(core->hw); 2739 2740 return clk_core_get_parent_by_index(core, index); 2741 } 2742 2743 static void clk_core_reparent(struct clk_core *core, 2744 struct clk_core *new_parent) 2745 { 2746 clk_reparent(core, new_parent); 2747 __clk_recalc_accuracies(core); 2748 __clk_recalc_rates(core, true, POST_RATE_CHANGE); 2749 } 2750 2751 void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent) 2752 { 2753 if (!hw) 2754 return; 2755 2756 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core); 2757 } 2758 2759 /** 2760 * clk_has_parent - check if a clock is a possible parent for another 2761 * @clk: clock source 2762 * @parent: parent clock source 2763 * 2764 * This function can be used in drivers that need to check that a clock can be 2765 * the parent of another without actually changing the parent. 2766 * 2767 * Returns true if @parent is a possible parent for @clk, false otherwise. 2768 */ 2769 bool clk_has_parent(const struct clk *clk, const struct clk *parent) 2770 { 2771 /* NULL clocks should be nops, so return success if either is NULL. */ 2772 if (!clk || !parent) 2773 return true; 2774 2775 return clk_core_has_parent(clk->core, parent->core); 2776 } 2777 EXPORT_SYMBOL_GPL(clk_has_parent); 2778 2779 static int clk_core_set_parent_nolock(struct clk_core *core, 2780 struct clk_core *parent) 2781 { 2782 int ret = 0; 2783 int p_index = 0; 2784 unsigned long p_rate = 0; 2785 2786 lockdep_assert_held(&prepare_lock); 2787 2788 if (!core) 2789 return 0; 2790 2791 if (core->parent == parent) 2792 return 0; 2793 2794 /* verify ops for multi-parent clks */ 2795 if (core->num_parents > 1 && !core->ops->set_parent) 2796 return -EPERM; 2797 2798 /* check that we are allowed to re-parent if the clock is in use */ 2799 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) 2800 return -EBUSY; 2801 2802 if (clk_core_rate_is_protected(core)) 2803 return -EBUSY; 2804 2805 /* try finding the new parent index */ 2806 if (parent) { 2807 p_index = clk_fetch_parent_index(core, parent); 2808 if (p_index < 0) { 2809 pr_debug("%s: clk %s can not be parent of clk %s\n", 2810 __func__, parent->name, core->name); 2811 return p_index; 2812 } 2813 p_rate = parent->rate; 2814 } 2815 2816 ret = clk_pm_runtime_get(core); 2817 if (ret) 2818 return ret; 2819 2820 /* propagate PRE_RATE_CHANGE notifications */ 2821 ret = __clk_speculate_rates(core, p_rate); 2822 2823 /* abort if a driver objects */ 2824 if (ret & NOTIFY_STOP_MASK) 2825 goto runtime_put; 2826 2827 /* do the re-parent */ 2828 ret = __clk_set_parent(core, parent, p_index); 2829 2830 /* propagate rate an accuracy recalculation accordingly */ 2831 if (ret) { 2832 __clk_recalc_rates(core, true, ABORT_RATE_CHANGE); 2833 } else { 2834 __clk_recalc_rates(core, true, POST_RATE_CHANGE); 2835 __clk_recalc_accuracies(core); 2836 } 2837 2838 runtime_put: 2839 clk_pm_runtime_put(core); 2840 2841 return ret; 2842 } 2843 2844 int clk_hw_set_parent(struct clk_hw *hw, struct clk_hw *parent) 2845 { 2846 return clk_core_set_parent_nolock(hw->core, parent->core); 2847 } 2848 EXPORT_SYMBOL_GPL(clk_hw_set_parent); 2849 2850 /** 2851 * clk_set_parent - switch the parent of a mux clk 2852 * @clk: the mux clk whose input we are switching 2853 * @parent: the new input to clk 2854 * 2855 * Re-parent clk to use parent as its new input source. If clk is in 2856 * prepared state, the clk will get enabled for the duration of this call. If 2857 * that's not acceptable for a specific clk (Eg: the consumer can't handle 2858 * that, the reparenting is glitchy in hardware, etc), use the 2859 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared. 2860 * 2861 * After successfully changing clk's parent clk_set_parent will update the 2862 * clk topology, sysfs topology and propagate rate recalculation via 2863 * __clk_recalc_rates. 2864 * 2865 * Returns 0 on success, -EERROR otherwise. 2866 */ 2867 int clk_set_parent(struct clk *clk, struct clk *parent) 2868 { 2869 int ret; 2870 2871 if (!clk) 2872 return 0; 2873 2874 clk_prepare_lock(); 2875 2876 if (clk->exclusive_count) 2877 clk_core_rate_unprotect(clk->core); 2878 2879 ret = clk_core_set_parent_nolock(clk->core, 2880 parent ? parent->core : NULL); 2881 2882 if (clk->exclusive_count) 2883 clk_core_rate_protect(clk->core); 2884 2885 clk_prepare_unlock(); 2886 2887 return ret; 2888 } 2889 EXPORT_SYMBOL_GPL(clk_set_parent); 2890 2891 static int clk_core_set_phase_nolock(struct clk_core *core, int degrees) 2892 { 2893 int ret = -EINVAL; 2894 2895 lockdep_assert_held(&prepare_lock); 2896 2897 if (!core) 2898 return 0; 2899 2900 if (clk_core_rate_is_protected(core)) 2901 return -EBUSY; 2902 2903 trace_clk_set_phase(core, degrees); 2904 2905 if (core->ops->set_phase) { 2906 ret = core->ops->set_phase(core->hw, degrees); 2907 if (!ret) 2908 core->phase = degrees; 2909 } 2910 2911 trace_clk_set_phase_complete(core, degrees); 2912 2913 return ret; 2914 } 2915 2916 /** 2917 * clk_set_phase - adjust the phase shift of a clock signal 2918 * @clk: clock signal source 2919 * @degrees: number of degrees the signal is shifted 2920 * 2921 * Shifts the phase of a clock signal by the specified 2922 * degrees. Returns 0 on success, -EERROR otherwise. 2923 * 2924 * This function makes no distinction about the input or reference 2925 * signal that we adjust the clock signal phase against. For example 2926 * phase locked-loop clock signal generators we may shift phase with 2927 * respect to feedback clock signal input, but for other cases the 2928 * clock phase may be shifted with respect to some other, unspecified 2929 * signal. 2930 * 2931 * Additionally the concept of phase shift does not propagate through 2932 * the clock tree hierarchy, which sets it apart from clock rates and 2933 * clock accuracy. A parent clock phase attribute does not have an 2934 * impact on the phase attribute of a child clock. 2935 */ 2936 int clk_set_phase(struct clk *clk, int degrees) 2937 { 2938 int ret; 2939 2940 if (!clk) 2941 return 0; 2942 2943 /* sanity check degrees */ 2944 degrees %= 360; 2945 if (degrees < 0) 2946 degrees += 360; 2947 2948 clk_prepare_lock(); 2949 2950 if (clk->exclusive_count) 2951 clk_core_rate_unprotect(clk->core); 2952 2953 ret = clk_core_set_phase_nolock(clk->core, degrees); 2954 2955 if (clk->exclusive_count) 2956 clk_core_rate_protect(clk->core); 2957 2958 clk_prepare_unlock(); 2959 2960 return ret; 2961 } 2962 EXPORT_SYMBOL_GPL(clk_set_phase); 2963 2964 static int clk_core_get_phase(struct clk_core *core) 2965 { 2966 int ret; 2967 2968 lockdep_assert_held(&prepare_lock); 2969 if (!core->ops->get_phase) 2970 return 0; 2971 2972 /* Always try to update cached phase if possible */ 2973 ret = core->ops->get_phase(core->hw); 2974 if (ret >= 0) 2975 core->phase = ret; 2976 2977 return ret; 2978 } 2979 2980 /** 2981 * clk_get_phase - return the phase shift of a clock signal 2982 * @clk: clock signal source 2983 * 2984 * Returns the phase shift of a clock node in degrees, otherwise returns 2985 * -EERROR. 2986 */ 2987 int clk_get_phase(struct clk *clk) 2988 { 2989 int ret; 2990 2991 if (!clk) 2992 return 0; 2993 2994 clk_prepare_lock(); 2995 ret = clk_core_get_phase(clk->core); 2996 clk_prepare_unlock(); 2997 2998 return ret; 2999 } 3000 EXPORT_SYMBOL_GPL(clk_get_phase); 3001 3002 static void clk_core_reset_duty_cycle_nolock(struct clk_core *core) 3003 { 3004 /* Assume a default value of 50% */ 3005 core->duty.num = 1; 3006 core->duty.den = 2; 3007 } 3008 3009 static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core); 3010 3011 static int clk_core_update_duty_cycle_nolock(struct clk_core *core) 3012 { 3013 struct clk_duty *duty = &core->duty; 3014 int ret = 0; 3015 3016 if (!core->ops->get_duty_cycle) 3017 return clk_core_update_duty_cycle_parent_nolock(core); 3018 3019 ret = core->ops->get_duty_cycle(core->hw, duty); 3020 if (ret) 3021 goto reset; 3022 3023 /* Don't trust the clock provider too much */ 3024 if (duty->den == 0 || duty->num > duty->den) { 3025 ret = -EINVAL; 3026 goto reset; 3027 } 3028 3029 return 0; 3030 3031 reset: 3032 clk_core_reset_duty_cycle_nolock(core); 3033 return ret; 3034 } 3035 3036 static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core) 3037 { 3038 int ret = 0; 3039 3040 if (core->parent && 3041 core->flags & CLK_DUTY_CYCLE_PARENT) { 3042 ret = clk_core_update_duty_cycle_nolock(core->parent); 3043 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty)); 3044 } else { 3045 clk_core_reset_duty_cycle_nolock(core); 3046 } 3047 3048 return ret; 3049 } 3050 3051 static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core, 3052 struct clk_duty *duty); 3053 3054 static int clk_core_set_duty_cycle_nolock(struct clk_core *core, 3055 struct clk_duty *duty) 3056 { 3057 int ret; 3058 3059 lockdep_assert_held(&prepare_lock); 3060 3061 if (clk_core_rate_is_protected(core)) 3062 return -EBUSY; 3063 3064 trace_clk_set_duty_cycle(core, duty); 3065 3066 if (!core->ops->set_duty_cycle) 3067 return clk_core_set_duty_cycle_parent_nolock(core, duty); 3068 3069 ret = core->ops->set_duty_cycle(core->hw, duty); 3070 if (!ret) 3071 memcpy(&core->duty, duty, sizeof(*duty)); 3072 3073 trace_clk_set_duty_cycle_complete(core, duty); 3074 3075 return ret; 3076 } 3077 3078 static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core, 3079 struct clk_duty *duty) 3080 { 3081 int ret = 0; 3082 3083 if (core->parent && 3084 core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) { 3085 ret = clk_core_set_duty_cycle_nolock(core->parent, duty); 3086 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty)); 3087 } 3088 3089 return ret; 3090 } 3091 3092 /** 3093 * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal 3094 * @clk: clock signal source 3095 * @num: numerator of the duty cycle ratio to be applied 3096 * @den: denominator of the duty cycle ratio to be applied 3097 * 3098 * Apply the duty cycle ratio if the ratio is valid and the clock can 3099 * perform this operation 3100 * 3101 * Returns (0) on success, a negative errno otherwise. 3102 */ 3103 int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den) 3104 { 3105 int ret; 3106 struct clk_duty duty; 3107 3108 if (!clk) 3109 return 0; 3110 3111 /* sanity check the ratio */ 3112 if (den == 0 || num > den) 3113 return -EINVAL; 3114 3115 duty.num = num; 3116 duty.den = den; 3117 3118 clk_prepare_lock(); 3119 3120 if (clk->exclusive_count) 3121 clk_core_rate_unprotect(clk->core); 3122 3123 ret = clk_core_set_duty_cycle_nolock(clk->core, &duty); 3124 3125 if (clk->exclusive_count) 3126 clk_core_rate_protect(clk->core); 3127 3128 clk_prepare_unlock(); 3129 3130 return ret; 3131 } 3132 EXPORT_SYMBOL_GPL(clk_set_duty_cycle); 3133 3134 static int clk_core_get_scaled_duty_cycle(struct clk_core *core, 3135 unsigned int scale) 3136 { 3137 struct clk_duty *duty = &core->duty; 3138 int ret; 3139 3140 clk_prepare_lock(); 3141 3142 ret = clk_core_update_duty_cycle_nolock(core); 3143 if (!ret) 3144 ret = mult_frac(scale, duty->num, duty->den); 3145 3146 clk_prepare_unlock(); 3147 3148 return ret; 3149 } 3150 3151 /** 3152 * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal 3153 * @clk: clock signal source 3154 * @scale: scaling factor to be applied to represent the ratio as an integer 3155 * 3156 * Returns the duty cycle ratio of a clock node multiplied by the provided 3157 * scaling factor, or negative errno on error. 3158 */ 3159 int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale) 3160 { 3161 if (!clk) 3162 return 0; 3163 3164 return clk_core_get_scaled_duty_cycle(clk->core, scale); 3165 } 3166 EXPORT_SYMBOL_GPL(clk_get_scaled_duty_cycle); 3167 3168 /** 3169 * clk_is_match - check if two clk's point to the same hardware clock 3170 * @p: clk compared against q 3171 * @q: clk compared against p 3172 * 3173 * Returns true if the two struct clk pointers both point to the same hardware 3174 * clock node. Put differently, returns true if struct clk *p and struct clk *q 3175 * share the same struct clk_core object. 3176 * 3177 * Returns false otherwise. Note that two NULL clks are treated as matching. 3178 */ 3179 bool clk_is_match(const struct clk *p, const struct clk *q) 3180 { 3181 /* trivial case: identical struct clk's or both NULL */ 3182 if (p == q) 3183 return true; 3184 3185 /* true if clk->core pointers match. Avoid dereferencing garbage */ 3186 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q)) 3187 if (p->core == q->core) 3188 return true; 3189 3190 return false; 3191 } 3192 EXPORT_SYMBOL_GPL(clk_is_match); 3193 3194 /*** debugfs support ***/ 3195 3196 #ifdef CONFIG_DEBUG_FS 3197 #include <linux/debugfs.h> 3198 3199 static struct dentry *rootdir; 3200 static int inited = 0; 3201 static DEFINE_MUTEX(clk_debug_lock); 3202 static HLIST_HEAD(clk_debug_list); 3203 3204 static struct hlist_head *orphan_list[] = { 3205 &clk_orphan_list, 3206 NULL, 3207 }; 3208 3209 static void clk_summary_show_one(struct seq_file *s, struct clk_core *c, 3210 int level) 3211 { 3212 int phase; 3213 struct clk *clk_user; 3214 int multi_node = 0; 3215 3216 seq_printf(s, "%*s%-*s %-7d %-8d %-8d %-11lu %-10lu ", 3217 level * 3 + 1, "", 3218 35 - level * 3, c->name, 3219 c->enable_count, c->prepare_count, c->protect_count, 3220 clk_core_get_rate_recalc(c), 3221 clk_core_get_accuracy_recalc(c)); 3222 3223 phase = clk_core_get_phase(c); 3224 if (phase >= 0) 3225 seq_printf(s, "%-5d", phase); 3226 else 3227 seq_puts(s, "-----"); 3228 3229 seq_printf(s, " %-6d", clk_core_get_scaled_duty_cycle(c, 100000)); 3230 3231 if (c->ops->is_enabled) 3232 seq_printf(s, " %5c ", clk_core_is_enabled(c) ? 'Y' : 'N'); 3233 else if (!c->ops->enable) 3234 seq_printf(s, " %5c ", 'Y'); 3235 else 3236 seq_printf(s, " %5c ", '?'); 3237 3238 hlist_for_each_entry(clk_user, &c->clks, clks_node) { 3239 seq_printf(s, "%*s%-*s %-25s\n", 3240 level * 3 + 2 + 105 * multi_node, "", 3241 30, 3242 clk_user->dev_id ? clk_user->dev_id : "deviceless", 3243 clk_user->con_id ? clk_user->con_id : "no_connection_id"); 3244 3245 multi_node = 1; 3246 } 3247 3248 } 3249 3250 static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c, 3251 int level) 3252 { 3253 struct clk_core *child; 3254 3255 clk_pm_runtime_get(c); 3256 clk_summary_show_one(s, c, level); 3257 clk_pm_runtime_put(c); 3258 3259 hlist_for_each_entry(child, &c->children, child_node) 3260 clk_summary_show_subtree(s, child, level + 1); 3261 } 3262 3263 static int clk_summary_show(struct seq_file *s, void *data) 3264 { 3265 struct clk_core *c; 3266 struct hlist_head **lists = s->private; 3267 3268 seq_puts(s, " enable prepare protect duty hardware connection\n"); 3269 seq_puts(s, " clock count count count rate accuracy phase cycle enable consumer id\n"); 3270 seq_puts(s, "---------------------------------------------------------------------------------------------------------------------------------------------\n"); 3271 3272 3273 clk_prepare_lock(); 3274 3275 for (; *lists; lists++) 3276 hlist_for_each_entry(c, *lists, child_node) 3277 clk_summary_show_subtree(s, c, 0); 3278 3279 clk_prepare_unlock(); 3280 3281 return 0; 3282 } 3283 DEFINE_SHOW_ATTRIBUTE(clk_summary); 3284 3285 static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level) 3286 { 3287 int phase; 3288 unsigned long min_rate, max_rate; 3289 3290 clk_core_get_boundaries(c, &min_rate, &max_rate); 3291 3292 /* This should be JSON format, i.e. elements separated with a comma */ 3293 seq_printf(s, "\"%s\": { ", c->name); 3294 seq_printf(s, "\"enable_count\": %d,", c->enable_count); 3295 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); 3296 seq_printf(s, "\"protect_count\": %d,", c->protect_count); 3297 seq_printf(s, "\"rate\": %lu,", clk_core_get_rate_recalc(c)); 3298 seq_printf(s, "\"min_rate\": %lu,", min_rate); 3299 seq_printf(s, "\"max_rate\": %lu,", max_rate); 3300 seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy_recalc(c)); 3301 phase = clk_core_get_phase(c); 3302 if (phase >= 0) 3303 seq_printf(s, "\"phase\": %d,", phase); 3304 seq_printf(s, "\"duty_cycle\": %u", 3305 clk_core_get_scaled_duty_cycle(c, 100000)); 3306 } 3307 3308 static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level) 3309 { 3310 struct clk_core *child; 3311 3312 clk_dump_one(s, c, level); 3313 3314 hlist_for_each_entry(child, &c->children, child_node) { 3315 seq_putc(s, ','); 3316 clk_dump_subtree(s, child, level + 1); 3317 } 3318 3319 seq_putc(s, '}'); 3320 } 3321 3322 static int clk_dump_show(struct seq_file *s, void *data) 3323 { 3324 struct clk_core *c; 3325 bool first_node = true; 3326 struct hlist_head **lists = s->private; 3327 3328 seq_putc(s, '{'); 3329 clk_prepare_lock(); 3330 3331 for (; *lists; lists++) { 3332 hlist_for_each_entry(c, *lists, child_node) { 3333 if (!first_node) 3334 seq_putc(s, ','); 3335 first_node = false; 3336 clk_dump_subtree(s, c, 0); 3337 } 3338 } 3339 3340 clk_prepare_unlock(); 3341 3342 seq_puts(s, "}\n"); 3343 return 0; 3344 } 3345 DEFINE_SHOW_ATTRIBUTE(clk_dump); 3346 3347 #undef CLOCK_ALLOW_WRITE_DEBUGFS 3348 #ifdef CLOCK_ALLOW_WRITE_DEBUGFS 3349 /* 3350 * This can be dangerous, therefore don't provide any real compile time 3351 * configuration option for this feature. 3352 * People who want to use this will need to modify the source code directly. 3353 */ 3354 static int clk_rate_set(void *data, u64 val) 3355 { 3356 struct clk_core *core = data; 3357 int ret; 3358 3359 clk_prepare_lock(); 3360 ret = clk_core_set_rate_nolock(core, val); 3361 clk_prepare_unlock(); 3362 3363 return ret; 3364 } 3365 3366 #define clk_rate_mode 0644 3367 3368 static int clk_phase_set(void *data, u64 val) 3369 { 3370 struct clk_core *core = data; 3371 int degrees = do_div(val, 360); 3372 int ret; 3373 3374 clk_prepare_lock(); 3375 ret = clk_core_set_phase_nolock(core, degrees); 3376 clk_prepare_unlock(); 3377 3378 return ret; 3379 } 3380 3381 #define clk_phase_mode 0644 3382 3383 static int clk_prepare_enable_set(void *data, u64 val) 3384 { 3385 struct clk_core *core = data; 3386 int ret = 0; 3387 3388 if (val) 3389 ret = clk_prepare_enable(core->hw->clk); 3390 else 3391 clk_disable_unprepare(core->hw->clk); 3392 3393 return ret; 3394 } 3395 3396 static int clk_prepare_enable_get(void *data, u64 *val) 3397 { 3398 struct clk_core *core = data; 3399 3400 *val = core->enable_count && core->prepare_count; 3401 return 0; 3402 } 3403 3404 DEFINE_DEBUGFS_ATTRIBUTE(clk_prepare_enable_fops, clk_prepare_enable_get, 3405 clk_prepare_enable_set, "%llu\n"); 3406 3407 #else 3408 #define clk_rate_set NULL 3409 #define clk_rate_mode 0444 3410 3411 #define clk_phase_set NULL 3412 #define clk_phase_mode 0644 3413 #endif 3414 3415 static int clk_rate_get(void *data, u64 *val) 3416 { 3417 struct clk_core *core = data; 3418 3419 clk_prepare_lock(); 3420 *val = clk_core_get_rate_recalc(core); 3421 clk_prepare_unlock(); 3422 3423 return 0; 3424 } 3425 3426 DEFINE_DEBUGFS_ATTRIBUTE(clk_rate_fops, clk_rate_get, clk_rate_set, "%llu\n"); 3427 3428 static int clk_phase_get(void *data, u64 *val) 3429 { 3430 struct clk_core *core = data; 3431 3432 *val = core->phase; 3433 return 0; 3434 } 3435 3436 DEFINE_DEBUGFS_ATTRIBUTE(clk_phase_fops, clk_phase_get, clk_phase_set, "%llu\n"); 3437 3438 static const struct { 3439 unsigned long flag; 3440 const char *name; 3441 } clk_flags[] = { 3442 #define ENTRY(f) { f, #f } 3443 ENTRY(CLK_SET_RATE_GATE), 3444 ENTRY(CLK_SET_PARENT_GATE), 3445 ENTRY(CLK_SET_RATE_PARENT), 3446 ENTRY(CLK_IGNORE_UNUSED), 3447 ENTRY(CLK_GET_RATE_NOCACHE), 3448 ENTRY(CLK_SET_RATE_NO_REPARENT), 3449 ENTRY(CLK_GET_ACCURACY_NOCACHE), 3450 ENTRY(CLK_RECALC_NEW_RATES), 3451 ENTRY(CLK_SET_RATE_UNGATE), 3452 ENTRY(CLK_IS_CRITICAL), 3453 ENTRY(CLK_OPS_PARENT_ENABLE), 3454 ENTRY(CLK_DUTY_CYCLE_PARENT), 3455 #undef ENTRY 3456 }; 3457 3458 static int clk_flags_show(struct seq_file *s, void *data) 3459 { 3460 struct clk_core *core = s->private; 3461 unsigned long flags = core->flags; 3462 unsigned int i; 3463 3464 for (i = 0; flags && i < ARRAY_SIZE(clk_flags); i++) { 3465 if (flags & clk_flags[i].flag) { 3466 seq_printf(s, "%s\n", clk_flags[i].name); 3467 flags &= ~clk_flags[i].flag; 3468 } 3469 } 3470 if (flags) { 3471 /* Unknown flags */ 3472 seq_printf(s, "0x%lx\n", flags); 3473 } 3474 3475 return 0; 3476 } 3477 DEFINE_SHOW_ATTRIBUTE(clk_flags); 3478 3479 static void possible_parent_show(struct seq_file *s, struct clk_core *core, 3480 unsigned int i, char terminator) 3481 { 3482 struct clk_core *parent; 3483 const char *name = NULL; 3484 3485 /* 3486 * Go through the following options to fetch a parent's name. 3487 * 3488 * 1. Fetch the registered parent clock and use its name 3489 * 2. Use the global (fallback) name if specified 3490 * 3. Use the local fw_name if provided 3491 * 4. Fetch parent clock's clock-output-name if DT index was set 3492 * 3493 * This may still fail in some cases, such as when the parent is 3494 * specified directly via a struct clk_hw pointer, but it isn't 3495 * registered (yet). 3496 */ 3497 parent = clk_core_get_parent_by_index(core, i); 3498 if (parent) { 3499 seq_puts(s, parent->name); 3500 } else if (core->parents[i].name) { 3501 seq_puts(s, core->parents[i].name); 3502 } else if (core->parents[i].fw_name) { 3503 seq_printf(s, "<%s>(fw)", core->parents[i].fw_name); 3504 } else { 3505 if (core->parents[i].index >= 0) 3506 name = of_clk_get_parent_name(core->of_node, core->parents[i].index); 3507 if (!name) 3508 name = "(missing)"; 3509 3510 seq_puts(s, name); 3511 } 3512 3513 seq_putc(s, terminator); 3514 } 3515 3516 static int possible_parents_show(struct seq_file *s, void *data) 3517 { 3518 struct clk_core *core = s->private; 3519 int i; 3520 3521 for (i = 0; i < core->num_parents - 1; i++) 3522 possible_parent_show(s, core, i, ' '); 3523 3524 possible_parent_show(s, core, i, '\n'); 3525 3526 return 0; 3527 } 3528 DEFINE_SHOW_ATTRIBUTE(possible_parents); 3529 3530 static int current_parent_show(struct seq_file *s, void *data) 3531 { 3532 struct clk_core *core = s->private; 3533 3534 if (core->parent) 3535 seq_printf(s, "%s\n", core->parent->name); 3536 3537 return 0; 3538 } 3539 DEFINE_SHOW_ATTRIBUTE(current_parent); 3540 3541 #ifdef CLOCK_ALLOW_WRITE_DEBUGFS 3542 static ssize_t current_parent_write(struct file *file, const char __user *ubuf, 3543 size_t count, loff_t *ppos) 3544 { 3545 struct seq_file *s = file->private_data; 3546 struct clk_core *core = s->private; 3547 struct clk_core *parent; 3548 u8 idx; 3549 int err; 3550 3551 err = kstrtou8_from_user(ubuf, count, 0, &idx); 3552 if (err < 0) 3553 return err; 3554 3555 parent = clk_core_get_parent_by_index(core, idx); 3556 if (!parent) 3557 return -ENOENT; 3558 3559 clk_prepare_lock(); 3560 err = clk_core_set_parent_nolock(core, parent); 3561 clk_prepare_unlock(); 3562 if (err) 3563 return err; 3564 3565 return count; 3566 } 3567 3568 static const struct file_operations current_parent_rw_fops = { 3569 .open = current_parent_open, 3570 .write = current_parent_write, 3571 .read = seq_read, 3572 .llseek = seq_lseek, 3573 .release = single_release, 3574 }; 3575 #endif 3576 3577 static int clk_duty_cycle_show(struct seq_file *s, void *data) 3578 { 3579 struct clk_core *core = s->private; 3580 struct clk_duty *duty = &core->duty; 3581 3582 seq_printf(s, "%u/%u\n", duty->num, duty->den); 3583 3584 return 0; 3585 } 3586 DEFINE_SHOW_ATTRIBUTE(clk_duty_cycle); 3587 3588 static int clk_min_rate_show(struct seq_file *s, void *data) 3589 { 3590 struct clk_core *core = s->private; 3591 unsigned long min_rate, max_rate; 3592 3593 clk_prepare_lock(); 3594 clk_core_get_boundaries(core, &min_rate, &max_rate); 3595 clk_prepare_unlock(); 3596 seq_printf(s, "%lu\n", min_rate); 3597 3598 return 0; 3599 } 3600 DEFINE_SHOW_ATTRIBUTE(clk_min_rate); 3601 3602 static int clk_max_rate_show(struct seq_file *s, void *data) 3603 { 3604 struct clk_core *core = s->private; 3605 unsigned long min_rate, max_rate; 3606 3607 clk_prepare_lock(); 3608 clk_core_get_boundaries(core, &min_rate, &max_rate); 3609 clk_prepare_unlock(); 3610 seq_printf(s, "%lu\n", max_rate); 3611 3612 return 0; 3613 } 3614 DEFINE_SHOW_ATTRIBUTE(clk_max_rate); 3615 3616 static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry) 3617 { 3618 struct dentry *root; 3619 3620 if (!core || !pdentry) 3621 return; 3622 3623 root = debugfs_create_dir(core->name, pdentry); 3624 core->dentry = root; 3625 3626 debugfs_create_file("clk_rate", clk_rate_mode, root, core, 3627 &clk_rate_fops); 3628 debugfs_create_file("clk_min_rate", 0444, root, core, &clk_min_rate_fops); 3629 debugfs_create_file("clk_max_rate", 0444, root, core, &clk_max_rate_fops); 3630 debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy); 3631 debugfs_create_file("clk_phase", clk_phase_mode, root, core, 3632 &clk_phase_fops); 3633 debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops); 3634 debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count); 3635 debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count); 3636 debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count); 3637 debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count); 3638 debugfs_create_file("clk_duty_cycle", 0444, root, core, 3639 &clk_duty_cycle_fops); 3640 #ifdef CLOCK_ALLOW_WRITE_DEBUGFS 3641 debugfs_create_file("clk_prepare_enable", 0644, root, core, 3642 &clk_prepare_enable_fops); 3643 3644 if (core->num_parents > 1) 3645 debugfs_create_file("clk_parent", 0644, root, core, 3646 ¤t_parent_rw_fops); 3647 else 3648 #endif 3649 if (core->num_parents > 0) 3650 debugfs_create_file("clk_parent", 0444, root, core, 3651 ¤t_parent_fops); 3652 3653 if (core->num_parents > 1) 3654 debugfs_create_file("clk_possible_parents", 0444, root, core, 3655 &possible_parents_fops); 3656 3657 if (core->ops->debug_init) 3658 core->ops->debug_init(core->hw, core->dentry); 3659 } 3660 3661 /** 3662 * clk_debug_register - add a clk node to the debugfs clk directory 3663 * @core: the clk being added to the debugfs clk directory 3664 * 3665 * Dynamically adds a clk to the debugfs clk directory if debugfs has been 3666 * initialized. Otherwise it bails out early since the debugfs clk directory 3667 * will be created lazily by clk_debug_init as part of a late_initcall. 3668 */ 3669 static void clk_debug_register(struct clk_core *core) 3670 { 3671 mutex_lock(&clk_debug_lock); 3672 hlist_add_head(&core->debug_node, &clk_debug_list); 3673 if (inited) 3674 clk_debug_create_one(core, rootdir); 3675 mutex_unlock(&clk_debug_lock); 3676 } 3677 3678 /** 3679 * clk_debug_unregister - remove a clk node from the debugfs clk directory 3680 * @core: the clk being removed from the debugfs clk directory 3681 * 3682 * Dynamically removes a clk and all its child nodes from the 3683 * debugfs clk directory if clk->dentry points to debugfs created by 3684 * clk_debug_register in __clk_core_init. 3685 */ 3686 static void clk_debug_unregister(struct clk_core *core) 3687 { 3688 mutex_lock(&clk_debug_lock); 3689 hlist_del_init(&core->debug_node); 3690 debugfs_remove_recursive(core->dentry); 3691 core->dentry = NULL; 3692 mutex_unlock(&clk_debug_lock); 3693 } 3694 3695 /** 3696 * clk_debug_init - lazily populate the debugfs clk directory 3697 * 3698 * clks are often initialized very early during boot before memory can be 3699 * dynamically allocated and well before debugfs is setup. This function 3700 * populates the debugfs clk directory once at boot-time when we know that 3701 * debugfs is setup. It should only be called once at boot-time, all other clks 3702 * added dynamically will be done so with clk_debug_register. 3703 */ 3704 static int __init clk_debug_init(void) 3705 { 3706 struct clk_core *core; 3707 3708 #ifdef CLOCK_ALLOW_WRITE_DEBUGFS 3709 pr_warn("\n"); 3710 pr_warn("********************************************************************\n"); 3711 pr_warn("** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE **\n"); 3712 pr_warn("** **\n"); 3713 pr_warn("** WRITEABLE clk DebugFS SUPPORT HAS BEEN ENABLED IN THIS KERNEL **\n"); 3714 pr_warn("** **\n"); 3715 pr_warn("** This means that this kernel is built to expose clk operations **\n"); 3716 pr_warn("** such as parent or rate setting, enabling, disabling, etc. **\n"); 3717 pr_warn("** to userspace, which may compromise security on your system. **\n"); 3718 pr_warn("** **\n"); 3719 pr_warn("** If you see this message and you are not debugging the **\n"); 3720 pr_warn("** kernel, report this immediately to your vendor! **\n"); 3721 pr_warn("** **\n"); 3722 pr_warn("** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE **\n"); 3723 pr_warn("********************************************************************\n"); 3724 #endif 3725 3726 rootdir = debugfs_create_dir("clk", NULL); 3727 3728 debugfs_create_file("clk_summary", 0444, rootdir, &all_lists, 3729 &clk_summary_fops); 3730 debugfs_create_file("clk_dump", 0444, rootdir, &all_lists, 3731 &clk_dump_fops); 3732 debugfs_create_file("clk_orphan_summary", 0444, rootdir, &orphan_list, 3733 &clk_summary_fops); 3734 debugfs_create_file("clk_orphan_dump", 0444, rootdir, &orphan_list, 3735 &clk_dump_fops); 3736 3737 mutex_lock(&clk_debug_lock); 3738 hlist_for_each_entry(core, &clk_debug_list, debug_node) 3739 clk_debug_create_one(core, rootdir); 3740 3741 inited = 1; 3742 mutex_unlock(&clk_debug_lock); 3743 3744 return 0; 3745 } 3746 late_initcall(clk_debug_init); 3747 #else 3748 static inline void clk_debug_register(struct clk_core *core) { } 3749 static inline void clk_debug_unregister(struct clk_core *core) 3750 { 3751 } 3752 #endif 3753 3754 static void clk_core_reparent_orphans_nolock(void) 3755 { 3756 struct clk_core *orphan; 3757 struct hlist_node *tmp2; 3758 3759 /* 3760 * walk the list of orphan clocks and reparent any that newly finds a 3761 * parent. 3762 */ 3763 hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) { 3764 struct clk_core *parent = __clk_init_parent(orphan); 3765 3766 /* 3767 * We need to use __clk_set_parent_before() and _after() to 3768 * properly migrate any prepare/enable count of the orphan 3769 * clock. This is important for CLK_IS_CRITICAL clocks, which 3770 * are enabled during init but might not have a parent yet. 3771 */ 3772 if (parent) { 3773 /* update the clk tree topology */ 3774 __clk_set_parent_before(orphan, parent); 3775 __clk_set_parent_after(orphan, parent, NULL); 3776 __clk_recalc_accuracies(orphan); 3777 __clk_recalc_rates(orphan, true, 0); 3778 3779 /* 3780 * __clk_init_parent() will set the initial req_rate to 3781 * 0 if the clock doesn't have clk_ops::recalc_rate and 3782 * is an orphan when it's registered. 3783 * 3784 * 'req_rate' is used by clk_set_rate_range() and 3785 * clk_put() to trigger a clk_set_rate() call whenever 3786 * the boundaries are modified. Let's make sure 3787 * 'req_rate' is set to something non-zero so that 3788 * clk_set_rate_range() doesn't drop the frequency. 3789 */ 3790 orphan->req_rate = orphan->rate; 3791 } 3792 } 3793 } 3794 3795 /** 3796 * __clk_core_init - initialize the data structures in a struct clk_core 3797 * @core: clk_core being initialized 3798 * 3799 * Initializes the lists in struct clk_core, queries the hardware for the 3800 * parent and rate and sets them both. 3801 */ 3802 static int __clk_core_init(struct clk_core *core) 3803 { 3804 int ret; 3805 struct clk_core *parent; 3806 unsigned long rate; 3807 int phase; 3808 3809 clk_prepare_lock(); 3810 3811 /* 3812 * Set hw->core after grabbing the prepare_lock to synchronize with 3813 * callers of clk_core_fill_parent_index() where we treat hw->core 3814 * being NULL as the clk not being registered yet. This is crucial so 3815 * that clks aren't parented until their parent is fully registered. 3816 */ 3817 core->hw->core = core; 3818 3819 ret = clk_pm_runtime_get(core); 3820 if (ret) 3821 goto unlock; 3822 3823 /* check to see if a clock with this name is already registered */ 3824 if (clk_core_lookup(core->name)) { 3825 pr_debug("%s: clk %s already initialized\n", 3826 __func__, core->name); 3827 ret = -EEXIST; 3828 goto out; 3829 } 3830 3831 /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */ 3832 if (core->ops->set_rate && 3833 !((core->ops->round_rate || core->ops->determine_rate) && 3834 core->ops->recalc_rate)) { 3835 pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n", 3836 __func__, core->name); 3837 ret = -EINVAL; 3838 goto out; 3839 } 3840 3841 if (core->ops->set_parent && !core->ops->get_parent) { 3842 pr_err("%s: %s must implement .get_parent & .set_parent\n", 3843 __func__, core->name); 3844 ret = -EINVAL; 3845 goto out; 3846 } 3847 3848 if (core->ops->set_parent && !core->ops->determine_rate) { 3849 pr_err("%s: %s must implement .set_parent & .determine_rate\n", 3850 __func__, core->name); 3851 ret = -EINVAL; 3852 goto out; 3853 } 3854 3855 if (core->num_parents > 1 && !core->ops->get_parent) { 3856 pr_err("%s: %s must implement .get_parent as it has multi parents\n", 3857 __func__, core->name); 3858 ret = -EINVAL; 3859 goto out; 3860 } 3861 3862 if (core->ops->set_rate_and_parent && 3863 !(core->ops->set_parent && core->ops->set_rate)) { 3864 pr_err("%s: %s must implement .set_parent & .set_rate\n", 3865 __func__, core->name); 3866 ret = -EINVAL; 3867 goto out; 3868 } 3869 3870 /* 3871 * optional platform-specific magic 3872 * 3873 * The .init callback is not used by any of the basic clock types, but 3874 * exists for weird hardware that must perform initialization magic for 3875 * CCF to get an accurate view of clock for any other callbacks. It may 3876 * also be used needs to perform dynamic allocations. Such allocation 3877 * must be freed in the terminate() callback. 3878 * This callback shall not be used to initialize the parameters state, 3879 * such as rate, parent, etc ... 3880 * 3881 * If it exist, this callback should called before any other callback of 3882 * the clock 3883 */ 3884 if (core->ops->init) { 3885 ret = core->ops->init(core->hw); 3886 if (ret) 3887 goto out; 3888 } 3889 3890 parent = core->parent = __clk_init_parent(core); 3891 3892 /* 3893 * Populate core->parent if parent has already been clk_core_init'd. If 3894 * parent has not yet been clk_core_init'd then place clk in the orphan 3895 * list. If clk doesn't have any parents then place it in the root 3896 * clk list. 3897 * 3898 * Every time a new clk is clk_init'd then we walk the list of orphan 3899 * clocks and re-parent any that are children of the clock currently 3900 * being clk_init'd. 3901 */ 3902 if (parent) { 3903 hlist_add_head(&core->child_node, &parent->children); 3904 core->orphan = parent->orphan; 3905 } else if (!core->num_parents) { 3906 hlist_add_head(&core->child_node, &clk_root_list); 3907 core->orphan = false; 3908 } else { 3909 hlist_add_head(&core->child_node, &clk_orphan_list); 3910 core->orphan = true; 3911 } 3912 3913 /* 3914 * Set clk's accuracy. The preferred method is to use 3915 * .recalc_accuracy. For simple clocks and lazy developers the default 3916 * fallback is to use the parent's accuracy. If a clock doesn't have a 3917 * parent (or is orphaned) then accuracy is set to zero (perfect 3918 * clock). 3919 */ 3920 if (core->ops->recalc_accuracy) 3921 core->accuracy = core->ops->recalc_accuracy(core->hw, 3922 clk_core_get_accuracy_no_lock(parent)); 3923 else if (parent) 3924 core->accuracy = parent->accuracy; 3925 else 3926 core->accuracy = 0; 3927 3928 /* 3929 * Set clk's phase by clk_core_get_phase() caching the phase. 3930 * Since a phase is by definition relative to its parent, just 3931 * query the current clock phase, or just assume it's in phase. 3932 */ 3933 phase = clk_core_get_phase(core); 3934 if (phase < 0) { 3935 ret = phase; 3936 pr_warn("%s: Failed to get phase for clk '%s'\n", __func__, 3937 core->name); 3938 goto out; 3939 } 3940 3941 /* 3942 * Set clk's duty cycle. 3943 */ 3944 clk_core_update_duty_cycle_nolock(core); 3945 3946 /* 3947 * Set clk's rate. The preferred method is to use .recalc_rate. For 3948 * simple clocks and lazy developers the default fallback is to use the 3949 * parent's rate. If a clock doesn't have a parent (or is orphaned) 3950 * then rate is set to zero. 3951 */ 3952 if (core->ops->recalc_rate) 3953 rate = core->ops->recalc_rate(core->hw, 3954 clk_core_get_rate_nolock(parent)); 3955 else if (parent) 3956 rate = parent->rate; 3957 else 3958 rate = 0; 3959 core->rate = core->req_rate = rate; 3960 3961 /* 3962 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks 3963 * don't get accidentally disabled when walking the orphan tree and 3964 * reparenting clocks 3965 */ 3966 if (core->flags & CLK_IS_CRITICAL) { 3967 ret = clk_core_prepare(core); 3968 if (ret) { 3969 pr_warn("%s: critical clk '%s' failed to prepare\n", 3970 __func__, core->name); 3971 goto out; 3972 } 3973 3974 ret = clk_core_enable_lock(core); 3975 if (ret) { 3976 pr_warn("%s: critical clk '%s' failed to enable\n", 3977 __func__, core->name); 3978 clk_core_unprepare(core); 3979 goto out; 3980 } 3981 } 3982 3983 clk_core_reparent_orphans_nolock(); 3984 3985 kref_init(&core->ref); 3986 out: 3987 clk_pm_runtime_put(core); 3988 unlock: 3989 if (ret) { 3990 hlist_del_init(&core->child_node); 3991 core->hw->core = NULL; 3992 } 3993 3994 clk_prepare_unlock(); 3995 3996 if (!ret) 3997 clk_debug_register(core); 3998 3999 return ret; 4000 } 4001 4002 /** 4003 * clk_core_link_consumer - Add a clk consumer to the list of consumers in a clk_core 4004 * @core: clk to add consumer to 4005 * @clk: consumer to link to a clk 4006 */ 4007 static void clk_core_link_consumer(struct clk_core *core, struct clk *clk) 4008 { 4009 clk_prepare_lock(); 4010 hlist_add_head(&clk->clks_node, &core->clks); 4011 clk_prepare_unlock(); 4012 } 4013 4014 /** 4015 * clk_core_unlink_consumer - Remove a clk consumer from the list of consumers in a clk_core 4016 * @clk: consumer to unlink 4017 */ 4018 static void clk_core_unlink_consumer(struct clk *clk) 4019 { 4020 lockdep_assert_held(&prepare_lock); 4021 hlist_del(&clk->clks_node); 4022 } 4023 4024 /** 4025 * alloc_clk - Allocate a clk consumer, but leave it unlinked to the clk_core 4026 * @core: clk to allocate a consumer for 4027 * @dev_id: string describing device name 4028 * @con_id: connection ID string on device 4029 * 4030 * Returns: clk consumer left unlinked from the consumer list 4031 */ 4032 static struct clk *alloc_clk(struct clk_core *core, const char *dev_id, 4033 const char *con_id) 4034 { 4035 struct clk *clk; 4036 4037 clk = kzalloc(sizeof(*clk), GFP_KERNEL); 4038 if (!clk) 4039 return ERR_PTR(-ENOMEM); 4040 4041 clk->core = core; 4042 clk->dev_id = dev_id; 4043 clk->con_id = kstrdup_const(con_id, GFP_KERNEL); 4044 clk->max_rate = ULONG_MAX; 4045 4046 return clk; 4047 } 4048 4049 /** 4050 * free_clk - Free a clk consumer 4051 * @clk: clk consumer to free 4052 * 4053 * Note, this assumes the clk has been unlinked from the clk_core consumer 4054 * list. 4055 */ 4056 static void free_clk(struct clk *clk) 4057 { 4058 kfree_const(clk->con_id); 4059 kfree(clk); 4060 } 4061 4062 /** 4063 * clk_hw_create_clk: Allocate and link a clk consumer to a clk_core given 4064 * a clk_hw 4065 * @dev: clk consumer device 4066 * @hw: clk_hw associated with the clk being consumed 4067 * @dev_id: string describing device name 4068 * @con_id: connection ID string on device 4069 * 4070 * This is the main function used to create a clk pointer for use by clk 4071 * consumers. It connects a consumer to the clk_core and clk_hw structures 4072 * used by the framework and clk provider respectively. 4073 */ 4074 struct clk *clk_hw_create_clk(struct device *dev, struct clk_hw *hw, 4075 const char *dev_id, const char *con_id) 4076 { 4077 struct clk *clk; 4078 struct clk_core *core; 4079 4080 /* This is to allow this function to be chained to others */ 4081 if (IS_ERR_OR_NULL(hw)) 4082 return ERR_CAST(hw); 4083 4084 core = hw->core; 4085 clk = alloc_clk(core, dev_id, con_id); 4086 if (IS_ERR(clk)) 4087 return clk; 4088 clk->dev = dev; 4089 4090 if (!try_module_get(core->owner)) { 4091 free_clk(clk); 4092 return ERR_PTR(-ENOENT); 4093 } 4094 4095 kref_get(&core->ref); 4096 clk_core_link_consumer(core, clk); 4097 4098 return clk; 4099 } 4100 4101 /** 4102 * clk_hw_get_clk - get clk consumer given an clk_hw 4103 * @hw: clk_hw associated with the clk being consumed 4104 * @con_id: connection ID string on device 4105 * 4106 * Returns: new clk consumer 4107 * This is the function to be used by providers which need 4108 * to get a consumer clk and act on the clock element 4109 * Calls to this function must be balanced with calls clk_put() 4110 */ 4111 struct clk *clk_hw_get_clk(struct clk_hw *hw, const char *con_id) 4112 { 4113 struct device *dev = hw->core->dev; 4114 const char *name = dev ? dev_name(dev) : NULL; 4115 4116 return clk_hw_create_clk(dev, hw, name, con_id); 4117 } 4118 EXPORT_SYMBOL(clk_hw_get_clk); 4119 4120 static int clk_cpy_name(const char **dst_p, const char *src, bool must_exist) 4121 { 4122 const char *dst; 4123 4124 if (!src) { 4125 if (must_exist) 4126 return -EINVAL; 4127 return 0; 4128 } 4129 4130 *dst_p = dst = kstrdup_const(src, GFP_KERNEL); 4131 if (!dst) 4132 return -ENOMEM; 4133 4134 return 0; 4135 } 4136 4137 static int clk_core_populate_parent_map(struct clk_core *core, 4138 const struct clk_init_data *init) 4139 { 4140 u8 num_parents = init->num_parents; 4141 const char * const *parent_names = init->parent_names; 4142 const struct clk_hw **parent_hws = init->parent_hws; 4143 const struct clk_parent_data *parent_data = init->parent_data; 4144 int i, ret = 0; 4145 struct clk_parent_map *parents, *parent; 4146 4147 if (!num_parents) 4148 return 0; 4149 4150 /* 4151 * Avoid unnecessary string look-ups of clk_core's possible parents by 4152 * having a cache of names/clk_hw pointers to clk_core pointers. 4153 */ 4154 parents = kcalloc(num_parents, sizeof(*parents), GFP_KERNEL); 4155 core->parents = parents; 4156 if (!parents) 4157 return -ENOMEM; 4158 4159 /* Copy everything over because it might be __initdata */ 4160 for (i = 0, parent = parents; i < num_parents; i++, parent++) { 4161 parent->index = -1; 4162 if (parent_names) { 4163 /* throw a WARN if any entries are NULL */ 4164 WARN(!parent_names[i], 4165 "%s: invalid NULL in %s's .parent_names\n", 4166 __func__, core->name); 4167 ret = clk_cpy_name(&parent->name, parent_names[i], 4168 true); 4169 } else if (parent_data) { 4170 parent->hw = parent_data[i].hw; 4171 parent->index = parent_data[i].index; 4172 ret = clk_cpy_name(&parent->fw_name, 4173 parent_data[i].fw_name, false); 4174 if (!ret) 4175 ret = clk_cpy_name(&parent->name, 4176 parent_data[i].name, 4177 false); 4178 } else if (parent_hws) { 4179 parent->hw = parent_hws[i]; 4180 } else { 4181 ret = -EINVAL; 4182 WARN(1, "Must specify parents if num_parents > 0\n"); 4183 } 4184 4185 if (ret) { 4186 do { 4187 kfree_const(parents[i].name); 4188 kfree_const(parents[i].fw_name); 4189 } while (--i >= 0); 4190 kfree(parents); 4191 4192 return ret; 4193 } 4194 } 4195 4196 return 0; 4197 } 4198 4199 static void clk_core_free_parent_map(struct clk_core *core) 4200 { 4201 int i = core->num_parents; 4202 4203 if (!core->num_parents) 4204 return; 4205 4206 while (--i >= 0) { 4207 kfree_const(core->parents[i].name); 4208 kfree_const(core->parents[i].fw_name); 4209 } 4210 4211 kfree(core->parents); 4212 } 4213 4214 static struct clk * 4215 __clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw) 4216 { 4217 int ret; 4218 struct clk_core *core; 4219 const struct clk_init_data *init = hw->init; 4220 4221 /* 4222 * The init data is not supposed to be used outside of registration path. 4223 * Set it to NULL so that provider drivers can't use it either and so that 4224 * we catch use of hw->init early on in the core. 4225 */ 4226 hw->init = NULL; 4227 4228 core = kzalloc(sizeof(*core), GFP_KERNEL); 4229 if (!core) { 4230 ret = -ENOMEM; 4231 goto fail_out; 4232 } 4233 4234 core->name = kstrdup_const(init->name, GFP_KERNEL); 4235 if (!core->name) { 4236 ret = -ENOMEM; 4237 goto fail_name; 4238 } 4239 4240 if (WARN_ON(!init->ops)) { 4241 ret = -EINVAL; 4242 goto fail_ops; 4243 } 4244 core->ops = init->ops; 4245 4246 if (dev && pm_runtime_enabled(dev)) 4247 core->rpm_enabled = true; 4248 core->dev = dev; 4249 core->of_node = np; 4250 if (dev && dev->driver) 4251 core->owner = dev->driver->owner; 4252 core->hw = hw; 4253 core->flags = init->flags; 4254 core->num_parents = init->num_parents; 4255 core->min_rate = 0; 4256 core->max_rate = ULONG_MAX; 4257 4258 ret = clk_core_populate_parent_map(core, init); 4259 if (ret) 4260 goto fail_parents; 4261 4262 INIT_HLIST_HEAD(&core->clks); 4263 4264 /* 4265 * Don't call clk_hw_create_clk() here because that would pin the 4266 * provider module to itself and prevent it from ever being removed. 4267 */ 4268 hw->clk = alloc_clk(core, NULL, NULL); 4269 if (IS_ERR(hw->clk)) { 4270 ret = PTR_ERR(hw->clk); 4271 goto fail_create_clk; 4272 } 4273 4274 clk_core_link_consumer(core, hw->clk); 4275 4276 ret = __clk_core_init(core); 4277 if (!ret) 4278 return hw->clk; 4279 4280 clk_prepare_lock(); 4281 clk_core_unlink_consumer(hw->clk); 4282 clk_prepare_unlock(); 4283 4284 free_clk(hw->clk); 4285 hw->clk = NULL; 4286 4287 fail_create_clk: 4288 clk_core_free_parent_map(core); 4289 fail_parents: 4290 fail_ops: 4291 kfree_const(core->name); 4292 fail_name: 4293 kfree(core); 4294 fail_out: 4295 return ERR_PTR(ret); 4296 } 4297 4298 /** 4299 * dev_or_parent_of_node() - Get device node of @dev or @dev's parent 4300 * @dev: Device to get device node of 4301 * 4302 * Return: device node pointer of @dev, or the device node pointer of 4303 * @dev->parent if dev doesn't have a device node, or NULL if neither 4304 * @dev or @dev->parent have a device node. 4305 */ 4306 static struct device_node *dev_or_parent_of_node(struct device *dev) 4307 { 4308 struct device_node *np; 4309 4310 if (!dev) 4311 return NULL; 4312 4313 np = dev_of_node(dev); 4314 if (!np) 4315 np = dev_of_node(dev->parent); 4316 4317 return np; 4318 } 4319 4320 /** 4321 * clk_register - allocate a new clock, register it and return an opaque cookie 4322 * @dev: device that is registering this clock 4323 * @hw: link to hardware-specific clock data 4324 * 4325 * clk_register is the *deprecated* interface for populating the clock tree with 4326 * new clock nodes. Use clk_hw_register() instead. 4327 * 4328 * Returns: a pointer to the newly allocated struct clk which 4329 * cannot be dereferenced by driver code but may be used in conjunction with the 4330 * rest of the clock API. In the event of an error clk_register will return an 4331 * error code; drivers must test for an error code after calling clk_register. 4332 */ 4333 struct clk *clk_register(struct device *dev, struct clk_hw *hw) 4334 { 4335 return __clk_register(dev, dev_or_parent_of_node(dev), hw); 4336 } 4337 EXPORT_SYMBOL_GPL(clk_register); 4338 4339 /** 4340 * clk_hw_register - register a clk_hw and return an error code 4341 * @dev: device that is registering this clock 4342 * @hw: link to hardware-specific clock data 4343 * 4344 * clk_hw_register is the primary interface for populating the clock tree with 4345 * new clock nodes. It returns an integer equal to zero indicating success or 4346 * less than zero indicating failure. Drivers must test for an error code after 4347 * calling clk_hw_register(). 4348 */ 4349 int clk_hw_register(struct device *dev, struct clk_hw *hw) 4350 { 4351 return PTR_ERR_OR_ZERO(__clk_register(dev, dev_or_parent_of_node(dev), 4352 hw)); 4353 } 4354 EXPORT_SYMBOL_GPL(clk_hw_register); 4355 4356 /* 4357 * of_clk_hw_register - register a clk_hw and return an error code 4358 * @node: device_node of device that is registering this clock 4359 * @hw: link to hardware-specific clock data 4360 * 4361 * of_clk_hw_register() is the primary interface for populating the clock tree 4362 * with new clock nodes when a struct device is not available, but a struct 4363 * device_node is. It returns an integer equal to zero indicating success or 4364 * less than zero indicating failure. Drivers must test for an error code after 4365 * calling of_clk_hw_register(). 4366 */ 4367 int of_clk_hw_register(struct device_node *node, struct clk_hw *hw) 4368 { 4369 return PTR_ERR_OR_ZERO(__clk_register(NULL, node, hw)); 4370 } 4371 EXPORT_SYMBOL_GPL(of_clk_hw_register); 4372 4373 /* Free memory allocated for a clock. */ 4374 static void __clk_release(struct kref *ref) 4375 { 4376 struct clk_core *core = container_of(ref, struct clk_core, ref); 4377 4378 lockdep_assert_held(&prepare_lock); 4379 4380 clk_core_free_parent_map(core); 4381 kfree_const(core->name); 4382 kfree(core); 4383 } 4384 4385 /* 4386 * Empty clk_ops for unregistered clocks. These are used temporarily 4387 * after clk_unregister() was called on a clock and until last clock 4388 * consumer calls clk_put() and the struct clk object is freed. 4389 */ 4390 static int clk_nodrv_prepare_enable(struct clk_hw *hw) 4391 { 4392 return -ENXIO; 4393 } 4394 4395 static void clk_nodrv_disable_unprepare(struct clk_hw *hw) 4396 { 4397 WARN_ON_ONCE(1); 4398 } 4399 4400 static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate, 4401 unsigned long parent_rate) 4402 { 4403 return -ENXIO; 4404 } 4405 4406 static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index) 4407 { 4408 return -ENXIO; 4409 } 4410 4411 static int clk_nodrv_determine_rate(struct clk_hw *hw, 4412 struct clk_rate_request *req) 4413 { 4414 return -ENXIO; 4415 } 4416 4417 static const struct clk_ops clk_nodrv_ops = { 4418 .enable = clk_nodrv_prepare_enable, 4419 .disable = clk_nodrv_disable_unprepare, 4420 .prepare = clk_nodrv_prepare_enable, 4421 .unprepare = clk_nodrv_disable_unprepare, 4422 .determine_rate = clk_nodrv_determine_rate, 4423 .set_rate = clk_nodrv_set_rate, 4424 .set_parent = clk_nodrv_set_parent, 4425 }; 4426 4427 static void clk_core_evict_parent_cache_subtree(struct clk_core *root, 4428 const struct clk_core *target) 4429 { 4430 int i; 4431 struct clk_core *child; 4432 4433 for (i = 0; i < root->num_parents; i++) 4434 if (root->parents[i].core == target) 4435 root->parents[i].core = NULL; 4436 4437 hlist_for_each_entry(child, &root->children, child_node) 4438 clk_core_evict_parent_cache_subtree(child, target); 4439 } 4440 4441 /* Remove this clk from all parent caches */ 4442 static void clk_core_evict_parent_cache(struct clk_core *core) 4443 { 4444 const struct hlist_head **lists; 4445 struct clk_core *root; 4446 4447 lockdep_assert_held(&prepare_lock); 4448 4449 for (lists = all_lists; *lists; lists++) 4450 hlist_for_each_entry(root, *lists, child_node) 4451 clk_core_evict_parent_cache_subtree(root, core); 4452 4453 } 4454 4455 /** 4456 * clk_unregister - unregister a currently registered clock 4457 * @clk: clock to unregister 4458 */ 4459 void clk_unregister(struct clk *clk) 4460 { 4461 unsigned long flags; 4462 const struct clk_ops *ops; 4463 4464 if (!clk || WARN_ON_ONCE(IS_ERR(clk))) 4465 return; 4466 4467 clk_debug_unregister(clk->core); 4468 4469 clk_prepare_lock(); 4470 4471 ops = clk->core->ops; 4472 if (ops == &clk_nodrv_ops) { 4473 pr_err("%s: unregistered clock: %s\n", __func__, 4474 clk->core->name); 4475 goto unlock; 4476 } 4477 /* 4478 * Assign empty clock ops for consumers that might still hold 4479 * a reference to this clock. 4480 */ 4481 flags = clk_enable_lock(); 4482 clk->core->ops = &clk_nodrv_ops; 4483 clk_enable_unlock(flags); 4484 4485 if (ops->terminate) 4486 ops->terminate(clk->core->hw); 4487 4488 if (!hlist_empty(&clk->core->children)) { 4489 struct clk_core *child; 4490 struct hlist_node *t; 4491 4492 /* Reparent all children to the orphan list. */ 4493 hlist_for_each_entry_safe(child, t, &clk->core->children, 4494 child_node) 4495 clk_core_set_parent_nolock(child, NULL); 4496 } 4497 4498 clk_core_evict_parent_cache(clk->core); 4499 4500 hlist_del_init(&clk->core->child_node); 4501 4502 if (clk->core->prepare_count) 4503 pr_warn("%s: unregistering prepared clock: %s\n", 4504 __func__, clk->core->name); 4505 4506 if (clk->core->protect_count) 4507 pr_warn("%s: unregistering protected clock: %s\n", 4508 __func__, clk->core->name); 4509 4510 kref_put(&clk->core->ref, __clk_release); 4511 free_clk(clk); 4512 unlock: 4513 clk_prepare_unlock(); 4514 } 4515 EXPORT_SYMBOL_GPL(clk_unregister); 4516 4517 /** 4518 * clk_hw_unregister - unregister a currently registered clk_hw 4519 * @hw: hardware-specific clock data to unregister 4520 */ 4521 void clk_hw_unregister(struct clk_hw *hw) 4522 { 4523 clk_unregister(hw->clk); 4524 } 4525 EXPORT_SYMBOL_GPL(clk_hw_unregister); 4526 4527 static void devm_clk_unregister_cb(struct device *dev, void *res) 4528 { 4529 clk_unregister(*(struct clk **)res); 4530 } 4531 4532 static void devm_clk_hw_unregister_cb(struct device *dev, void *res) 4533 { 4534 clk_hw_unregister(*(struct clk_hw **)res); 4535 } 4536 4537 /** 4538 * devm_clk_register - resource managed clk_register() 4539 * @dev: device that is registering this clock 4540 * @hw: link to hardware-specific clock data 4541 * 4542 * Managed clk_register(). This function is *deprecated*, use devm_clk_hw_register() instead. 4543 * 4544 * Clocks returned from this function are automatically clk_unregister()ed on 4545 * driver detach. See clk_register() for more information. 4546 */ 4547 struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) 4548 { 4549 struct clk *clk; 4550 struct clk **clkp; 4551 4552 clkp = devres_alloc(devm_clk_unregister_cb, sizeof(*clkp), GFP_KERNEL); 4553 if (!clkp) 4554 return ERR_PTR(-ENOMEM); 4555 4556 clk = clk_register(dev, hw); 4557 if (!IS_ERR(clk)) { 4558 *clkp = clk; 4559 devres_add(dev, clkp); 4560 } else { 4561 devres_free(clkp); 4562 } 4563 4564 return clk; 4565 } 4566 EXPORT_SYMBOL_GPL(devm_clk_register); 4567 4568 /** 4569 * devm_clk_hw_register - resource managed clk_hw_register() 4570 * @dev: device that is registering this clock 4571 * @hw: link to hardware-specific clock data 4572 * 4573 * Managed clk_hw_register(). Clocks registered by this function are 4574 * automatically clk_hw_unregister()ed on driver detach. See clk_hw_register() 4575 * for more information. 4576 */ 4577 int devm_clk_hw_register(struct device *dev, struct clk_hw *hw) 4578 { 4579 struct clk_hw **hwp; 4580 int ret; 4581 4582 hwp = devres_alloc(devm_clk_hw_unregister_cb, sizeof(*hwp), GFP_KERNEL); 4583 if (!hwp) 4584 return -ENOMEM; 4585 4586 ret = clk_hw_register(dev, hw); 4587 if (!ret) { 4588 *hwp = hw; 4589 devres_add(dev, hwp); 4590 } else { 4591 devres_free(hwp); 4592 } 4593 4594 return ret; 4595 } 4596 EXPORT_SYMBOL_GPL(devm_clk_hw_register); 4597 4598 static void devm_clk_release(struct device *dev, void *res) 4599 { 4600 clk_put(*(struct clk **)res); 4601 } 4602 4603 /** 4604 * devm_clk_hw_get_clk - resource managed clk_hw_get_clk() 4605 * @dev: device that is registering this clock 4606 * @hw: clk_hw associated with the clk being consumed 4607 * @con_id: connection ID string on device 4608 * 4609 * Managed clk_hw_get_clk(). Clocks got with this function are 4610 * automatically clk_put() on driver detach. See clk_put() 4611 * for more information. 4612 */ 4613 struct clk *devm_clk_hw_get_clk(struct device *dev, struct clk_hw *hw, 4614 const char *con_id) 4615 { 4616 struct clk *clk; 4617 struct clk **clkp; 4618 4619 /* This should not happen because it would mean we have drivers 4620 * passing around clk_hw pointers instead of having the caller use 4621 * proper clk_get() style APIs 4622 */ 4623 WARN_ON_ONCE(dev != hw->core->dev); 4624 4625 clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL); 4626 if (!clkp) 4627 return ERR_PTR(-ENOMEM); 4628 4629 clk = clk_hw_get_clk(hw, con_id); 4630 if (!IS_ERR(clk)) { 4631 *clkp = clk; 4632 devres_add(dev, clkp); 4633 } else { 4634 devres_free(clkp); 4635 } 4636 4637 return clk; 4638 } 4639 EXPORT_SYMBOL_GPL(devm_clk_hw_get_clk); 4640 4641 /* 4642 * clkdev helpers 4643 */ 4644 4645 void __clk_put(struct clk *clk) 4646 { 4647 struct module *owner; 4648 4649 if (!clk || WARN_ON_ONCE(IS_ERR(clk))) 4650 return; 4651 4652 clk_prepare_lock(); 4653 4654 /* 4655 * Before calling clk_put, all calls to clk_rate_exclusive_get() from a 4656 * given user should be balanced with calls to clk_rate_exclusive_put() 4657 * and by that same consumer 4658 */ 4659 if (WARN_ON(clk->exclusive_count)) { 4660 /* We voiced our concern, let's sanitize the situation */ 4661 clk->core->protect_count -= (clk->exclusive_count - 1); 4662 clk_core_rate_unprotect(clk->core); 4663 clk->exclusive_count = 0; 4664 } 4665 4666 hlist_del(&clk->clks_node); 4667 4668 /* If we had any boundaries on that clock, let's drop them. */ 4669 if (clk->min_rate > 0 || clk->max_rate < ULONG_MAX) 4670 clk_set_rate_range_nolock(clk, 0, ULONG_MAX); 4671 4672 owner = clk->core->owner; 4673 kref_put(&clk->core->ref, __clk_release); 4674 4675 clk_prepare_unlock(); 4676 4677 module_put(owner); 4678 4679 free_clk(clk); 4680 } 4681 4682 /*** clk rate change notifiers ***/ 4683 4684 /** 4685 * clk_notifier_register - add a clk rate change notifier 4686 * @clk: struct clk * to watch 4687 * @nb: struct notifier_block * with callback info 4688 * 4689 * Request notification when clk's rate changes. This uses an SRCU 4690 * notifier because we want it to block and notifier unregistrations are 4691 * uncommon. The callbacks associated with the notifier must not 4692 * re-enter into the clk framework by calling any top-level clk APIs; 4693 * this will cause a nested prepare_lock mutex. 4694 * 4695 * In all notification cases (pre, post and abort rate change) the original 4696 * clock rate is passed to the callback via struct clk_notifier_data.old_rate 4697 * and the new frequency is passed via struct clk_notifier_data.new_rate. 4698 * 4699 * clk_notifier_register() must be called from non-atomic context. 4700 * Returns -EINVAL if called with null arguments, -ENOMEM upon 4701 * allocation failure; otherwise, passes along the return value of 4702 * srcu_notifier_chain_register(). 4703 */ 4704 int clk_notifier_register(struct clk *clk, struct notifier_block *nb) 4705 { 4706 struct clk_notifier *cn; 4707 int ret = -ENOMEM; 4708 4709 if (!clk || !nb) 4710 return -EINVAL; 4711 4712 clk_prepare_lock(); 4713 4714 /* search the list of notifiers for this clk */ 4715 list_for_each_entry(cn, &clk_notifier_list, node) 4716 if (cn->clk == clk) 4717 goto found; 4718 4719 /* if clk wasn't in the notifier list, allocate new clk_notifier */ 4720 cn = kzalloc(sizeof(*cn), GFP_KERNEL); 4721 if (!cn) 4722 goto out; 4723 4724 cn->clk = clk; 4725 srcu_init_notifier_head(&cn->notifier_head); 4726 4727 list_add(&cn->node, &clk_notifier_list); 4728 4729 found: 4730 ret = srcu_notifier_chain_register(&cn->notifier_head, nb); 4731 4732 clk->core->notifier_count++; 4733 4734 out: 4735 clk_prepare_unlock(); 4736 4737 return ret; 4738 } 4739 EXPORT_SYMBOL_GPL(clk_notifier_register); 4740 4741 /** 4742 * clk_notifier_unregister - remove a clk rate change notifier 4743 * @clk: struct clk * 4744 * @nb: struct notifier_block * with callback info 4745 * 4746 * Request no further notification for changes to 'clk' and frees memory 4747 * allocated in clk_notifier_register. 4748 * 4749 * Returns -EINVAL if called with null arguments; otherwise, passes 4750 * along the return value of srcu_notifier_chain_unregister(). 4751 */ 4752 int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb) 4753 { 4754 struct clk_notifier *cn; 4755 int ret = -ENOENT; 4756 4757 if (!clk || !nb) 4758 return -EINVAL; 4759 4760 clk_prepare_lock(); 4761 4762 list_for_each_entry(cn, &clk_notifier_list, node) { 4763 if (cn->clk == clk) { 4764 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); 4765 4766 clk->core->notifier_count--; 4767 4768 /* XXX the notifier code should handle this better */ 4769 if (!cn->notifier_head.head) { 4770 srcu_cleanup_notifier_head(&cn->notifier_head); 4771 list_del(&cn->node); 4772 kfree(cn); 4773 } 4774 break; 4775 } 4776 } 4777 4778 clk_prepare_unlock(); 4779 4780 return ret; 4781 } 4782 EXPORT_SYMBOL_GPL(clk_notifier_unregister); 4783 4784 struct clk_notifier_devres { 4785 struct clk *clk; 4786 struct notifier_block *nb; 4787 }; 4788 4789 static void devm_clk_notifier_release(struct device *dev, void *res) 4790 { 4791 struct clk_notifier_devres *devres = res; 4792 4793 clk_notifier_unregister(devres->clk, devres->nb); 4794 } 4795 4796 int devm_clk_notifier_register(struct device *dev, struct clk *clk, 4797 struct notifier_block *nb) 4798 { 4799 struct clk_notifier_devres *devres; 4800 int ret; 4801 4802 devres = devres_alloc(devm_clk_notifier_release, 4803 sizeof(*devres), GFP_KERNEL); 4804 4805 if (!devres) 4806 return -ENOMEM; 4807 4808 ret = clk_notifier_register(clk, nb); 4809 if (!ret) { 4810 devres->clk = clk; 4811 devres->nb = nb; 4812 devres_add(dev, devres); 4813 } else { 4814 devres_free(devres); 4815 } 4816 4817 return ret; 4818 } 4819 EXPORT_SYMBOL_GPL(devm_clk_notifier_register); 4820 4821 #ifdef CONFIG_OF 4822 static void clk_core_reparent_orphans(void) 4823 { 4824 clk_prepare_lock(); 4825 clk_core_reparent_orphans_nolock(); 4826 clk_prepare_unlock(); 4827 } 4828 4829 /** 4830 * struct of_clk_provider - Clock provider registration structure 4831 * @link: Entry in global list of clock providers 4832 * @node: Pointer to device tree node of clock provider 4833 * @get: Get clock callback. Returns NULL or a struct clk for the 4834 * given clock specifier 4835 * @get_hw: Get clk_hw callback. Returns NULL, ERR_PTR or a 4836 * struct clk_hw for the given clock specifier 4837 * @data: context pointer to be passed into @get callback 4838 */ 4839 struct of_clk_provider { 4840 struct list_head link; 4841 4842 struct device_node *node; 4843 struct clk *(*get)(struct of_phandle_args *clkspec, void *data); 4844 struct clk_hw *(*get_hw)(struct of_phandle_args *clkspec, void *data); 4845 void *data; 4846 }; 4847 4848 extern struct of_device_id __clk_of_table; 4849 static const struct of_device_id __clk_of_table_sentinel 4850 __used __section("__clk_of_table_end"); 4851 4852 static LIST_HEAD(of_clk_providers); 4853 static DEFINE_MUTEX(of_clk_mutex); 4854 4855 struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, 4856 void *data) 4857 { 4858 return data; 4859 } 4860 EXPORT_SYMBOL_GPL(of_clk_src_simple_get); 4861 4862 struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data) 4863 { 4864 return data; 4865 } 4866 EXPORT_SYMBOL_GPL(of_clk_hw_simple_get); 4867 4868 struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data) 4869 { 4870 struct clk_onecell_data *clk_data = data; 4871 unsigned int idx = clkspec->args[0]; 4872 4873 if (idx >= clk_data->clk_num) { 4874 pr_err("%s: invalid clock index %u\n", __func__, idx); 4875 return ERR_PTR(-EINVAL); 4876 } 4877 4878 return clk_data->clks[idx]; 4879 } 4880 EXPORT_SYMBOL_GPL(of_clk_src_onecell_get); 4881 4882 struct clk_hw * 4883 of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data) 4884 { 4885 struct clk_hw_onecell_data *hw_data = data; 4886 unsigned int idx = clkspec->args[0]; 4887 4888 if (idx >= hw_data->num) { 4889 pr_err("%s: invalid index %u\n", __func__, idx); 4890 return ERR_PTR(-EINVAL); 4891 } 4892 4893 return hw_data->hws[idx]; 4894 } 4895 EXPORT_SYMBOL_GPL(of_clk_hw_onecell_get); 4896 4897 /** 4898 * of_clk_add_provider() - Register a clock provider for a node 4899 * @np: Device node pointer associated with clock provider 4900 * @clk_src_get: callback for decoding clock 4901 * @data: context pointer for @clk_src_get callback. 4902 * 4903 * This function is *deprecated*. Use of_clk_add_hw_provider() instead. 4904 */ 4905 int of_clk_add_provider(struct device_node *np, 4906 struct clk *(*clk_src_get)(struct of_phandle_args *clkspec, 4907 void *data), 4908 void *data) 4909 { 4910 struct of_clk_provider *cp; 4911 int ret; 4912 4913 if (!np) 4914 return 0; 4915 4916 cp = kzalloc(sizeof(*cp), GFP_KERNEL); 4917 if (!cp) 4918 return -ENOMEM; 4919 4920 cp->node = of_node_get(np); 4921 cp->data = data; 4922 cp->get = clk_src_get; 4923 4924 mutex_lock(&of_clk_mutex); 4925 list_add(&cp->link, &of_clk_providers); 4926 mutex_unlock(&of_clk_mutex); 4927 pr_debug("Added clock from %pOF\n", np); 4928 4929 clk_core_reparent_orphans(); 4930 4931 ret = of_clk_set_defaults(np, true); 4932 if (ret < 0) 4933 of_clk_del_provider(np); 4934 4935 fwnode_dev_initialized(&np->fwnode, true); 4936 4937 return ret; 4938 } 4939 EXPORT_SYMBOL_GPL(of_clk_add_provider); 4940 4941 /** 4942 * of_clk_add_hw_provider() - Register a clock provider for a node 4943 * @np: Device node pointer associated with clock provider 4944 * @get: callback for decoding clk_hw 4945 * @data: context pointer for @get callback. 4946 */ 4947 int of_clk_add_hw_provider(struct device_node *np, 4948 struct clk_hw *(*get)(struct of_phandle_args *clkspec, 4949 void *data), 4950 void *data) 4951 { 4952 struct of_clk_provider *cp; 4953 int ret; 4954 4955 if (!np) 4956 return 0; 4957 4958 cp = kzalloc(sizeof(*cp), GFP_KERNEL); 4959 if (!cp) 4960 return -ENOMEM; 4961 4962 cp->node = of_node_get(np); 4963 cp->data = data; 4964 cp->get_hw = get; 4965 4966 mutex_lock(&of_clk_mutex); 4967 list_add(&cp->link, &of_clk_providers); 4968 mutex_unlock(&of_clk_mutex); 4969 pr_debug("Added clk_hw provider from %pOF\n", np); 4970 4971 clk_core_reparent_orphans(); 4972 4973 ret = of_clk_set_defaults(np, true); 4974 if (ret < 0) 4975 of_clk_del_provider(np); 4976 4977 fwnode_dev_initialized(&np->fwnode, true); 4978 4979 return ret; 4980 } 4981 EXPORT_SYMBOL_GPL(of_clk_add_hw_provider); 4982 4983 static void devm_of_clk_release_provider(struct device *dev, void *res) 4984 { 4985 of_clk_del_provider(*(struct device_node **)res); 4986 } 4987 4988 /* 4989 * We allow a child device to use its parent device as the clock provider node 4990 * for cases like MFD sub-devices where the child device driver wants to use 4991 * devm_*() APIs but not list the device in DT as a sub-node. 4992 */ 4993 static struct device_node *get_clk_provider_node(struct device *dev) 4994 { 4995 struct device_node *np, *parent_np; 4996 4997 np = dev->of_node; 4998 parent_np = dev->parent ? dev->parent->of_node : NULL; 4999 5000 if (!of_property_present(np, "#clock-cells")) 5001 if (of_property_present(parent_np, "#clock-cells")) 5002 np = parent_np; 5003 5004 return np; 5005 } 5006 5007 /** 5008 * devm_of_clk_add_hw_provider() - Managed clk provider node registration 5009 * @dev: Device acting as the clock provider (used for DT node and lifetime) 5010 * @get: callback for decoding clk_hw 5011 * @data: context pointer for @get callback 5012 * 5013 * Registers clock provider for given device's node. If the device has no DT 5014 * node or if the device node lacks of clock provider information (#clock-cells) 5015 * then the parent device's node is scanned for this information. If parent node 5016 * has the #clock-cells then it is used in registration. Provider is 5017 * automatically released at device exit. 5018 * 5019 * Return: 0 on success or an errno on failure. 5020 */ 5021 int devm_of_clk_add_hw_provider(struct device *dev, 5022 struct clk_hw *(*get)(struct of_phandle_args *clkspec, 5023 void *data), 5024 void *data) 5025 { 5026 struct device_node **ptr, *np; 5027 int ret; 5028 5029 ptr = devres_alloc(devm_of_clk_release_provider, sizeof(*ptr), 5030 GFP_KERNEL); 5031 if (!ptr) 5032 return -ENOMEM; 5033 5034 np = get_clk_provider_node(dev); 5035 ret = of_clk_add_hw_provider(np, get, data); 5036 if (!ret) { 5037 *ptr = np; 5038 devres_add(dev, ptr); 5039 } else { 5040 devres_free(ptr); 5041 } 5042 5043 return ret; 5044 } 5045 EXPORT_SYMBOL_GPL(devm_of_clk_add_hw_provider); 5046 5047 /** 5048 * of_clk_del_provider() - Remove a previously registered clock provider 5049 * @np: Device node pointer associated with clock provider 5050 */ 5051 void of_clk_del_provider(struct device_node *np) 5052 { 5053 struct of_clk_provider *cp; 5054 5055 if (!np) 5056 return; 5057 5058 mutex_lock(&of_clk_mutex); 5059 list_for_each_entry(cp, &of_clk_providers, link) { 5060 if (cp->node == np) { 5061 list_del(&cp->link); 5062 fwnode_dev_initialized(&np->fwnode, false); 5063 of_node_put(cp->node); 5064 kfree(cp); 5065 break; 5066 } 5067 } 5068 mutex_unlock(&of_clk_mutex); 5069 } 5070 EXPORT_SYMBOL_GPL(of_clk_del_provider); 5071 5072 /** 5073 * of_parse_clkspec() - Parse a DT clock specifier for a given device node 5074 * @np: device node to parse clock specifier from 5075 * @index: index of phandle to parse clock out of. If index < 0, @name is used 5076 * @name: clock name to find and parse. If name is NULL, the index is used 5077 * @out_args: Result of parsing the clock specifier 5078 * 5079 * Parses a device node's "clocks" and "clock-names" properties to find the 5080 * phandle and cells for the index or name that is desired. The resulting clock 5081 * specifier is placed into @out_args, or an errno is returned when there's a 5082 * parsing error. The @index argument is ignored if @name is non-NULL. 5083 * 5084 * Example: 5085 * 5086 * phandle1: clock-controller@1 { 5087 * #clock-cells = <2>; 5088 * } 5089 * 5090 * phandle2: clock-controller@2 { 5091 * #clock-cells = <1>; 5092 * } 5093 * 5094 * clock-consumer@3 { 5095 * clocks = <&phandle1 1 2 &phandle2 3>; 5096 * clock-names = "name1", "name2"; 5097 * } 5098 * 5099 * To get a device_node for `clock-controller@2' node you may call this 5100 * function a few different ways: 5101 * 5102 * of_parse_clkspec(clock-consumer@3, -1, "name2", &args); 5103 * of_parse_clkspec(clock-consumer@3, 1, NULL, &args); 5104 * of_parse_clkspec(clock-consumer@3, 1, "name2", &args); 5105 * 5106 * Return: 0 upon successfully parsing the clock specifier. Otherwise, -ENOENT 5107 * if @name is NULL or -EINVAL if @name is non-NULL and it can't be found in 5108 * the "clock-names" property of @np. 5109 */ 5110 static int of_parse_clkspec(const struct device_node *np, int index, 5111 const char *name, struct of_phandle_args *out_args) 5112 { 5113 int ret = -ENOENT; 5114 5115 /* Walk up the tree of devices looking for a clock property that matches */ 5116 while (np) { 5117 /* 5118 * For named clocks, first look up the name in the 5119 * "clock-names" property. If it cannot be found, then index 5120 * will be an error code and of_parse_phandle_with_args() will 5121 * return -EINVAL. 5122 */ 5123 if (name) 5124 index = of_property_match_string(np, "clock-names", name); 5125 ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells", 5126 index, out_args); 5127 if (!ret) 5128 break; 5129 if (name && index >= 0) 5130 break; 5131 5132 /* 5133 * No matching clock found on this node. If the parent node 5134 * has a "clock-ranges" property, then we can try one of its 5135 * clocks. 5136 */ 5137 np = np->parent; 5138 if (np && !of_get_property(np, "clock-ranges", NULL)) 5139 break; 5140 index = 0; 5141 } 5142 5143 return ret; 5144 } 5145 5146 static struct clk_hw * 5147 __of_clk_get_hw_from_provider(struct of_clk_provider *provider, 5148 struct of_phandle_args *clkspec) 5149 { 5150 struct clk *clk; 5151 5152 if (provider->get_hw) 5153 return provider->get_hw(clkspec, provider->data); 5154 5155 clk = provider->get(clkspec, provider->data); 5156 if (IS_ERR(clk)) 5157 return ERR_CAST(clk); 5158 return __clk_get_hw(clk); 5159 } 5160 5161 static struct clk_hw * 5162 of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec) 5163 { 5164 struct of_clk_provider *provider; 5165 struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER); 5166 5167 if (!clkspec) 5168 return ERR_PTR(-EINVAL); 5169 5170 mutex_lock(&of_clk_mutex); 5171 list_for_each_entry(provider, &of_clk_providers, link) { 5172 if (provider->node == clkspec->np) { 5173 hw = __of_clk_get_hw_from_provider(provider, clkspec); 5174 if (!IS_ERR(hw)) 5175 break; 5176 } 5177 } 5178 mutex_unlock(&of_clk_mutex); 5179 5180 return hw; 5181 } 5182 5183 /** 5184 * of_clk_get_from_provider() - Lookup a clock from a clock provider 5185 * @clkspec: pointer to a clock specifier data structure 5186 * 5187 * This function looks up a struct clk from the registered list of clock 5188 * providers, an input is a clock specifier data structure as returned 5189 * from the of_parse_phandle_with_args() function call. 5190 */ 5191 struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) 5192 { 5193 struct clk_hw *hw = of_clk_get_hw_from_clkspec(clkspec); 5194 5195 return clk_hw_create_clk(NULL, hw, NULL, __func__); 5196 } 5197 EXPORT_SYMBOL_GPL(of_clk_get_from_provider); 5198 5199 struct clk_hw *of_clk_get_hw(struct device_node *np, int index, 5200 const char *con_id) 5201 { 5202 int ret; 5203 struct clk_hw *hw; 5204 struct of_phandle_args clkspec; 5205 5206 ret = of_parse_clkspec(np, index, con_id, &clkspec); 5207 if (ret) 5208 return ERR_PTR(ret); 5209 5210 hw = of_clk_get_hw_from_clkspec(&clkspec); 5211 of_node_put(clkspec.np); 5212 5213 return hw; 5214 } 5215 5216 static struct clk *__of_clk_get(struct device_node *np, 5217 int index, const char *dev_id, 5218 const char *con_id) 5219 { 5220 struct clk_hw *hw = of_clk_get_hw(np, index, con_id); 5221 5222 return clk_hw_create_clk(NULL, hw, dev_id, con_id); 5223 } 5224 5225 struct clk *of_clk_get(struct device_node *np, int index) 5226 { 5227 return __of_clk_get(np, index, np->full_name, NULL); 5228 } 5229 EXPORT_SYMBOL(of_clk_get); 5230 5231 /** 5232 * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node 5233 * @np: pointer to clock consumer node 5234 * @name: name of consumer's clock input, or NULL for the first clock reference 5235 * 5236 * This function parses the clocks and clock-names properties, 5237 * and uses them to look up the struct clk from the registered list of clock 5238 * providers. 5239 */ 5240 struct clk *of_clk_get_by_name(struct device_node *np, const char *name) 5241 { 5242 if (!np) 5243 return ERR_PTR(-ENOENT); 5244 5245 return __of_clk_get(np, 0, np->full_name, name); 5246 } 5247 EXPORT_SYMBOL(of_clk_get_by_name); 5248 5249 /** 5250 * of_clk_get_parent_count() - Count the number of clocks a device node has 5251 * @np: device node to count 5252 * 5253 * Returns: The number of clocks that are possible parents of this node 5254 */ 5255 unsigned int of_clk_get_parent_count(const struct device_node *np) 5256 { 5257 int count; 5258 5259 count = of_count_phandle_with_args(np, "clocks", "#clock-cells"); 5260 if (count < 0) 5261 return 0; 5262 5263 return count; 5264 } 5265 EXPORT_SYMBOL_GPL(of_clk_get_parent_count); 5266 5267 const char *of_clk_get_parent_name(const struct device_node *np, int index) 5268 { 5269 struct of_phandle_args clkspec; 5270 struct property *prop; 5271 const char *clk_name; 5272 const __be32 *vp; 5273 u32 pv; 5274 int rc; 5275 int count; 5276 struct clk *clk; 5277 5278 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index, 5279 &clkspec); 5280 if (rc) 5281 return NULL; 5282 5283 index = clkspec.args_count ? clkspec.args[0] : 0; 5284 count = 0; 5285 5286 /* if there is an indices property, use it to transfer the index 5287 * specified into an array offset for the clock-output-names property. 5288 */ 5289 of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) { 5290 if (index == pv) { 5291 index = count; 5292 break; 5293 } 5294 count++; 5295 } 5296 /* We went off the end of 'clock-indices' without finding it */ 5297 if (prop && !vp) 5298 return NULL; 5299 5300 if (of_property_read_string_index(clkspec.np, "clock-output-names", 5301 index, 5302 &clk_name) < 0) { 5303 /* 5304 * Best effort to get the name if the clock has been 5305 * registered with the framework. If the clock isn't 5306 * registered, we return the node name as the name of 5307 * the clock as long as #clock-cells = 0. 5308 */ 5309 clk = of_clk_get_from_provider(&clkspec); 5310 if (IS_ERR(clk)) { 5311 if (clkspec.args_count == 0) 5312 clk_name = clkspec.np->name; 5313 else 5314 clk_name = NULL; 5315 } else { 5316 clk_name = __clk_get_name(clk); 5317 clk_put(clk); 5318 } 5319 } 5320 5321 5322 of_node_put(clkspec.np); 5323 return clk_name; 5324 } 5325 EXPORT_SYMBOL_GPL(of_clk_get_parent_name); 5326 5327 /** 5328 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return 5329 * number of parents 5330 * @np: Device node pointer associated with clock provider 5331 * @parents: pointer to char array that hold the parents' names 5332 * @size: size of the @parents array 5333 * 5334 * Return: number of parents for the clock node. 5335 */ 5336 int of_clk_parent_fill(struct device_node *np, const char **parents, 5337 unsigned int size) 5338 { 5339 unsigned int i = 0; 5340 5341 while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL) 5342 i++; 5343 5344 return i; 5345 } 5346 EXPORT_SYMBOL_GPL(of_clk_parent_fill); 5347 5348 struct clock_provider { 5349 void (*clk_init_cb)(struct device_node *); 5350 struct device_node *np; 5351 struct list_head node; 5352 }; 5353 5354 /* 5355 * This function looks for a parent clock. If there is one, then it 5356 * checks that the provider for this parent clock was initialized, in 5357 * this case the parent clock will be ready. 5358 */ 5359 static int parent_ready(struct device_node *np) 5360 { 5361 int i = 0; 5362 5363 while (true) { 5364 struct clk *clk = of_clk_get(np, i); 5365 5366 /* this parent is ready we can check the next one */ 5367 if (!IS_ERR(clk)) { 5368 clk_put(clk); 5369 i++; 5370 continue; 5371 } 5372 5373 /* at least one parent is not ready, we exit now */ 5374 if (PTR_ERR(clk) == -EPROBE_DEFER) 5375 return 0; 5376 5377 /* 5378 * Here we make assumption that the device tree is 5379 * written correctly. So an error means that there is 5380 * no more parent. As we didn't exit yet, then the 5381 * previous parent are ready. If there is no clock 5382 * parent, no need to wait for them, then we can 5383 * consider their absence as being ready 5384 */ 5385 return 1; 5386 } 5387 } 5388 5389 /** 5390 * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree 5391 * @np: Device node pointer associated with clock provider 5392 * @index: clock index 5393 * @flags: pointer to top-level framework flags 5394 * 5395 * Detects if the clock-critical property exists and, if so, sets the 5396 * corresponding CLK_IS_CRITICAL flag. 5397 * 5398 * Do not use this function. It exists only for legacy Device Tree 5399 * bindings, such as the one-clock-per-node style that are outdated. 5400 * Those bindings typically put all clock data into .dts and the Linux 5401 * driver has no clock data, thus making it impossible to set this flag 5402 * correctly from the driver. Only those drivers may call 5403 * of_clk_detect_critical from their setup functions. 5404 * 5405 * Return: error code or zero on success 5406 */ 5407 int of_clk_detect_critical(struct device_node *np, int index, 5408 unsigned long *flags) 5409 { 5410 struct property *prop; 5411 const __be32 *cur; 5412 uint32_t idx; 5413 5414 if (!np || !flags) 5415 return -EINVAL; 5416 5417 of_property_for_each_u32(np, "clock-critical", prop, cur, idx) 5418 if (index == idx) 5419 *flags |= CLK_IS_CRITICAL; 5420 5421 return 0; 5422 } 5423 5424 /** 5425 * of_clk_init() - Scan and init clock providers from the DT 5426 * @matches: array of compatible values and init functions for providers. 5427 * 5428 * This function scans the device tree for matching clock providers 5429 * and calls their initialization functions. It also does it by trying 5430 * to follow the dependencies. 5431 */ 5432 void __init of_clk_init(const struct of_device_id *matches) 5433 { 5434 const struct of_device_id *match; 5435 struct device_node *np; 5436 struct clock_provider *clk_provider, *next; 5437 bool is_init_done; 5438 bool force = false; 5439 LIST_HEAD(clk_provider_list); 5440 5441 if (!matches) 5442 matches = &__clk_of_table; 5443 5444 /* First prepare the list of the clocks providers */ 5445 for_each_matching_node_and_match(np, matches, &match) { 5446 struct clock_provider *parent; 5447 5448 if (!of_device_is_available(np)) 5449 continue; 5450 5451 parent = kzalloc(sizeof(*parent), GFP_KERNEL); 5452 if (!parent) { 5453 list_for_each_entry_safe(clk_provider, next, 5454 &clk_provider_list, node) { 5455 list_del(&clk_provider->node); 5456 of_node_put(clk_provider->np); 5457 kfree(clk_provider); 5458 } 5459 of_node_put(np); 5460 return; 5461 } 5462 5463 parent->clk_init_cb = match->data; 5464 parent->np = of_node_get(np); 5465 list_add_tail(&parent->node, &clk_provider_list); 5466 } 5467 5468 while (!list_empty(&clk_provider_list)) { 5469 is_init_done = false; 5470 list_for_each_entry_safe(clk_provider, next, 5471 &clk_provider_list, node) { 5472 if (force || parent_ready(clk_provider->np)) { 5473 5474 /* Don't populate platform devices */ 5475 of_node_set_flag(clk_provider->np, 5476 OF_POPULATED); 5477 5478 clk_provider->clk_init_cb(clk_provider->np); 5479 of_clk_set_defaults(clk_provider->np, true); 5480 5481 list_del(&clk_provider->node); 5482 of_node_put(clk_provider->np); 5483 kfree(clk_provider); 5484 is_init_done = true; 5485 } 5486 } 5487 5488 /* 5489 * We didn't manage to initialize any of the 5490 * remaining providers during the last loop, so now we 5491 * initialize all the remaining ones unconditionally 5492 * in case the clock parent was not mandatory 5493 */ 5494 if (!is_init_done) 5495 force = true; 5496 } 5497 } 5498 #endif 5499