xref: /linux/drivers/clk/clk.c (revision 1e0731c05c985deb68a97fa44c1adcd3305dda90)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4  * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
5  *
6  * Standard functionality for the common clock API.  See Documentation/driver-api/clk.rst
7  */
8 
9 #include <linux/clk.h>
10 #include <linux/clk-provider.h>
11 #include <linux/clk/clk-conf.h>
12 #include <linux/module.h>
13 #include <linux/mutex.h>
14 #include <linux/spinlock.h>
15 #include <linux/err.h>
16 #include <linux/list.h>
17 #include <linux/slab.h>
18 #include <linux/of.h>
19 #include <linux/device.h>
20 #include <linux/init.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/sched.h>
23 #include <linux/clkdev.h>
24 
25 #include "clk.h"
26 
27 static DEFINE_SPINLOCK(enable_lock);
28 static DEFINE_MUTEX(prepare_lock);
29 
30 static struct task_struct *prepare_owner;
31 static struct task_struct *enable_owner;
32 
33 static int prepare_refcnt;
34 static int enable_refcnt;
35 
36 static HLIST_HEAD(clk_root_list);
37 static HLIST_HEAD(clk_orphan_list);
38 static LIST_HEAD(clk_notifier_list);
39 
40 static const struct hlist_head *all_lists[] = {
41 	&clk_root_list,
42 	&clk_orphan_list,
43 	NULL,
44 };
45 
46 /***    private data structures    ***/
47 
48 struct clk_parent_map {
49 	const struct clk_hw	*hw;
50 	struct clk_core		*core;
51 	const char		*fw_name;
52 	const char		*name;
53 	int			index;
54 };
55 
56 struct clk_core {
57 	const char		*name;
58 	const struct clk_ops	*ops;
59 	struct clk_hw		*hw;
60 	struct module		*owner;
61 	struct device		*dev;
62 	struct device_node	*of_node;
63 	struct clk_core		*parent;
64 	struct clk_parent_map	*parents;
65 	u8			num_parents;
66 	u8			new_parent_index;
67 	unsigned long		rate;
68 	unsigned long		req_rate;
69 	unsigned long		new_rate;
70 	struct clk_core		*new_parent;
71 	struct clk_core		*new_child;
72 	unsigned long		flags;
73 	bool			orphan;
74 	bool			rpm_enabled;
75 	unsigned int		enable_count;
76 	unsigned int		prepare_count;
77 	unsigned int		protect_count;
78 	unsigned long		min_rate;
79 	unsigned long		max_rate;
80 	unsigned long		accuracy;
81 	int			phase;
82 	struct clk_duty		duty;
83 	struct hlist_head	children;
84 	struct hlist_node	child_node;
85 	struct hlist_head	clks;
86 	unsigned int		notifier_count;
87 #ifdef CONFIG_DEBUG_FS
88 	struct dentry		*dentry;
89 	struct hlist_node	debug_node;
90 #endif
91 	struct kref		ref;
92 };
93 
94 #define CREATE_TRACE_POINTS
95 #include <trace/events/clk.h>
96 
97 struct clk {
98 	struct clk_core	*core;
99 	struct device *dev;
100 	const char *dev_id;
101 	const char *con_id;
102 	unsigned long min_rate;
103 	unsigned long max_rate;
104 	unsigned int exclusive_count;
105 	struct hlist_node clks_node;
106 };
107 
108 /***           runtime pm          ***/
109 static int clk_pm_runtime_get(struct clk_core *core)
110 {
111 	if (!core->rpm_enabled)
112 		return 0;
113 
114 	return pm_runtime_resume_and_get(core->dev);
115 }
116 
117 static void clk_pm_runtime_put(struct clk_core *core)
118 {
119 	if (!core->rpm_enabled)
120 		return;
121 
122 	pm_runtime_put_sync(core->dev);
123 }
124 
125 /***           locking             ***/
126 static void clk_prepare_lock(void)
127 {
128 	if (!mutex_trylock(&prepare_lock)) {
129 		if (prepare_owner == current) {
130 			prepare_refcnt++;
131 			return;
132 		}
133 		mutex_lock(&prepare_lock);
134 	}
135 	WARN_ON_ONCE(prepare_owner != NULL);
136 	WARN_ON_ONCE(prepare_refcnt != 0);
137 	prepare_owner = current;
138 	prepare_refcnt = 1;
139 }
140 
141 static void clk_prepare_unlock(void)
142 {
143 	WARN_ON_ONCE(prepare_owner != current);
144 	WARN_ON_ONCE(prepare_refcnt == 0);
145 
146 	if (--prepare_refcnt)
147 		return;
148 	prepare_owner = NULL;
149 	mutex_unlock(&prepare_lock);
150 }
151 
152 static unsigned long clk_enable_lock(void)
153 	__acquires(enable_lock)
154 {
155 	unsigned long flags;
156 
157 	/*
158 	 * On UP systems, spin_trylock_irqsave() always returns true, even if
159 	 * we already hold the lock. So, in that case, we rely only on
160 	 * reference counting.
161 	 */
162 	if (!IS_ENABLED(CONFIG_SMP) ||
163 	    !spin_trylock_irqsave(&enable_lock, flags)) {
164 		if (enable_owner == current) {
165 			enable_refcnt++;
166 			__acquire(enable_lock);
167 			if (!IS_ENABLED(CONFIG_SMP))
168 				local_save_flags(flags);
169 			return flags;
170 		}
171 		spin_lock_irqsave(&enable_lock, flags);
172 	}
173 	WARN_ON_ONCE(enable_owner != NULL);
174 	WARN_ON_ONCE(enable_refcnt != 0);
175 	enable_owner = current;
176 	enable_refcnt = 1;
177 	return flags;
178 }
179 
180 static void clk_enable_unlock(unsigned long flags)
181 	__releases(enable_lock)
182 {
183 	WARN_ON_ONCE(enable_owner != current);
184 	WARN_ON_ONCE(enable_refcnt == 0);
185 
186 	if (--enable_refcnt) {
187 		__release(enable_lock);
188 		return;
189 	}
190 	enable_owner = NULL;
191 	spin_unlock_irqrestore(&enable_lock, flags);
192 }
193 
194 static bool clk_core_rate_is_protected(struct clk_core *core)
195 {
196 	return core->protect_count;
197 }
198 
199 static bool clk_core_is_prepared(struct clk_core *core)
200 {
201 	bool ret = false;
202 
203 	/*
204 	 * .is_prepared is optional for clocks that can prepare
205 	 * fall back to software usage counter if it is missing
206 	 */
207 	if (!core->ops->is_prepared)
208 		return core->prepare_count;
209 
210 	if (!clk_pm_runtime_get(core)) {
211 		ret = core->ops->is_prepared(core->hw);
212 		clk_pm_runtime_put(core);
213 	}
214 
215 	return ret;
216 }
217 
218 static bool clk_core_is_enabled(struct clk_core *core)
219 {
220 	bool ret = false;
221 
222 	/*
223 	 * .is_enabled is only mandatory for clocks that gate
224 	 * fall back to software usage counter if .is_enabled is missing
225 	 */
226 	if (!core->ops->is_enabled)
227 		return core->enable_count;
228 
229 	/*
230 	 * Check if clock controller's device is runtime active before
231 	 * calling .is_enabled callback. If not, assume that clock is
232 	 * disabled, because we might be called from atomic context, from
233 	 * which pm_runtime_get() is not allowed.
234 	 * This function is called mainly from clk_disable_unused_subtree,
235 	 * which ensures proper runtime pm activation of controller before
236 	 * taking enable spinlock, but the below check is needed if one tries
237 	 * to call it from other places.
238 	 */
239 	if (core->rpm_enabled) {
240 		pm_runtime_get_noresume(core->dev);
241 		if (!pm_runtime_active(core->dev)) {
242 			ret = false;
243 			goto done;
244 		}
245 	}
246 
247 	/*
248 	 * This could be called with the enable lock held, or from atomic
249 	 * context. If the parent isn't enabled already, we can't do
250 	 * anything here. We can also assume this clock isn't enabled.
251 	 */
252 	if ((core->flags & CLK_OPS_PARENT_ENABLE) && core->parent)
253 		if (!clk_core_is_enabled(core->parent)) {
254 			ret = false;
255 			goto done;
256 		}
257 
258 	ret = core->ops->is_enabled(core->hw);
259 done:
260 	if (core->rpm_enabled)
261 		pm_runtime_put(core->dev);
262 
263 	return ret;
264 }
265 
266 /***    helper functions   ***/
267 
268 const char *__clk_get_name(const struct clk *clk)
269 {
270 	return !clk ? NULL : clk->core->name;
271 }
272 EXPORT_SYMBOL_GPL(__clk_get_name);
273 
274 const char *clk_hw_get_name(const struct clk_hw *hw)
275 {
276 	return hw->core->name;
277 }
278 EXPORT_SYMBOL_GPL(clk_hw_get_name);
279 
280 struct clk_hw *__clk_get_hw(struct clk *clk)
281 {
282 	return !clk ? NULL : clk->core->hw;
283 }
284 EXPORT_SYMBOL_GPL(__clk_get_hw);
285 
286 unsigned int clk_hw_get_num_parents(const struct clk_hw *hw)
287 {
288 	return hw->core->num_parents;
289 }
290 EXPORT_SYMBOL_GPL(clk_hw_get_num_parents);
291 
292 struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw)
293 {
294 	return hw->core->parent ? hw->core->parent->hw : NULL;
295 }
296 EXPORT_SYMBOL_GPL(clk_hw_get_parent);
297 
298 static struct clk_core *__clk_lookup_subtree(const char *name,
299 					     struct clk_core *core)
300 {
301 	struct clk_core *child;
302 	struct clk_core *ret;
303 
304 	if (!strcmp(core->name, name))
305 		return core;
306 
307 	hlist_for_each_entry(child, &core->children, child_node) {
308 		ret = __clk_lookup_subtree(name, child);
309 		if (ret)
310 			return ret;
311 	}
312 
313 	return NULL;
314 }
315 
316 static struct clk_core *clk_core_lookup(const char *name)
317 {
318 	struct clk_core *root_clk;
319 	struct clk_core *ret;
320 
321 	if (!name)
322 		return NULL;
323 
324 	/* search the 'proper' clk tree first */
325 	hlist_for_each_entry(root_clk, &clk_root_list, child_node) {
326 		ret = __clk_lookup_subtree(name, root_clk);
327 		if (ret)
328 			return ret;
329 	}
330 
331 	/* if not found, then search the orphan tree */
332 	hlist_for_each_entry(root_clk, &clk_orphan_list, child_node) {
333 		ret = __clk_lookup_subtree(name, root_clk);
334 		if (ret)
335 			return ret;
336 	}
337 
338 	return NULL;
339 }
340 
341 #ifdef CONFIG_OF
342 static int of_parse_clkspec(const struct device_node *np, int index,
343 			    const char *name, struct of_phandle_args *out_args);
344 static struct clk_hw *
345 of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec);
346 #else
347 static inline int of_parse_clkspec(const struct device_node *np, int index,
348 				   const char *name,
349 				   struct of_phandle_args *out_args)
350 {
351 	return -ENOENT;
352 }
353 static inline struct clk_hw *
354 of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec)
355 {
356 	return ERR_PTR(-ENOENT);
357 }
358 #endif
359 
360 /**
361  * clk_core_get - Find the clk_core parent of a clk
362  * @core: clk to find parent of
363  * @p_index: parent index to search for
364  *
365  * This is the preferred method for clk providers to find the parent of a
366  * clk when that parent is external to the clk controller. The parent_names
367  * array is indexed and treated as a local name matching a string in the device
368  * node's 'clock-names' property or as the 'con_id' matching the device's
369  * dev_name() in a clk_lookup. This allows clk providers to use their own
370  * namespace instead of looking for a globally unique parent string.
371  *
372  * For example the following DT snippet would allow a clock registered by the
373  * clock-controller@c001 that has a clk_init_data::parent_data array
374  * with 'xtal' in the 'name' member to find the clock provided by the
375  * clock-controller@f00abcd without needing to get the globally unique name of
376  * the xtal clk.
377  *
378  *      parent: clock-controller@f00abcd {
379  *              reg = <0xf00abcd 0xabcd>;
380  *              #clock-cells = <0>;
381  *      };
382  *
383  *      clock-controller@c001 {
384  *              reg = <0xc001 0xf00d>;
385  *              clocks = <&parent>;
386  *              clock-names = "xtal";
387  *              #clock-cells = <1>;
388  *      };
389  *
390  * Returns: -ENOENT when the provider can't be found or the clk doesn't
391  * exist in the provider or the name can't be found in the DT node or
392  * in a clkdev lookup. NULL when the provider knows about the clk but it
393  * isn't provided on this system.
394  * A valid clk_core pointer when the clk can be found in the provider.
395  */
396 static struct clk_core *clk_core_get(struct clk_core *core, u8 p_index)
397 {
398 	const char *name = core->parents[p_index].fw_name;
399 	int index = core->parents[p_index].index;
400 	struct clk_hw *hw = ERR_PTR(-ENOENT);
401 	struct device *dev = core->dev;
402 	const char *dev_id = dev ? dev_name(dev) : NULL;
403 	struct device_node *np = core->of_node;
404 	struct of_phandle_args clkspec;
405 
406 	if (np && (name || index >= 0) &&
407 	    !of_parse_clkspec(np, index, name, &clkspec)) {
408 		hw = of_clk_get_hw_from_clkspec(&clkspec);
409 		of_node_put(clkspec.np);
410 	} else if (name) {
411 		/*
412 		 * If the DT search above couldn't find the provider fallback to
413 		 * looking up via clkdev based clk_lookups.
414 		 */
415 		hw = clk_find_hw(dev_id, name);
416 	}
417 
418 	if (IS_ERR(hw))
419 		return ERR_CAST(hw);
420 
421 	return hw->core;
422 }
423 
424 static void clk_core_fill_parent_index(struct clk_core *core, u8 index)
425 {
426 	struct clk_parent_map *entry = &core->parents[index];
427 	struct clk_core *parent;
428 
429 	if (entry->hw) {
430 		parent = entry->hw->core;
431 	} else {
432 		parent = clk_core_get(core, index);
433 		if (PTR_ERR(parent) == -ENOENT && entry->name)
434 			parent = clk_core_lookup(entry->name);
435 	}
436 
437 	/*
438 	 * We have a direct reference but it isn't registered yet?
439 	 * Orphan it and let clk_reparent() update the orphan status
440 	 * when the parent is registered.
441 	 */
442 	if (!parent)
443 		parent = ERR_PTR(-EPROBE_DEFER);
444 
445 	/* Only cache it if it's not an error */
446 	if (!IS_ERR(parent))
447 		entry->core = parent;
448 }
449 
450 static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
451 							 u8 index)
452 {
453 	if (!core || index >= core->num_parents || !core->parents)
454 		return NULL;
455 
456 	if (!core->parents[index].core)
457 		clk_core_fill_parent_index(core, index);
458 
459 	return core->parents[index].core;
460 }
461 
462 struct clk_hw *
463 clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
464 {
465 	struct clk_core *parent;
466 
467 	parent = clk_core_get_parent_by_index(hw->core, index);
468 
469 	return !parent ? NULL : parent->hw;
470 }
471 EXPORT_SYMBOL_GPL(clk_hw_get_parent_by_index);
472 
473 unsigned int __clk_get_enable_count(struct clk *clk)
474 {
475 	return !clk ? 0 : clk->core->enable_count;
476 }
477 
478 static unsigned long clk_core_get_rate_nolock(struct clk_core *core)
479 {
480 	if (!core)
481 		return 0;
482 
483 	if (!core->num_parents || core->parent)
484 		return core->rate;
485 
486 	/*
487 	 * Clk must have a parent because num_parents > 0 but the parent isn't
488 	 * known yet. Best to return 0 as the rate of this clk until we can
489 	 * properly recalc the rate based on the parent's rate.
490 	 */
491 	return 0;
492 }
493 
494 unsigned long clk_hw_get_rate(const struct clk_hw *hw)
495 {
496 	return clk_core_get_rate_nolock(hw->core);
497 }
498 EXPORT_SYMBOL_GPL(clk_hw_get_rate);
499 
500 static unsigned long clk_core_get_accuracy_no_lock(struct clk_core *core)
501 {
502 	if (!core)
503 		return 0;
504 
505 	return core->accuracy;
506 }
507 
508 unsigned long clk_hw_get_flags(const struct clk_hw *hw)
509 {
510 	return hw->core->flags;
511 }
512 EXPORT_SYMBOL_GPL(clk_hw_get_flags);
513 
514 bool clk_hw_is_prepared(const struct clk_hw *hw)
515 {
516 	return clk_core_is_prepared(hw->core);
517 }
518 EXPORT_SYMBOL_GPL(clk_hw_is_prepared);
519 
520 bool clk_hw_rate_is_protected(const struct clk_hw *hw)
521 {
522 	return clk_core_rate_is_protected(hw->core);
523 }
524 EXPORT_SYMBOL_GPL(clk_hw_rate_is_protected);
525 
526 bool clk_hw_is_enabled(const struct clk_hw *hw)
527 {
528 	return clk_core_is_enabled(hw->core);
529 }
530 EXPORT_SYMBOL_GPL(clk_hw_is_enabled);
531 
532 bool __clk_is_enabled(struct clk *clk)
533 {
534 	if (!clk)
535 		return false;
536 
537 	return clk_core_is_enabled(clk->core);
538 }
539 EXPORT_SYMBOL_GPL(__clk_is_enabled);
540 
541 static bool mux_is_better_rate(unsigned long rate, unsigned long now,
542 			   unsigned long best, unsigned long flags)
543 {
544 	if (flags & CLK_MUX_ROUND_CLOSEST)
545 		return abs(now - rate) < abs(best - rate);
546 
547 	return now <= rate && now > best;
548 }
549 
550 static void clk_core_init_rate_req(struct clk_core * const core,
551 				   struct clk_rate_request *req,
552 				   unsigned long rate);
553 
554 static int clk_core_round_rate_nolock(struct clk_core *core,
555 				      struct clk_rate_request *req);
556 
557 static bool clk_core_has_parent(struct clk_core *core, const struct clk_core *parent)
558 {
559 	struct clk_core *tmp;
560 	unsigned int i;
561 
562 	/* Optimize for the case where the parent is already the parent. */
563 	if (core->parent == parent)
564 		return true;
565 
566 	for (i = 0; i < core->num_parents; i++) {
567 		tmp = clk_core_get_parent_by_index(core, i);
568 		if (!tmp)
569 			continue;
570 
571 		if (tmp == parent)
572 			return true;
573 	}
574 
575 	return false;
576 }
577 
578 static void
579 clk_core_forward_rate_req(struct clk_core *core,
580 			  const struct clk_rate_request *old_req,
581 			  struct clk_core *parent,
582 			  struct clk_rate_request *req,
583 			  unsigned long parent_rate)
584 {
585 	if (WARN_ON(!clk_core_has_parent(core, parent)))
586 		return;
587 
588 	clk_core_init_rate_req(parent, req, parent_rate);
589 
590 	if (req->min_rate < old_req->min_rate)
591 		req->min_rate = old_req->min_rate;
592 
593 	if (req->max_rate > old_req->max_rate)
594 		req->max_rate = old_req->max_rate;
595 }
596 
597 static int
598 clk_core_determine_rate_no_reparent(struct clk_hw *hw,
599 				    struct clk_rate_request *req)
600 {
601 	struct clk_core *core = hw->core;
602 	struct clk_core *parent = core->parent;
603 	unsigned long best;
604 	int ret;
605 
606 	if (core->flags & CLK_SET_RATE_PARENT) {
607 		struct clk_rate_request parent_req;
608 
609 		if (!parent) {
610 			req->rate = 0;
611 			return 0;
612 		}
613 
614 		clk_core_forward_rate_req(core, req, parent, &parent_req,
615 					  req->rate);
616 
617 		trace_clk_rate_request_start(&parent_req);
618 
619 		ret = clk_core_round_rate_nolock(parent, &parent_req);
620 		if (ret)
621 			return ret;
622 
623 		trace_clk_rate_request_done(&parent_req);
624 
625 		best = parent_req.rate;
626 	} else if (parent) {
627 		best = clk_core_get_rate_nolock(parent);
628 	} else {
629 		best = clk_core_get_rate_nolock(core);
630 	}
631 
632 	req->best_parent_rate = best;
633 	req->rate = best;
634 
635 	return 0;
636 }
637 
638 int clk_mux_determine_rate_flags(struct clk_hw *hw,
639 				 struct clk_rate_request *req,
640 				 unsigned long flags)
641 {
642 	struct clk_core *core = hw->core, *parent, *best_parent = NULL;
643 	int i, num_parents, ret;
644 	unsigned long best = 0;
645 
646 	/* if NO_REPARENT flag set, pass through to current parent */
647 	if (core->flags & CLK_SET_RATE_NO_REPARENT)
648 		return clk_core_determine_rate_no_reparent(hw, req);
649 
650 	/* find the parent that can provide the fastest rate <= rate */
651 	num_parents = core->num_parents;
652 	for (i = 0; i < num_parents; i++) {
653 		unsigned long parent_rate;
654 
655 		parent = clk_core_get_parent_by_index(core, i);
656 		if (!parent)
657 			continue;
658 
659 		if (core->flags & CLK_SET_RATE_PARENT) {
660 			struct clk_rate_request parent_req;
661 
662 			clk_core_forward_rate_req(core, req, parent, &parent_req, req->rate);
663 
664 			trace_clk_rate_request_start(&parent_req);
665 
666 			ret = clk_core_round_rate_nolock(parent, &parent_req);
667 			if (ret)
668 				continue;
669 
670 			trace_clk_rate_request_done(&parent_req);
671 
672 			parent_rate = parent_req.rate;
673 		} else {
674 			parent_rate = clk_core_get_rate_nolock(parent);
675 		}
676 
677 		if (mux_is_better_rate(req->rate, parent_rate,
678 				       best, flags)) {
679 			best_parent = parent;
680 			best = parent_rate;
681 		}
682 	}
683 
684 	if (!best_parent)
685 		return -EINVAL;
686 
687 	req->best_parent_hw = best_parent->hw;
688 	req->best_parent_rate = best;
689 	req->rate = best;
690 
691 	return 0;
692 }
693 EXPORT_SYMBOL_GPL(clk_mux_determine_rate_flags);
694 
695 struct clk *__clk_lookup(const char *name)
696 {
697 	struct clk_core *core = clk_core_lookup(name);
698 
699 	return !core ? NULL : core->hw->clk;
700 }
701 
702 static void clk_core_get_boundaries(struct clk_core *core,
703 				    unsigned long *min_rate,
704 				    unsigned long *max_rate)
705 {
706 	struct clk *clk_user;
707 
708 	lockdep_assert_held(&prepare_lock);
709 
710 	*min_rate = core->min_rate;
711 	*max_rate = core->max_rate;
712 
713 	hlist_for_each_entry(clk_user, &core->clks, clks_node)
714 		*min_rate = max(*min_rate, clk_user->min_rate);
715 
716 	hlist_for_each_entry(clk_user, &core->clks, clks_node)
717 		*max_rate = min(*max_rate, clk_user->max_rate);
718 }
719 
720 /*
721  * clk_hw_get_rate_range() - returns the clock rate range for a hw clk
722  * @hw: the hw clk we want to get the range from
723  * @min_rate: pointer to the variable that will hold the minimum
724  * @max_rate: pointer to the variable that will hold the maximum
725  *
726  * Fills the @min_rate and @max_rate variables with the minimum and
727  * maximum that clock can reach.
728  */
729 void clk_hw_get_rate_range(struct clk_hw *hw, unsigned long *min_rate,
730 			   unsigned long *max_rate)
731 {
732 	clk_core_get_boundaries(hw->core, min_rate, max_rate);
733 }
734 EXPORT_SYMBOL_GPL(clk_hw_get_rate_range);
735 
736 static bool clk_core_check_boundaries(struct clk_core *core,
737 				      unsigned long min_rate,
738 				      unsigned long max_rate)
739 {
740 	struct clk *user;
741 
742 	lockdep_assert_held(&prepare_lock);
743 
744 	if (min_rate > core->max_rate || max_rate < core->min_rate)
745 		return false;
746 
747 	hlist_for_each_entry(user, &core->clks, clks_node)
748 		if (min_rate > user->max_rate || max_rate < user->min_rate)
749 			return false;
750 
751 	return true;
752 }
753 
754 void clk_hw_set_rate_range(struct clk_hw *hw, unsigned long min_rate,
755 			   unsigned long max_rate)
756 {
757 	hw->core->min_rate = min_rate;
758 	hw->core->max_rate = max_rate;
759 }
760 EXPORT_SYMBOL_GPL(clk_hw_set_rate_range);
761 
762 /*
763  * __clk_mux_determine_rate - clk_ops::determine_rate implementation for a mux type clk
764  * @hw: mux type clk to determine rate on
765  * @req: rate request, also used to return preferred parent and frequencies
766  *
767  * Helper for finding best parent to provide a given frequency. This can be used
768  * directly as a determine_rate callback (e.g. for a mux), or from a more
769  * complex clock that may combine a mux with other operations.
770  *
771  * Returns: 0 on success, -EERROR value on error
772  */
773 int __clk_mux_determine_rate(struct clk_hw *hw,
774 			     struct clk_rate_request *req)
775 {
776 	return clk_mux_determine_rate_flags(hw, req, 0);
777 }
778 EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
779 
780 int __clk_mux_determine_rate_closest(struct clk_hw *hw,
781 				     struct clk_rate_request *req)
782 {
783 	return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
784 }
785 EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
786 
787 /*
788  * clk_hw_determine_rate_no_reparent - clk_ops::determine_rate implementation for a clk that doesn't reparent
789  * @hw: mux type clk to determine rate on
790  * @req: rate request, also used to return preferred frequency
791  *
792  * Helper for finding best parent rate to provide a given frequency.
793  * This can be used directly as a determine_rate callback (e.g. for a
794  * mux), or from a more complex clock that may combine a mux with other
795  * operations.
796  *
797  * Returns: 0 on success, -EERROR value on error
798  */
799 int clk_hw_determine_rate_no_reparent(struct clk_hw *hw,
800 				      struct clk_rate_request *req)
801 {
802 	return clk_core_determine_rate_no_reparent(hw, req);
803 }
804 EXPORT_SYMBOL_GPL(clk_hw_determine_rate_no_reparent);
805 
806 /***        clk api        ***/
807 
808 static void clk_core_rate_unprotect(struct clk_core *core)
809 {
810 	lockdep_assert_held(&prepare_lock);
811 
812 	if (!core)
813 		return;
814 
815 	if (WARN(core->protect_count == 0,
816 	    "%s already unprotected\n", core->name))
817 		return;
818 
819 	if (--core->protect_count > 0)
820 		return;
821 
822 	clk_core_rate_unprotect(core->parent);
823 }
824 
825 static int clk_core_rate_nuke_protect(struct clk_core *core)
826 {
827 	int ret;
828 
829 	lockdep_assert_held(&prepare_lock);
830 
831 	if (!core)
832 		return -EINVAL;
833 
834 	if (core->protect_count == 0)
835 		return 0;
836 
837 	ret = core->protect_count;
838 	core->protect_count = 1;
839 	clk_core_rate_unprotect(core);
840 
841 	return ret;
842 }
843 
844 /**
845  * clk_rate_exclusive_put - release exclusivity over clock rate control
846  * @clk: the clk over which the exclusivity is released
847  *
848  * clk_rate_exclusive_put() completes a critical section during which a clock
849  * consumer cannot tolerate any other consumer making any operation on the
850  * clock which could result in a rate change or rate glitch. Exclusive clocks
851  * cannot have their rate changed, either directly or indirectly due to changes
852  * further up the parent chain of clocks. As a result, clocks up parent chain
853  * also get under exclusive control of the calling consumer.
854  *
855  * If exlusivity is claimed more than once on clock, even by the same consumer,
856  * the rate effectively gets locked as exclusivity can't be preempted.
857  *
858  * Calls to clk_rate_exclusive_put() must be balanced with calls to
859  * clk_rate_exclusive_get(). Calls to this function may sleep, and do not return
860  * error status.
861  */
862 void clk_rate_exclusive_put(struct clk *clk)
863 {
864 	if (!clk)
865 		return;
866 
867 	clk_prepare_lock();
868 
869 	/*
870 	 * if there is something wrong with this consumer protect count, stop
871 	 * here before messing with the provider
872 	 */
873 	if (WARN_ON(clk->exclusive_count <= 0))
874 		goto out;
875 
876 	clk_core_rate_unprotect(clk->core);
877 	clk->exclusive_count--;
878 out:
879 	clk_prepare_unlock();
880 }
881 EXPORT_SYMBOL_GPL(clk_rate_exclusive_put);
882 
883 static void clk_core_rate_protect(struct clk_core *core)
884 {
885 	lockdep_assert_held(&prepare_lock);
886 
887 	if (!core)
888 		return;
889 
890 	if (core->protect_count == 0)
891 		clk_core_rate_protect(core->parent);
892 
893 	core->protect_count++;
894 }
895 
896 static void clk_core_rate_restore_protect(struct clk_core *core, int count)
897 {
898 	lockdep_assert_held(&prepare_lock);
899 
900 	if (!core)
901 		return;
902 
903 	if (count == 0)
904 		return;
905 
906 	clk_core_rate_protect(core);
907 	core->protect_count = count;
908 }
909 
910 /**
911  * clk_rate_exclusive_get - get exclusivity over the clk rate control
912  * @clk: the clk over which the exclusity of rate control is requested
913  *
914  * clk_rate_exclusive_get() begins a critical section during which a clock
915  * consumer cannot tolerate any other consumer making any operation on the
916  * clock which could result in a rate change or rate glitch. Exclusive clocks
917  * cannot have their rate changed, either directly or indirectly due to changes
918  * further up the parent chain of clocks. As a result, clocks up parent chain
919  * also get under exclusive control of the calling consumer.
920  *
921  * If exlusivity is claimed more than once on clock, even by the same consumer,
922  * the rate effectively gets locked as exclusivity can't be preempted.
923  *
924  * Calls to clk_rate_exclusive_get() should be balanced with calls to
925  * clk_rate_exclusive_put(). Calls to this function may sleep.
926  * Returns 0 on success, -EERROR otherwise
927  */
928 int clk_rate_exclusive_get(struct clk *clk)
929 {
930 	if (!clk)
931 		return 0;
932 
933 	clk_prepare_lock();
934 	clk_core_rate_protect(clk->core);
935 	clk->exclusive_count++;
936 	clk_prepare_unlock();
937 
938 	return 0;
939 }
940 EXPORT_SYMBOL_GPL(clk_rate_exclusive_get);
941 
942 static void clk_core_unprepare(struct clk_core *core)
943 {
944 	lockdep_assert_held(&prepare_lock);
945 
946 	if (!core)
947 		return;
948 
949 	if (WARN(core->prepare_count == 0,
950 	    "%s already unprepared\n", core->name))
951 		return;
952 
953 	if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL,
954 	    "Unpreparing critical %s\n", core->name))
955 		return;
956 
957 	if (core->flags & CLK_SET_RATE_GATE)
958 		clk_core_rate_unprotect(core);
959 
960 	if (--core->prepare_count > 0)
961 		return;
962 
963 	WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name);
964 
965 	trace_clk_unprepare(core);
966 
967 	if (core->ops->unprepare)
968 		core->ops->unprepare(core->hw);
969 
970 	trace_clk_unprepare_complete(core);
971 	clk_core_unprepare(core->parent);
972 	clk_pm_runtime_put(core);
973 }
974 
975 static void clk_core_unprepare_lock(struct clk_core *core)
976 {
977 	clk_prepare_lock();
978 	clk_core_unprepare(core);
979 	clk_prepare_unlock();
980 }
981 
982 /**
983  * clk_unprepare - undo preparation of a clock source
984  * @clk: the clk being unprepared
985  *
986  * clk_unprepare may sleep, which differentiates it from clk_disable.  In a
987  * simple case, clk_unprepare can be used instead of clk_disable to gate a clk
988  * if the operation may sleep.  One example is a clk which is accessed over
989  * I2c.  In the complex case a clk gate operation may require a fast and a slow
990  * part.  It is this reason that clk_unprepare and clk_disable are not mutually
991  * exclusive.  In fact clk_disable must be called before clk_unprepare.
992  */
993 void clk_unprepare(struct clk *clk)
994 {
995 	if (IS_ERR_OR_NULL(clk))
996 		return;
997 
998 	clk_core_unprepare_lock(clk->core);
999 }
1000 EXPORT_SYMBOL_GPL(clk_unprepare);
1001 
1002 static int clk_core_prepare(struct clk_core *core)
1003 {
1004 	int ret = 0;
1005 
1006 	lockdep_assert_held(&prepare_lock);
1007 
1008 	if (!core)
1009 		return 0;
1010 
1011 	if (core->prepare_count == 0) {
1012 		ret = clk_pm_runtime_get(core);
1013 		if (ret)
1014 			return ret;
1015 
1016 		ret = clk_core_prepare(core->parent);
1017 		if (ret)
1018 			goto runtime_put;
1019 
1020 		trace_clk_prepare(core);
1021 
1022 		if (core->ops->prepare)
1023 			ret = core->ops->prepare(core->hw);
1024 
1025 		trace_clk_prepare_complete(core);
1026 
1027 		if (ret)
1028 			goto unprepare;
1029 	}
1030 
1031 	core->prepare_count++;
1032 
1033 	/*
1034 	 * CLK_SET_RATE_GATE is a special case of clock protection
1035 	 * Instead of a consumer claiming exclusive rate control, it is
1036 	 * actually the provider which prevents any consumer from making any
1037 	 * operation which could result in a rate change or rate glitch while
1038 	 * the clock is prepared.
1039 	 */
1040 	if (core->flags & CLK_SET_RATE_GATE)
1041 		clk_core_rate_protect(core);
1042 
1043 	return 0;
1044 unprepare:
1045 	clk_core_unprepare(core->parent);
1046 runtime_put:
1047 	clk_pm_runtime_put(core);
1048 	return ret;
1049 }
1050 
1051 static int clk_core_prepare_lock(struct clk_core *core)
1052 {
1053 	int ret;
1054 
1055 	clk_prepare_lock();
1056 	ret = clk_core_prepare(core);
1057 	clk_prepare_unlock();
1058 
1059 	return ret;
1060 }
1061 
1062 /**
1063  * clk_prepare - prepare a clock source
1064  * @clk: the clk being prepared
1065  *
1066  * clk_prepare may sleep, which differentiates it from clk_enable.  In a simple
1067  * case, clk_prepare can be used instead of clk_enable to ungate a clk if the
1068  * operation may sleep.  One example is a clk which is accessed over I2c.  In
1069  * the complex case a clk ungate operation may require a fast and a slow part.
1070  * It is this reason that clk_prepare and clk_enable are not mutually
1071  * exclusive.  In fact clk_prepare must be called before clk_enable.
1072  * Returns 0 on success, -EERROR otherwise.
1073  */
1074 int clk_prepare(struct clk *clk)
1075 {
1076 	if (!clk)
1077 		return 0;
1078 
1079 	return clk_core_prepare_lock(clk->core);
1080 }
1081 EXPORT_SYMBOL_GPL(clk_prepare);
1082 
1083 static void clk_core_disable(struct clk_core *core)
1084 {
1085 	lockdep_assert_held(&enable_lock);
1086 
1087 	if (!core)
1088 		return;
1089 
1090 	if (WARN(core->enable_count == 0, "%s already disabled\n", core->name))
1091 		return;
1092 
1093 	if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL,
1094 	    "Disabling critical %s\n", core->name))
1095 		return;
1096 
1097 	if (--core->enable_count > 0)
1098 		return;
1099 
1100 	trace_clk_disable(core);
1101 
1102 	if (core->ops->disable)
1103 		core->ops->disable(core->hw);
1104 
1105 	trace_clk_disable_complete(core);
1106 
1107 	clk_core_disable(core->parent);
1108 }
1109 
1110 static void clk_core_disable_lock(struct clk_core *core)
1111 {
1112 	unsigned long flags;
1113 
1114 	flags = clk_enable_lock();
1115 	clk_core_disable(core);
1116 	clk_enable_unlock(flags);
1117 }
1118 
1119 /**
1120  * clk_disable - gate a clock
1121  * @clk: the clk being gated
1122  *
1123  * clk_disable must not sleep, which differentiates it from clk_unprepare.  In
1124  * a simple case, clk_disable can be used instead of clk_unprepare to gate a
1125  * clk if the operation is fast and will never sleep.  One example is a
1126  * SoC-internal clk which is controlled via simple register writes.  In the
1127  * complex case a clk gate operation may require a fast and a slow part.  It is
1128  * this reason that clk_unprepare and clk_disable are not mutually exclusive.
1129  * In fact clk_disable must be called before clk_unprepare.
1130  */
1131 void clk_disable(struct clk *clk)
1132 {
1133 	if (IS_ERR_OR_NULL(clk))
1134 		return;
1135 
1136 	clk_core_disable_lock(clk->core);
1137 }
1138 EXPORT_SYMBOL_GPL(clk_disable);
1139 
1140 static int clk_core_enable(struct clk_core *core)
1141 {
1142 	int ret = 0;
1143 
1144 	lockdep_assert_held(&enable_lock);
1145 
1146 	if (!core)
1147 		return 0;
1148 
1149 	if (WARN(core->prepare_count == 0,
1150 	    "Enabling unprepared %s\n", core->name))
1151 		return -ESHUTDOWN;
1152 
1153 	if (core->enable_count == 0) {
1154 		ret = clk_core_enable(core->parent);
1155 
1156 		if (ret)
1157 			return ret;
1158 
1159 		trace_clk_enable(core);
1160 
1161 		if (core->ops->enable)
1162 			ret = core->ops->enable(core->hw);
1163 
1164 		trace_clk_enable_complete(core);
1165 
1166 		if (ret) {
1167 			clk_core_disable(core->parent);
1168 			return ret;
1169 		}
1170 	}
1171 
1172 	core->enable_count++;
1173 	return 0;
1174 }
1175 
1176 static int clk_core_enable_lock(struct clk_core *core)
1177 {
1178 	unsigned long flags;
1179 	int ret;
1180 
1181 	flags = clk_enable_lock();
1182 	ret = clk_core_enable(core);
1183 	clk_enable_unlock(flags);
1184 
1185 	return ret;
1186 }
1187 
1188 /**
1189  * clk_gate_restore_context - restore context for poweroff
1190  * @hw: the clk_hw pointer of clock whose state is to be restored
1191  *
1192  * The clock gate restore context function enables or disables
1193  * the gate clocks based on the enable_count. This is done in cases
1194  * where the clock context is lost and based on the enable_count
1195  * the clock either needs to be enabled/disabled. This
1196  * helps restore the state of gate clocks.
1197  */
1198 void clk_gate_restore_context(struct clk_hw *hw)
1199 {
1200 	struct clk_core *core = hw->core;
1201 
1202 	if (core->enable_count)
1203 		core->ops->enable(hw);
1204 	else
1205 		core->ops->disable(hw);
1206 }
1207 EXPORT_SYMBOL_GPL(clk_gate_restore_context);
1208 
1209 static int clk_core_save_context(struct clk_core *core)
1210 {
1211 	struct clk_core *child;
1212 	int ret = 0;
1213 
1214 	hlist_for_each_entry(child, &core->children, child_node) {
1215 		ret = clk_core_save_context(child);
1216 		if (ret < 0)
1217 			return ret;
1218 	}
1219 
1220 	if (core->ops && core->ops->save_context)
1221 		ret = core->ops->save_context(core->hw);
1222 
1223 	return ret;
1224 }
1225 
1226 static void clk_core_restore_context(struct clk_core *core)
1227 {
1228 	struct clk_core *child;
1229 
1230 	if (core->ops && core->ops->restore_context)
1231 		core->ops->restore_context(core->hw);
1232 
1233 	hlist_for_each_entry(child, &core->children, child_node)
1234 		clk_core_restore_context(child);
1235 }
1236 
1237 /**
1238  * clk_save_context - save clock context for poweroff
1239  *
1240  * Saves the context of the clock register for powerstates in which the
1241  * contents of the registers will be lost. Occurs deep within the suspend
1242  * code.  Returns 0 on success.
1243  */
1244 int clk_save_context(void)
1245 {
1246 	struct clk_core *clk;
1247 	int ret;
1248 
1249 	hlist_for_each_entry(clk, &clk_root_list, child_node) {
1250 		ret = clk_core_save_context(clk);
1251 		if (ret < 0)
1252 			return ret;
1253 	}
1254 
1255 	hlist_for_each_entry(clk, &clk_orphan_list, child_node) {
1256 		ret = clk_core_save_context(clk);
1257 		if (ret < 0)
1258 			return ret;
1259 	}
1260 
1261 	return 0;
1262 }
1263 EXPORT_SYMBOL_GPL(clk_save_context);
1264 
1265 /**
1266  * clk_restore_context - restore clock context after poweroff
1267  *
1268  * Restore the saved clock context upon resume.
1269  *
1270  */
1271 void clk_restore_context(void)
1272 {
1273 	struct clk_core *core;
1274 
1275 	hlist_for_each_entry(core, &clk_root_list, child_node)
1276 		clk_core_restore_context(core);
1277 
1278 	hlist_for_each_entry(core, &clk_orphan_list, child_node)
1279 		clk_core_restore_context(core);
1280 }
1281 EXPORT_SYMBOL_GPL(clk_restore_context);
1282 
1283 /**
1284  * clk_enable - ungate a clock
1285  * @clk: the clk being ungated
1286  *
1287  * clk_enable must not sleep, which differentiates it from clk_prepare.  In a
1288  * simple case, clk_enable can be used instead of clk_prepare to ungate a clk
1289  * if the operation will never sleep.  One example is a SoC-internal clk which
1290  * is controlled via simple register writes.  In the complex case a clk ungate
1291  * operation may require a fast and a slow part.  It is this reason that
1292  * clk_enable and clk_prepare are not mutually exclusive.  In fact clk_prepare
1293  * must be called before clk_enable.  Returns 0 on success, -EERROR
1294  * otherwise.
1295  */
1296 int clk_enable(struct clk *clk)
1297 {
1298 	if (!clk)
1299 		return 0;
1300 
1301 	return clk_core_enable_lock(clk->core);
1302 }
1303 EXPORT_SYMBOL_GPL(clk_enable);
1304 
1305 /**
1306  * clk_is_enabled_when_prepared - indicate if preparing a clock also enables it.
1307  * @clk: clock source
1308  *
1309  * Returns true if clk_prepare() implicitly enables the clock, effectively
1310  * making clk_enable()/clk_disable() no-ops, false otherwise.
1311  *
1312  * This is of interest mainly to power management code where actually
1313  * disabling the clock also requires unpreparing it to have any material
1314  * effect.
1315  *
1316  * Regardless of the value returned here, the caller must always invoke
1317  * clk_enable() or clk_prepare_enable()  and counterparts for usage counts
1318  * to be right.
1319  */
1320 bool clk_is_enabled_when_prepared(struct clk *clk)
1321 {
1322 	return clk && !(clk->core->ops->enable && clk->core->ops->disable);
1323 }
1324 EXPORT_SYMBOL_GPL(clk_is_enabled_when_prepared);
1325 
1326 static int clk_core_prepare_enable(struct clk_core *core)
1327 {
1328 	int ret;
1329 
1330 	ret = clk_core_prepare_lock(core);
1331 	if (ret)
1332 		return ret;
1333 
1334 	ret = clk_core_enable_lock(core);
1335 	if (ret)
1336 		clk_core_unprepare_lock(core);
1337 
1338 	return ret;
1339 }
1340 
1341 static void clk_core_disable_unprepare(struct clk_core *core)
1342 {
1343 	clk_core_disable_lock(core);
1344 	clk_core_unprepare_lock(core);
1345 }
1346 
1347 static void __init clk_unprepare_unused_subtree(struct clk_core *core)
1348 {
1349 	struct clk_core *child;
1350 
1351 	lockdep_assert_held(&prepare_lock);
1352 
1353 	hlist_for_each_entry(child, &core->children, child_node)
1354 		clk_unprepare_unused_subtree(child);
1355 
1356 	if (core->prepare_count)
1357 		return;
1358 
1359 	if (core->flags & CLK_IGNORE_UNUSED)
1360 		return;
1361 
1362 	if (clk_pm_runtime_get(core))
1363 		return;
1364 
1365 	if (clk_core_is_prepared(core)) {
1366 		trace_clk_unprepare(core);
1367 		if (core->ops->unprepare_unused)
1368 			core->ops->unprepare_unused(core->hw);
1369 		else if (core->ops->unprepare)
1370 			core->ops->unprepare(core->hw);
1371 		trace_clk_unprepare_complete(core);
1372 	}
1373 
1374 	clk_pm_runtime_put(core);
1375 }
1376 
1377 static void __init clk_disable_unused_subtree(struct clk_core *core)
1378 {
1379 	struct clk_core *child;
1380 	unsigned long flags;
1381 
1382 	lockdep_assert_held(&prepare_lock);
1383 
1384 	hlist_for_each_entry(child, &core->children, child_node)
1385 		clk_disable_unused_subtree(child);
1386 
1387 	if (core->flags & CLK_OPS_PARENT_ENABLE)
1388 		clk_core_prepare_enable(core->parent);
1389 
1390 	if (clk_pm_runtime_get(core))
1391 		goto unprepare_out;
1392 
1393 	flags = clk_enable_lock();
1394 
1395 	if (core->enable_count)
1396 		goto unlock_out;
1397 
1398 	if (core->flags & CLK_IGNORE_UNUSED)
1399 		goto unlock_out;
1400 
1401 	/*
1402 	 * some gate clocks have special needs during the disable-unused
1403 	 * sequence.  call .disable_unused if available, otherwise fall
1404 	 * back to .disable
1405 	 */
1406 	if (clk_core_is_enabled(core)) {
1407 		trace_clk_disable(core);
1408 		if (core->ops->disable_unused)
1409 			core->ops->disable_unused(core->hw);
1410 		else if (core->ops->disable)
1411 			core->ops->disable(core->hw);
1412 		trace_clk_disable_complete(core);
1413 	}
1414 
1415 unlock_out:
1416 	clk_enable_unlock(flags);
1417 	clk_pm_runtime_put(core);
1418 unprepare_out:
1419 	if (core->flags & CLK_OPS_PARENT_ENABLE)
1420 		clk_core_disable_unprepare(core->parent);
1421 }
1422 
1423 static bool clk_ignore_unused __initdata;
1424 static int __init clk_ignore_unused_setup(char *__unused)
1425 {
1426 	clk_ignore_unused = true;
1427 	return 1;
1428 }
1429 __setup("clk_ignore_unused", clk_ignore_unused_setup);
1430 
1431 static int __init clk_disable_unused(void)
1432 {
1433 	struct clk_core *core;
1434 
1435 	if (clk_ignore_unused) {
1436 		pr_warn("clk: Not disabling unused clocks\n");
1437 		return 0;
1438 	}
1439 
1440 	pr_info("clk: Disabling unused clocks\n");
1441 
1442 	clk_prepare_lock();
1443 
1444 	hlist_for_each_entry(core, &clk_root_list, child_node)
1445 		clk_disable_unused_subtree(core);
1446 
1447 	hlist_for_each_entry(core, &clk_orphan_list, child_node)
1448 		clk_disable_unused_subtree(core);
1449 
1450 	hlist_for_each_entry(core, &clk_root_list, child_node)
1451 		clk_unprepare_unused_subtree(core);
1452 
1453 	hlist_for_each_entry(core, &clk_orphan_list, child_node)
1454 		clk_unprepare_unused_subtree(core);
1455 
1456 	clk_prepare_unlock();
1457 
1458 	return 0;
1459 }
1460 late_initcall_sync(clk_disable_unused);
1461 
1462 static int clk_core_determine_round_nolock(struct clk_core *core,
1463 					   struct clk_rate_request *req)
1464 {
1465 	long rate;
1466 
1467 	lockdep_assert_held(&prepare_lock);
1468 
1469 	if (!core)
1470 		return 0;
1471 
1472 	/*
1473 	 * Some clock providers hand-craft their clk_rate_requests and
1474 	 * might not fill min_rate and max_rate.
1475 	 *
1476 	 * If it's the case, clamping the rate is equivalent to setting
1477 	 * the rate to 0 which is bad. Skip the clamping but complain so
1478 	 * that it gets fixed, hopefully.
1479 	 */
1480 	if (!req->min_rate && !req->max_rate)
1481 		pr_warn("%s: %s: clk_rate_request has initialized min or max rate.\n",
1482 			__func__, core->name);
1483 	else
1484 		req->rate = clamp(req->rate, req->min_rate, req->max_rate);
1485 
1486 	/*
1487 	 * At this point, core protection will be disabled
1488 	 * - if the provider is not protected at all
1489 	 * - if the calling consumer is the only one which has exclusivity
1490 	 *   over the provider
1491 	 */
1492 	if (clk_core_rate_is_protected(core)) {
1493 		req->rate = core->rate;
1494 	} else if (core->ops->determine_rate) {
1495 		return core->ops->determine_rate(core->hw, req);
1496 	} else if (core->ops->round_rate) {
1497 		rate = core->ops->round_rate(core->hw, req->rate,
1498 					     &req->best_parent_rate);
1499 		if (rate < 0)
1500 			return rate;
1501 
1502 		req->rate = rate;
1503 	} else {
1504 		return -EINVAL;
1505 	}
1506 
1507 	return 0;
1508 }
1509 
1510 static void clk_core_init_rate_req(struct clk_core * const core,
1511 				   struct clk_rate_request *req,
1512 				   unsigned long rate)
1513 {
1514 	struct clk_core *parent;
1515 
1516 	if (WARN_ON(!req))
1517 		return;
1518 
1519 	memset(req, 0, sizeof(*req));
1520 	req->max_rate = ULONG_MAX;
1521 
1522 	if (!core)
1523 		return;
1524 
1525 	req->core = core;
1526 	req->rate = rate;
1527 	clk_core_get_boundaries(core, &req->min_rate, &req->max_rate);
1528 
1529 	parent = core->parent;
1530 	if (parent) {
1531 		req->best_parent_hw = parent->hw;
1532 		req->best_parent_rate = parent->rate;
1533 	} else {
1534 		req->best_parent_hw = NULL;
1535 		req->best_parent_rate = 0;
1536 	}
1537 }
1538 
1539 /**
1540  * clk_hw_init_rate_request - Initializes a clk_rate_request
1541  * @hw: the clk for which we want to submit a rate request
1542  * @req: the clk_rate_request structure we want to initialise
1543  * @rate: the rate which is to be requested
1544  *
1545  * Initializes a clk_rate_request structure to submit to
1546  * __clk_determine_rate() or similar functions.
1547  */
1548 void clk_hw_init_rate_request(const struct clk_hw *hw,
1549 			      struct clk_rate_request *req,
1550 			      unsigned long rate)
1551 {
1552 	if (WARN_ON(!hw || !req))
1553 		return;
1554 
1555 	clk_core_init_rate_req(hw->core, req, rate);
1556 }
1557 EXPORT_SYMBOL_GPL(clk_hw_init_rate_request);
1558 
1559 /**
1560  * clk_hw_forward_rate_request - Forwards a clk_rate_request to a clock's parent
1561  * @hw: the original clock that got the rate request
1562  * @old_req: the original clk_rate_request structure we want to forward
1563  * @parent: the clk we want to forward @old_req to
1564  * @req: the clk_rate_request structure we want to initialise
1565  * @parent_rate: The rate which is to be requested to @parent
1566  *
1567  * Initializes a clk_rate_request structure to submit to a clock parent
1568  * in __clk_determine_rate() or similar functions.
1569  */
1570 void clk_hw_forward_rate_request(const struct clk_hw *hw,
1571 				 const struct clk_rate_request *old_req,
1572 				 const struct clk_hw *parent,
1573 				 struct clk_rate_request *req,
1574 				 unsigned long parent_rate)
1575 {
1576 	if (WARN_ON(!hw || !old_req || !parent || !req))
1577 		return;
1578 
1579 	clk_core_forward_rate_req(hw->core, old_req,
1580 				  parent->core, req,
1581 				  parent_rate);
1582 }
1583 EXPORT_SYMBOL_GPL(clk_hw_forward_rate_request);
1584 
1585 static bool clk_core_can_round(struct clk_core * const core)
1586 {
1587 	return core->ops->determine_rate || core->ops->round_rate;
1588 }
1589 
1590 static int clk_core_round_rate_nolock(struct clk_core *core,
1591 				      struct clk_rate_request *req)
1592 {
1593 	int ret;
1594 
1595 	lockdep_assert_held(&prepare_lock);
1596 
1597 	if (!core) {
1598 		req->rate = 0;
1599 		return 0;
1600 	}
1601 
1602 	if (clk_core_can_round(core))
1603 		return clk_core_determine_round_nolock(core, req);
1604 
1605 	if (core->flags & CLK_SET_RATE_PARENT) {
1606 		struct clk_rate_request parent_req;
1607 
1608 		clk_core_forward_rate_req(core, req, core->parent, &parent_req, req->rate);
1609 
1610 		trace_clk_rate_request_start(&parent_req);
1611 
1612 		ret = clk_core_round_rate_nolock(core->parent, &parent_req);
1613 		if (ret)
1614 			return ret;
1615 
1616 		trace_clk_rate_request_done(&parent_req);
1617 
1618 		req->best_parent_rate = parent_req.rate;
1619 		req->rate = parent_req.rate;
1620 
1621 		return 0;
1622 	}
1623 
1624 	req->rate = core->rate;
1625 	return 0;
1626 }
1627 
1628 /**
1629  * __clk_determine_rate - get the closest rate actually supported by a clock
1630  * @hw: determine the rate of this clock
1631  * @req: target rate request
1632  *
1633  * Useful for clk_ops such as .set_rate and .determine_rate.
1634  */
1635 int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
1636 {
1637 	if (!hw) {
1638 		req->rate = 0;
1639 		return 0;
1640 	}
1641 
1642 	return clk_core_round_rate_nolock(hw->core, req);
1643 }
1644 EXPORT_SYMBOL_GPL(__clk_determine_rate);
1645 
1646 /**
1647  * clk_hw_round_rate() - round the given rate for a hw clk
1648  * @hw: the hw clk for which we are rounding a rate
1649  * @rate: the rate which is to be rounded
1650  *
1651  * Takes in a rate as input and rounds it to a rate that the clk can actually
1652  * use.
1653  *
1654  * Context: prepare_lock must be held.
1655  *          For clk providers to call from within clk_ops such as .round_rate,
1656  *          .determine_rate.
1657  *
1658  * Return: returns rounded rate of hw clk if clk supports round_rate operation
1659  *         else returns the parent rate.
1660  */
1661 unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
1662 {
1663 	int ret;
1664 	struct clk_rate_request req;
1665 
1666 	clk_core_init_rate_req(hw->core, &req, rate);
1667 
1668 	trace_clk_rate_request_start(&req);
1669 
1670 	ret = clk_core_round_rate_nolock(hw->core, &req);
1671 	if (ret)
1672 		return 0;
1673 
1674 	trace_clk_rate_request_done(&req);
1675 
1676 	return req.rate;
1677 }
1678 EXPORT_SYMBOL_GPL(clk_hw_round_rate);
1679 
1680 /**
1681  * clk_round_rate - round the given rate for a clk
1682  * @clk: the clk for which we are rounding a rate
1683  * @rate: the rate which is to be rounded
1684  *
1685  * Takes in a rate as input and rounds it to a rate that the clk can actually
1686  * use which is then returned.  If clk doesn't support round_rate operation
1687  * then the parent rate is returned.
1688  */
1689 long clk_round_rate(struct clk *clk, unsigned long rate)
1690 {
1691 	struct clk_rate_request req;
1692 	int ret;
1693 
1694 	if (!clk)
1695 		return 0;
1696 
1697 	clk_prepare_lock();
1698 
1699 	if (clk->exclusive_count)
1700 		clk_core_rate_unprotect(clk->core);
1701 
1702 	clk_core_init_rate_req(clk->core, &req, rate);
1703 
1704 	trace_clk_rate_request_start(&req);
1705 
1706 	ret = clk_core_round_rate_nolock(clk->core, &req);
1707 
1708 	trace_clk_rate_request_done(&req);
1709 
1710 	if (clk->exclusive_count)
1711 		clk_core_rate_protect(clk->core);
1712 
1713 	clk_prepare_unlock();
1714 
1715 	if (ret)
1716 		return ret;
1717 
1718 	return req.rate;
1719 }
1720 EXPORT_SYMBOL_GPL(clk_round_rate);
1721 
1722 /**
1723  * __clk_notify - call clk notifier chain
1724  * @core: clk that is changing rate
1725  * @msg: clk notifier type (see include/linux/clk.h)
1726  * @old_rate: old clk rate
1727  * @new_rate: new clk rate
1728  *
1729  * Triggers a notifier call chain on the clk rate-change notification
1730  * for 'clk'.  Passes a pointer to the struct clk and the previous
1731  * and current rates to the notifier callback.  Intended to be called by
1732  * internal clock code only.  Returns NOTIFY_DONE from the last driver
1733  * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
1734  * a driver returns that.
1735  */
1736 static int __clk_notify(struct clk_core *core, unsigned long msg,
1737 		unsigned long old_rate, unsigned long new_rate)
1738 {
1739 	struct clk_notifier *cn;
1740 	struct clk_notifier_data cnd;
1741 	int ret = NOTIFY_DONE;
1742 
1743 	cnd.old_rate = old_rate;
1744 	cnd.new_rate = new_rate;
1745 
1746 	list_for_each_entry(cn, &clk_notifier_list, node) {
1747 		if (cn->clk->core == core) {
1748 			cnd.clk = cn->clk;
1749 			ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
1750 					&cnd);
1751 			if (ret & NOTIFY_STOP_MASK)
1752 				return ret;
1753 		}
1754 	}
1755 
1756 	return ret;
1757 }
1758 
1759 /**
1760  * __clk_recalc_accuracies
1761  * @core: first clk in the subtree
1762  *
1763  * Walks the subtree of clks starting with clk and recalculates accuracies as
1764  * it goes.  Note that if a clk does not implement the .recalc_accuracy
1765  * callback then it is assumed that the clock will take on the accuracy of its
1766  * parent.
1767  */
1768 static void __clk_recalc_accuracies(struct clk_core *core)
1769 {
1770 	unsigned long parent_accuracy = 0;
1771 	struct clk_core *child;
1772 
1773 	lockdep_assert_held(&prepare_lock);
1774 
1775 	if (core->parent)
1776 		parent_accuracy = core->parent->accuracy;
1777 
1778 	if (core->ops->recalc_accuracy)
1779 		core->accuracy = core->ops->recalc_accuracy(core->hw,
1780 							  parent_accuracy);
1781 	else
1782 		core->accuracy = parent_accuracy;
1783 
1784 	hlist_for_each_entry(child, &core->children, child_node)
1785 		__clk_recalc_accuracies(child);
1786 }
1787 
1788 static long clk_core_get_accuracy_recalc(struct clk_core *core)
1789 {
1790 	if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
1791 		__clk_recalc_accuracies(core);
1792 
1793 	return clk_core_get_accuracy_no_lock(core);
1794 }
1795 
1796 /**
1797  * clk_get_accuracy - return the accuracy of clk
1798  * @clk: the clk whose accuracy is being returned
1799  *
1800  * Simply returns the cached accuracy of the clk, unless
1801  * CLK_GET_ACCURACY_NOCACHE flag is set, which means a recalc_rate will be
1802  * issued.
1803  * If clk is NULL then returns 0.
1804  */
1805 long clk_get_accuracy(struct clk *clk)
1806 {
1807 	long accuracy;
1808 
1809 	if (!clk)
1810 		return 0;
1811 
1812 	clk_prepare_lock();
1813 	accuracy = clk_core_get_accuracy_recalc(clk->core);
1814 	clk_prepare_unlock();
1815 
1816 	return accuracy;
1817 }
1818 EXPORT_SYMBOL_GPL(clk_get_accuracy);
1819 
1820 static unsigned long clk_recalc(struct clk_core *core,
1821 				unsigned long parent_rate)
1822 {
1823 	unsigned long rate = parent_rate;
1824 
1825 	if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
1826 		rate = core->ops->recalc_rate(core->hw, parent_rate);
1827 		clk_pm_runtime_put(core);
1828 	}
1829 	return rate;
1830 }
1831 
1832 /**
1833  * __clk_recalc_rates
1834  * @core: first clk in the subtree
1835  * @update_req: Whether req_rate should be updated with the new rate
1836  * @msg: notification type (see include/linux/clk.h)
1837  *
1838  * Walks the subtree of clks starting with clk and recalculates rates as it
1839  * goes.  Note that if a clk does not implement the .recalc_rate callback then
1840  * it is assumed that the clock will take on the rate of its parent.
1841  *
1842  * clk_recalc_rates also propagates the POST_RATE_CHANGE notification,
1843  * if necessary.
1844  */
1845 static void __clk_recalc_rates(struct clk_core *core, bool update_req,
1846 			       unsigned long msg)
1847 {
1848 	unsigned long old_rate;
1849 	unsigned long parent_rate = 0;
1850 	struct clk_core *child;
1851 
1852 	lockdep_assert_held(&prepare_lock);
1853 
1854 	old_rate = core->rate;
1855 
1856 	if (core->parent)
1857 		parent_rate = core->parent->rate;
1858 
1859 	core->rate = clk_recalc(core, parent_rate);
1860 	if (update_req)
1861 		core->req_rate = core->rate;
1862 
1863 	/*
1864 	 * ignore NOTIFY_STOP and NOTIFY_BAD return values for POST_RATE_CHANGE
1865 	 * & ABORT_RATE_CHANGE notifiers
1866 	 */
1867 	if (core->notifier_count && msg)
1868 		__clk_notify(core, msg, old_rate, core->rate);
1869 
1870 	hlist_for_each_entry(child, &core->children, child_node)
1871 		__clk_recalc_rates(child, update_req, msg);
1872 }
1873 
1874 static unsigned long clk_core_get_rate_recalc(struct clk_core *core)
1875 {
1876 	if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1877 		__clk_recalc_rates(core, false, 0);
1878 
1879 	return clk_core_get_rate_nolock(core);
1880 }
1881 
1882 /**
1883  * clk_get_rate - return the rate of clk
1884  * @clk: the clk whose rate is being returned
1885  *
1886  * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1887  * is set, which means a recalc_rate will be issued. Can be called regardless of
1888  * the clock enabledness. If clk is NULL, or if an error occurred, then returns
1889  * 0.
1890  */
1891 unsigned long clk_get_rate(struct clk *clk)
1892 {
1893 	unsigned long rate;
1894 
1895 	if (!clk)
1896 		return 0;
1897 
1898 	clk_prepare_lock();
1899 	rate = clk_core_get_rate_recalc(clk->core);
1900 	clk_prepare_unlock();
1901 
1902 	return rate;
1903 }
1904 EXPORT_SYMBOL_GPL(clk_get_rate);
1905 
1906 static int clk_fetch_parent_index(struct clk_core *core,
1907 				  struct clk_core *parent)
1908 {
1909 	int i;
1910 
1911 	if (!parent)
1912 		return -EINVAL;
1913 
1914 	for (i = 0; i < core->num_parents; i++) {
1915 		/* Found it first try! */
1916 		if (core->parents[i].core == parent)
1917 			return i;
1918 
1919 		/* Something else is here, so keep looking */
1920 		if (core->parents[i].core)
1921 			continue;
1922 
1923 		/* Maybe core hasn't been cached but the hw is all we know? */
1924 		if (core->parents[i].hw) {
1925 			if (core->parents[i].hw == parent->hw)
1926 				break;
1927 
1928 			/* Didn't match, but we're expecting a clk_hw */
1929 			continue;
1930 		}
1931 
1932 		/* Maybe it hasn't been cached (clk_set_parent() path) */
1933 		if (parent == clk_core_get(core, i))
1934 			break;
1935 
1936 		/* Fallback to comparing globally unique names */
1937 		if (core->parents[i].name &&
1938 		    !strcmp(parent->name, core->parents[i].name))
1939 			break;
1940 	}
1941 
1942 	if (i == core->num_parents)
1943 		return -EINVAL;
1944 
1945 	core->parents[i].core = parent;
1946 	return i;
1947 }
1948 
1949 /**
1950  * clk_hw_get_parent_index - return the index of the parent clock
1951  * @hw: clk_hw associated with the clk being consumed
1952  *
1953  * Fetches and returns the index of parent clock. Returns -EINVAL if the given
1954  * clock does not have a current parent.
1955  */
1956 int clk_hw_get_parent_index(struct clk_hw *hw)
1957 {
1958 	struct clk_hw *parent = clk_hw_get_parent(hw);
1959 
1960 	if (WARN_ON(parent == NULL))
1961 		return -EINVAL;
1962 
1963 	return clk_fetch_parent_index(hw->core, parent->core);
1964 }
1965 EXPORT_SYMBOL_GPL(clk_hw_get_parent_index);
1966 
1967 /*
1968  * Update the orphan status of @core and all its children.
1969  */
1970 static void clk_core_update_orphan_status(struct clk_core *core, bool is_orphan)
1971 {
1972 	struct clk_core *child;
1973 
1974 	core->orphan = is_orphan;
1975 
1976 	hlist_for_each_entry(child, &core->children, child_node)
1977 		clk_core_update_orphan_status(child, is_orphan);
1978 }
1979 
1980 static void clk_reparent(struct clk_core *core, struct clk_core *new_parent)
1981 {
1982 	bool was_orphan = core->orphan;
1983 
1984 	hlist_del(&core->child_node);
1985 
1986 	if (new_parent) {
1987 		bool becomes_orphan = new_parent->orphan;
1988 
1989 		/* avoid duplicate POST_RATE_CHANGE notifications */
1990 		if (new_parent->new_child == core)
1991 			new_parent->new_child = NULL;
1992 
1993 		hlist_add_head(&core->child_node, &new_parent->children);
1994 
1995 		if (was_orphan != becomes_orphan)
1996 			clk_core_update_orphan_status(core, becomes_orphan);
1997 	} else {
1998 		hlist_add_head(&core->child_node, &clk_orphan_list);
1999 		if (!was_orphan)
2000 			clk_core_update_orphan_status(core, true);
2001 	}
2002 
2003 	core->parent = new_parent;
2004 }
2005 
2006 static struct clk_core *__clk_set_parent_before(struct clk_core *core,
2007 					   struct clk_core *parent)
2008 {
2009 	unsigned long flags;
2010 	struct clk_core *old_parent = core->parent;
2011 
2012 	/*
2013 	 * 1. enable parents for CLK_OPS_PARENT_ENABLE clock
2014 	 *
2015 	 * 2. Migrate prepare state between parents and prevent race with
2016 	 * clk_enable().
2017 	 *
2018 	 * If the clock is not prepared, then a race with
2019 	 * clk_enable/disable() is impossible since we already have the
2020 	 * prepare lock (future calls to clk_enable() need to be preceded by
2021 	 * a clk_prepare()).
2022 	 *
2023 	 * If the clock is prepared, migrate the prepared state to the new
2024 	 * parent and also protect against a race with clk_enable() by
2025 	 * forcing the clock and the new parent on.  This ensures that all
2026 	 * future calls to clk_enable() are practically NOPs with respect to
2027 	 * hardware and software states.
2028 	 *
2029 	 * See also: Comment for clk_set_parent() below.
2030 	 */
2031 
2032 	/* enable old_parent & parent if CLK_OPS_PARENT_ENABLE is set */
2033 	if (core->flags & CLK_OPS_PARENT_ENABLE) {
2034 		clk_core_prepare_enable(old_parent);
2035 		clk_core_prepare_enable(parent);
2036 	}
2037 
2038 	/* migrate prepare count if > 0 */
2039 	if (core->prepare_count) {
2040 		clk_core_prepare_enable(parent);
2041 		clk_core_enable_lock(core);
2042 	}
2043 
2044 	/* update the clk tree topology */
2045 	flags = clk_enable_lock();
2046 	clk_reparent(core, parent);
2047 	clk_enable_unlock(flags);
2048 
2049 	return old_parent;
2050 }
2051 
2052 static void __clk_set_parent_after(struct clk_core *core,
2053 				   struct clk_core *parent,
2054 				   struct clk_core *old_parent)
2055 {
2056 	/*
2057 	 * Finish the migration of prepare state and undo the changes done
2058 	 * for preventing a race with clk_enable().
2059 	 */
2060 	if (core->prepare_count) {
2061 		clk_core_disable_lock(core);
2062 		clk_core_disable_unprepare(old_parent);
2063 	}
2064 
2065 	/* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */
2066 	if (core->flags & CLK_OPS_PARENT_ENABLE) {
2067 		clk_core_disable_unprepare(parent);
2068 		clk_core_disable_unprepare(old_parent);
2069 	}
2070 }
2071 
2072 static int __clk_set_parent(struct clk_core *core, struct clk_core *parent,
2073 			    u8 p_index)
2074 {
2075 	unsigned long flags;
2076 	int ret = 0;
2077 	struct clk_core *old_parent;
2078 
2079 	old_parent = __clk_set_parent_before(core, parent);
2080 
2081 	trace_clk_set_parent(core, parent);
2082 
2083 	/* change clock input source */
2084 	if (parent && core->ops->set_parent)
2085 		ret = core->ops->set_parent(core->hw, p_index);
2086 
2087 	trace_clk_set_parent_complete(core, parent);
2088 
2089 	if (ret) {
2090 		flags = clk_enable_lock();
2091 		clk_reparent(core, old_parent);
2092 		clk_enable_unlock(flags);
2093 
2094 		__clk_set_parent_after(core, old_parent, parent);
2095 
2096 		return ret;
2097 	}
2098 
2099 	__clk_set_parent_after(core, parent, old_parent);
2100 
2101 	return 0;
2102 }
2103 
2104 /**
2105  * __clk_speculate_rates
2106  * @core: first clk in the subtree
2107  * @parent_rate: the "future" rate of clk's parent
2108  *
2109  * Walks the subtree of clks starting with clk, speculating rates as it
2110  * goes and firing off PRE_RATE_CHANGE notifications as necessary.
2111  *
2112  * Unlike clk_recalc_rates, clk_speculate_rates exists only for sending
2113  * pre-rate change notifications and returns early if no clks in the
2114  * subtree have subscribed to the notifications.  Note that if a clk does not
2115  * implement the .recalc_rate callback then it is assumed that the clock will
2116  * take on the rate of its parent.
2117  */
2118 static int __clk_speculate_rates(struct clk_core *core,
2119 				 unsigned long parent_rate)
2120 {
2121 	struct clk_core *child;
2122 	unsigned long new_rate;
2123 	int ret = NOTIFY_DONE;
2124 
2125 	lockdep_assert_held(&prepare_lock);
2126 
2127 	new_rate = clk_recalc(core, parent_rate);
2128 
2129 	/* abort rate change if a driver returns NOTIFY_BAD or NOTIFY_STOP */
2130 	if (core->notifier_count)
2131 		ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
2132 
2133 	if (ret & NOTIFY_STOP_MASK) {
2134 		pr_debug("%s: clk notifier callback for clock %s aborted with error %d\n",
2135 				__func__, core->name, ret);
2136 		goto out;
2137 	}
2138 
2139 	hlist_for_each_entry(child, &core->children, child_node) {
2140 		ret = __clk_speculate_rates(child, new_rate);
2141 		if (ret & NOTIFY_STOP_MASK)
2142 			break;
2143 	}
2144 
2145 out:
2146 	return ret;
2147 }
2148 
2149 static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
2150 			     struct clk_core *new_parent, u8 p_index)
2151 {
2152 	struct clk_core *child;
2153 
2154 	core->new_rate = new_rate;
2155 	core->new_parent = new_parent;
2156 	core->new_parent_index = p_index;
2157 	/* include clk in new parent's PRE_RATE_CHANGE notifications */
2158 	core->new_child = NULL;
2159 	if (new_parent && new_parent != core->parent)
2160 		new_parent->new_child = core;
2161 
2162 	hlist_for_each_entry(child, &core->children, child_node) {
2163 		child->new_rate = clk_recalc(child, new_rate);
2164 		clk_calc_subtree(child, child->new_rate, NULL, 0);
2165 	}
2166 }
2167 
2168 /*
2169  * calculate the new rates returning the topmost clock that has to be
2170  * changed.
2171  */
2172 static struct clk_core *clk_calc_new_rates(struct clk_core *core,
2173 					   unsigned long rate)
2174 {
2175 	struct clk_core *top = core;
2176 	struct clk_core *old_parent, *parent;
2177 	unsigned long best_parent_rate = 0;
2178 	unsigned long new_rate;
2179 	unsigned long min_rate;
2180 	unsigned long max_rate;
2181 	int p_index = 0;
2182 	long ret;
2183 
2184 	/* sanity */
2185 	if (IS_ERR_OR_NULL(core))
2186 		return NULL;
2187 
2188 	/* save parent rate, if it exists */
2189 	parent = old_parent = core->parent;
2190 	if (parent)
2191 		best_parent_rate = parent->rate;
2192 
2193 	clk_core_get_boundaries(core, &min_rate, &max_rate);
2194 
2195 	/* find the closest rate and parent clk/rate */
2196 	if (clk_core_can_round(core)) {
2197 		struct clk_rate_request req;
2198 
2199 		clk_core_init_rate_req(core, &req, rate);
2200 
2201 		trace_clk_rate_request_start(&req);
2202 
2203 		ret = clk_core_determine_round_nolock(core, &req);
2204 		if (ret < 0)
2205 			return NULL;
2206 
2207 		trace_clk_rate_request_done(&req);
2208 
2209 		best_parent_rate = req.best_parent_rate;
2210 		new_rate = req.rate;
2211 		parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
2212 
2213 		if (new_rate < min_rate || new_rate > max_rate)
2214 			return NULL;
2215 	} else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
2216 		/* pass-through clock without adjustable parent */
2217 		core->new_rate = core->rate;
2218 		return NULL;
2219 	} else {
2220 		/* pass-through clock with adjustable parent */
2221 		top = clk_calc_new_rates(parent, rate);
2222 		new_rate = parent->new_rate;
2223 		goto out;
2224 	}
2225 
2226 	/* some clocks must be gated to change parent */
2227 	if (parent != old_parent &&
2228 	    (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
2229 		pr_debug("%s: %s not gated but wants to reparent\n",
2230 			 __func__, core->name);
2231 		return NULL;
2232 	}
2233 
2234 	/* try finding the new parent index */
2235 	if (parent && core->num_parents > 1) {
2236 		p_index = clk_fetch_parent_index(core, parent);
2237 		if (p_index < 0) {
2238 			pr_debug("%s: clk %s can not be parent of clk %s\n",
2239 				 __func__, parent->name, core->name);
2240 			return NULL;
2241 		}
2242 	}
2243 
2244 	if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
2245 	    best_parent_rate != parent->rate)
2246 		top = clk_calc_new_rates(parent, best_parent_rate);
2247 
2248 out:
2249 	clk_calc_subtree(core, new_rate, parent, p_index);
2250 
2251 	return top;
2252 }
2253 
2254 /*
2255  * Notify about rate changes in a subtree. Always walk down the whole tree
2256  * so that in case of an error we can walk down the whole tree again and
2257  * abort the change.
2258  */
2259 static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
2260 						  unsigned long event)
2261 {
2262 	struct clk_core *child, *tmp_clk, *fail_clk = NULL;
2263 	int ret = NOTIFY_DONE;
2264 
2265 	if (core->rate == core->new_rate)
2266 		return NULL;
2267 
2268 	if (core->notifier_count) {
2269 		ret = __clk_notify(core, event, core->rate, core->new_rate);
2270 		if (ret & NOTIFY_STOP_MASK)
2271 			fail_clk = core;
2272 	}
2273 
2274 	hlist_for_each_entry(child, &core->children, child_node) {
2275 		/* Skip children who will be reparented to another clock */
2276 		if (child->new_parent && child->new_parent != core)
2277 			continue;
2278 		tmp_clk = clk_propagate_rate_change(child, event);
2279 		if (tmp_clk)
2280 			fail_clk = tmp_clk;
2281 	}
2282 
2283 	/* handle the new child who might not be in core->children yet */
2284 	if (core->new_child) {
2285 		tmp_clk = clk_propagate_rate_change(core->new_child, event);
2286 		if (tmp_clk)
2287 			fail_clk = tmp_clk;
2288 	}
2289 
2290 	return fail_clk;
2291 }
2292 
2293 /*
2294  * walk down a subtree and set the new rates notifying the rate
2295  * change on the way
2296  */
2297 static void clk_change_rate(struct clk_core *core)
2298 {
2299 	struct clk_core *child;
2300 	struct hlist_node *tmp;
2301 	unsigned long old_rate;
2302 	unsigned long best_parent_rate = 0;
2303 	bool skip_set_rate = false;
2304 	struct clk_core *old_parent;
2305 	struct clk_core *parent = NULL;
2306 
2307 	old_rate = core->rate;
2308 
2309 	if (core->new_parent) {
2310 		parent = core->new_parent;
2311 		best_parent_rate = core->new_parent->rate;
2312 	} else if (core->parent) {
2313 		parent = core->parent;
2314 		best_parent_rate = core->parent->rate;
2315 	}
2316 
2317 	if (clk_pm_runtime_get(core))
2318 		return;
2319 
2320 	if (core->flags & CLK_SET_RATE_UNGATE) {
2321 		clk_core_prepare(core);
2322 		clk_core_enable_lock(core);
2323 	}
2324 
2325 	if (core->new_parent && core->new_parent != core->parent) {
2326 		old_parent = __clk_set_parent_before(core, core->new_parent);
2327 		trace_clk_set_parent(core, core->new_parent);
2328 
2329 		if (core->ops->set_rate_and_parent) {
2330 			skip_set_rate = true;
2331 			core->ops->set_rate_and_parent(core->hw, core->new_rate,
2332 					best_parent_rate,
2333 					core->new_parent_index);
2334 		} else if (core->ops->set_parent) {
2335 			core->ops->set_parent(core->hw, core->new_parent_index);
2336 		}
2337 
2338 		trace_clk_set_parent_complete(core, core->new_parent);
2339 		__clk_set_parent_after(core, core->new_parent, old_parent);
2340 	}
2341 
2342 	if (core->flags & CLK_OPS_PARENT_ENABLE)
2343 		clk_core_prepare_enable(parent);
2344 
2345 	trace_clk_set_rate(core, core->new_rate);
2346 
2347 	if (!skip_set_rate && core->ops->set_rate)
2348 		core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
2349 
2350 	trace_clk_set_rate_complete(core, core->new_rate);
2351 
2352 	core->rate = clk_recalc(core, best_parent_rate);
2353 
2354 	if (core->flags & CLK_SET_RATE_UNGATE) {
2355 		clk_core_disable_lock(core);
2356 		clk_core_unprepare(core);
2357 	}
2358 
2359 	if (core->flags & CLK_OPS_PARENT_ENABLE)
2360 		clk_core_disable_unprepare(parent);
2361 
2362 	if (core->notifier_count && old_rate != core->rate)
2363 		__clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
2364 
2365 	if (core->flags & CLK_RECALC_NEW_RATES)
2366 		(void)clk_calc_new_rates(core, core->new_rate);
2367 
2368 	/*
2369 	 * Use safe iteration, as change_rate can actually swap parents
2370 	 * for certain clock types.
2371 	 */
2372 	hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
2373 		/* Skip children who will be reparented to another clock */
2374 		if (child->new_parent && child->new_parent != core)
2375 			continue;
2376 		clk_change_rate(child);
2377 	}
2378 
2379 	/* handle the new child who might not be in core->children yet */
2380 	if (core->new_child)
2381 		clk_change_rate(core->new_child);
2382 
2383 	clk_pm_runtime_put(core);
2384 }
2385 
2386 static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core,
2387 						     unsigned long req_rate)
2388 {
2389 	int ret, cnt;
2390 	struct clk_rate_request req;
2391 
2392 	lockdep_assert_held(&prepare_lock);
2393 
2394 	if (!core)
2395 		return 0;
2396 
2397 	/* simulate what the rate would be if it could be freely set */
2398 	cnt = clk_core_rate_nuke_protect(core);
2399 	if (cnt < 0)
2400 		return cnt;
2401 
2402 	clk_core_init_rate_req(core, &req, req_rate);
2403 
2404 	trace_clk_rate_request_start(&req);
2405 
2406 	ret = clk_core_round_rate_nolock(core, &req);
2407 
2408 	trace_clk_rate_request_done(&req);
2409 
2410 	/* restore the protection */
2411 	clk_core_rate_restore_protect(core, cnt);
2412 
2413 	return ret ? 0 : req.rate;
2414 }
2415 
2416 static int clk_core_set_rate_nolock(struct clk_core *core,
2417 				    unsigned long req_rate)
2418 {
2419 	struct clk_core *top, *fail_clk;
2420 	unsigned long rate;
2421 	int ret;
2422 
2423 	if (!core)
2424 		return 0;
2425 
2426 	rate = clk_core_req_round_rate_nolock(core, req_rate);
2427 
2428 	/* bail early if nothing to do */
2429 	if (rate == clk_core_get_rate_nolock(core))
2430 		return 0;
2431 
2432 	/* fail on a direct rate set of a protected provider */
2433 	if (clk_core_rate_is_protected(core))
2434 		return -EBUSY;
2435 
2436 	/* calculate new rates and get the topmost changed clock */
2437 	top = clk_calc_new_rates(core, req_rate);
2438 	if (!top)
2439 		return -EINVAL;
2440 
2441 	ret = clk_pm_runtime_get(core);
2442 	if (ret)
2443 		return ret;
2444 
2445 	/* notify that we are about to change rates */
2446 	fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
2447 	if (fail_clk) {
2448 		pr_debug("%s: failed to set %s rate\n", __func__,
2449 				fail_clk->name);
2450 		clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
2451 		ret = -EBUSY;
2452 		goto err;
2453 	}
2454 
2455 	/* change the rates */
2456 	clk_change_rate(top);
2457 
2458 	core->req_rate = req_rate;
2459 err:
2460 	clk_pm_runtime_put(core);
2461 
2462 	return ret;
2463 }
2464 
2465 /**
2466  * clk_set_rate - specify a new rate for clk
2467  * @clk: the clk whose rate is being changed
2468  * @rate: the new rate for clk
2469  *
2470  * In the simplest case clk_set_rate will only adjust the rate of clk.
2471  *
2472  * Setting the CLK_SET_RATE_PARENT flag allows the rate change operation to
2473  * propagate up to clk's parent; whether or not this happens depends on the
2474  * outcome of clk's .round_rate implementation.  If *parent_rate is unchanged
2475  * after calling .round_rate then upstream parent propagation is ignored.  If
2476  * *parent_rate comes back with a new rate for clk's parent then we propagate
2477  * up to clk's parent and set its rate.  Upward propagation will continue
2478  * until either a clk does not support the CLK_SET_RATE_PARENT flag or
2479  * .round_rate stops requesting changes to clk's parent_rate.
2480  *
2481  * Rate changes are accomplished via tree traversal that also recalculates the
2482  * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
2483  *
2484  * Returns 0 on success, -EERROR otherwise.
2485  */
2486 int clk_set_rate(struct clk *clk, unsigned long rate)
2487 {
2488 	int ret;
2489 
2490 	if (!clk)
2491 		return 0;
2492 
2493 	/* prevent racing with updates to the clock topology */
2494 	clk_prepare_lock();
2495 
2496 	if (clk->exclusive_count)
2497 		clk_core_rate_unprotect(clk->core);
2498 
2499 	ret = clk_core_set_rate_nolock(clk->core, rate);
2500 
2501 	if (clk->exclusive_count)
2502 		clk_core_rate_protect(clk->core);
2503 
2504 	clk_prepare_unlock();
2505 
2506 	return ret;
2507 }
2508 EXPORT_SYMBOL_GPL(clk_set_rate);
2509 
2510 /**
2511  * clk_set_rate_exclusive - specify a new rate and get exclusive control
2512  * @clk: the clk whose rate is being changed
2513  * @rate: the new rate for clk
2514  *
2515  * This is a combination of clk_set_rate() and clk_rate_exclusive_get()
2516  * within a critical section
2517  *
2518  * This can be used initially to ensure that at least 1 consumer is
2519  * satisfied when several consumers are competing for exclusivity over the
2520  * same clock provider.
2521  *
2522  * The exclusivity is not applied if setting the rate failed.
2523  *
2524  * Calls to clk_rate_exclusive_get() should be balanced with calls to
2525  * clk_rate_exclusive_put().
2526  *
2527  * Returns 0 on success, -EERROR otherwise.
2528  */
2529 int clk_set_rate_exclusive(struct clk *clk, unsigned long rate)
2530 {
2531 	int ret;
2532 
2533 	if (!clk)
2534 		return 0;
2535 
2536 	/* prevent racing with updates to the clock topology */
2537 	clk_prepare_lock();
2538 
2539 	/*
2540 	 * The temporary protection removal is not here, on purpose
2541 	 * This function is meant to be used instead of clk_rate_protect,
2542 	 * so before the consumer code path protect the clock provider
2543 	 */
2544 
2545 	ret = clk_core_set_rate_nolock(clk->core, rate);
2546 	if (!ret) {
2547 		clk_core_rate_protect(clk->core);
2548 		clk->exclusive_count++;
2549 	}
2550 
2551 	clk_prepare_unlock();
2552 
2553 	return ret;
2554 }
2555 EXPORT_SYMBOL_GPL(clk_set_rate_exclusive);
2556 
2557 static int clk_set_rate_range_nolock(struct clk *clk,
2558 				     unsigned long min,
2559 				     unsigned long max)
2560 {
2561 	int ret = 0;
2562 	unsigned long old_min, old_max, rate;
2563 
2564 	lockdep_assert_held(&prepare_lock);
2565 
2566 	if (!clk)
2567 		return 0;
2568 
2569 	trace_clk_set_rate_range(clk->core, min, max);
2570 
2571 	if (min > max) {
2572 		pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
2573 		       __func__, clk->core->name, clk->dev_id, clk->con_id,
2574 		       min, max);
2575 		return -EINVAL;
2576 	}
2577 
2578 	if (clk->exclusive_count)
2579 		clk_core_rate_unprotect(clk->core);
2580 
2581 	/* Save the current values in case we need to rollback the change */
2582 	old_min = clk->min_rate;
2583 	old_max = clk->max_rate;
2584 	clk->min_rate = min;
2585 	clk->max_rate = max;
2586 
2587 	if (!clk_core_check_boundaries(clk->core, min, max)) {
2588 		ret = -EINVAL;
2589 		goto out;
2590 	}
2591 
2592 	rate = clk->core->req_rate;
2593 	if (clk->core->flags & CLK_GET_RATE_NOCACHE)
2594 		rate = clk_core_get_rate_recalc(clk->core);
2595 
2596 	/*
2597 	 * Since the boundaries have been changed, let's give the
2598 	 * opportunity to the provider to adjust the clock rate based on
2599 	 * the new boundaries.
2600 	 *
2601 	 * We also need to handle the case where the clock is currently
2602 	 * outside of the boundaries. Clamping the last requested rate
2603 	 * to the current minimum and maximum will also handle this.
2604 	 *
2605 	 * FIXME:
2606 	 * There is a catch. It may fail for the usual reason (clock
2607 	 * broken, clock protected, etc) but also because:
2608 	 * - round_rate() was not favorable and fell on the wrong
2609 	 *   side of the boundary
2610 	 * - the determine_rate() callback does not really check for
2611 	 *   this corner case when determining the rate
2612 	 */
2613 	rate = clamp(rate, min, max);
2614 	ret = clk_core_set_rate_nolock(clk->core, rate);
2615 	if (ret) {
2616 		/* rollback the changes */
2617 		clk->min_rate = old_min;
2618 		clk->max_rate = old_max;
2619 	}
2620 
2621 out:
2622 	if (clk->exclusive_count)
2623 		clk_core_rate_protect(clk->core);
2624 
2625 	return ret;
2626 }
2627 
2628 /**
2629  * clk_set_rate_range - set a rate range for a clock source
2630  * @clk: clock source
2631  * @min: desired minimum clock rate in Hz, inclusive
2632  * @max: desired maximum clock rate in Hz, inclusive
2633  *
2634  * Return: 0 for success or negative errno on failure.
2635  */
2636 int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
2637 {
2638 	int ret;
2639 
2640 	if (!clk)
2641 		return 0;
2642 
2643 	clk_prepare_lock();
2644 
2645 	ret = clk_set_rate_range_nolock(clk, min, max);
2646 
2647 	clk_prepare_unlock();
2648 
2649 	return ret;
2650 }
2651 EXPORT_SYMBOL_GPL(clk_set_rate_range);
2652 
2653 /**
2654  * clk_set_min_rate - set a minimum clock rate for a clock source
2655  * @clk: clock source
2656  * @rate: desired minimum clock rate in Hz, inclusive
2657  *
2658  * Returns success (0) or negative errno.
2659  */
2660 int clk_set_min_rate(struct clk *clk, unsigned long rate)
2661 {
2662 	if (!clk)
2663 		return 0;
2664 
2665 	trace_clk_set_min_rate(clk->core, rate);
2666 
2667 	return clk_set_rate_range(clk, rate, clk->max_rate);
2668 }
2669 EXPORT_SYMBOL_GPL(clk_set_min_rate);
2670 
2671 /**
2672  * clk_set_max_rate - set a maximum clock rate for a clock source
2673  * @clk: clock source
2674  * @rate: desired maximum clock rate in Hz, inclusive
2675  *
2676  * Returns success (0) or negative errno.
2677  */
2678 int clk_set_max_rate(struct clk *clk, unsigned long rate)
2679 {
2680 	if (!clk)
2681 		return 0;
2682 
2683 	trace_clk_set_max_rate(clk->core, rate);
2684 
2685 	return clk_set_rate_range(clk, clk->min_rate, rate);
2686 }
2687 EXPORT_SYMBOL_GPL(clk_set_max_rate);
2688 
2689 /**
2690  * clk_get_parent - return the parent of a clk
2691  * @clk: the clk whose parent gets returned
2692  *
2693  * Simply returns clk->parent.  Returns NULL if clk is NULL.
2694  */
2695 struct clk *clk_get_parent(struct clk *clk)
2696 {
2697 	struct clk *parent;
2698 
2699 	if (!clk)
2700 		return NULL;
2701 
2702 	clk_prepare_lock();
2703 	/* TODO: Create a per-user clk and change callers to call clk_put */
2704 	parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
2705 	clk_prepare_unlock();
2706 
2707 	return parent;
2708 }
2709 EXPORT_SYMBOL_GPL(clk_get_parent);
2710 
2711 static struct clk_core *__clk_init_parent(struct clk_core *core)
2712 {
2713 	u8 index = 0;
2714 
2715 	if (core->num_parents > 1 && core->ops->get_parent)
2716 		index = core->ops->get_parent(core->hw);
2717 
2718 	return clk_core_get_parent_by_index(core, index);
2719 }
2720 
2721 static void clk_core_reparent(struct clk_core *core,
2722 				  struct clk_core *new_parent)
2723 {
2724 	clk_reparent(core, new_parent);
2725 	__clk_recalc_accuracies(core);
2726 	__clk_recalc_rates(core, true, POST_RATE_CHANGE);
2727 }
2728 
2729 void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent)
2730 {
2731 	if (!hw)
2732 		return;
2733 
2734 	clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
2735 }
2736 
2737 /**
2738  * clk_has_parent - check if a clock is a possible parent for another
2739  * @clk: clock source
2740  * @parent: parent clock source
2741  *
2742  * This function can be used in drivers that need to check that a clock can be
2743  * the parent of another without actually changing the parent.
2744  *
2745  * Returns true if @parent is a possible parent for @clk, false otherwise.
2746  */
2747 bool clk_has_parent(const struct clk *clk, const struct clk *parent)
2748 {
2749 	/* NULL clocks should be nops, so return success if either is NULL. */
2750 	if (!clk || !parent)
2751 		return true;
2752 
2753 	return clk_core_has_parent(clk->core, parent->core);
2754 }
2755 EXPORT_SYMBOL_GPL(clk_has_parent);
2756 
2757 static int clk_core_set_parent_nolock(struct clk_core *core,
2758 				      struct clk_core *parent)
2759 {
2760 	int ret = 0;
2761 	int p_index = 0;
2762 	unsigned long p_rate = 0;
2763 
2764 	lockdep_assert_held(&prepare_lock);
2765 
2766 	if (!core)
2767 		return 0;
2768 
2769 	if (core->parent == parent)
2770 		return 0;
2771 
2772 	/* verify ops for multi-parent clks */
2773 	if (core->num_parents > 1 && !core->ops->set_parent)
2774 		return -EPERM;
2775 
2776 	/* check that we are allowed to re-parent if the clock is in use */
2777 	if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count)
2778 		return -EBUSY;
2779 
2780 	if (clk_core_rate_is_protected(core))
2781 		return -EBUSY;
2782 
2783 	/* try finding the new parent index */
2784 	if (parent) {
2785 		p_index = clk_fetch_parent_index(core, parent);
2786 		if (p_index < 0) {
2787 			pr_debug("%s: clk %s can not be parent of clk %s\n",
2788 					__func__, parent->name, core->name);
2789 			return p_index;
2790 		}
2791 		p_rate = parent->rate;
2792 	}
2793 
2794 	ret = clk_pm_runtime_get(core);
2795 	if (ret)
2796 		return ret;
2797 
2798 	/* propagate PRE_RATE_CHANGE notifications */
2799 	ret = __clk_speculate_rates(core, p_rate);
2800 
2801 	/* abort if a driver objects */
2802 	if (ret & NOTIFY_STOP_MASK)
2803 		goto runtime_put;
2804 
2805 	/* do the re-parent */
2806 	ret = __clk_set_parent(core, parent, p_index);
2807 
2808 	/* propagate rate an accuracy recalculation accordingly */
2809 	if (ret) {
2810 		__clk_recalc_rates(core, true, ABORT_RATE_CHANGE);
2811 	} else {
2812 		__clk_recalc_rates(core, true, POST_RATE_CHANGE);
2813 		__clk_recalc_accuracies(core);
2814 	}
2815 
2816 runtime_put:
2817 	clk_pm_runtime_put(core);
2818 
2819 	return ret;
2820 }
2821 
2822 int clk_hw_set_parent(struct clk_hw *hw, struct clk_hw *parent)
2823 {
2824 	return clk_core_set_parent_nolock(hw->core, parent->core);
2825 }
2826 EXPORT_SYMBOL_GPL(clk_hw_set_parent);
2827 
2828 /**
2829  * clk_set_parent - switch the parent of a mux clk
2830  * @clk: the mux clk whose input we are switching
2831  * @parent: the new input to clk
2832  *
2833  * Re-parent clk to use parent as its new input source.  If clk is in
2834  * prepared state, the clk will get enabled for the duration of this call. If
2835  * that's not acceptable for a specific clk (Eg: the consumer can't handle
2836  * that, the reparenting is glitchy in hardware, etc), use the
2837  * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
2838  *
2839  * After successfully changing clk's parent clk_set_parent will update the
2840  * clk topology, sysfs topology and propagate rate recalculation via
2841  * __clk_recalc_rates.
2842  *
2843  * Returns 0 on success, -EERROR otherwise.
2844  */
2845 int clk_set_parent(struct clk *clk, struct clk *parent)
2846 {
2847 	int ret;
2848 
2849 	if (!clk)
2850 		return 0;
2851 
2852 	clk_prepare_lock();
2853 
2854 	if (clk->exclusive_count)
2855 		clk_core_rate_unprotect(clk->core);
2856 
2857 	ret = clk_core_set_parent_nolock(clk->core,
2858 					 parent ? parent->core : NULL);
2859 
2860 	if (clk->exclusive_count)
2861 		clk_core_rate_protect(clk->core);
2862 
2863 	clk_prepare_unlock();
2864 
2865 	return ret;
2866 }
2867 EXPORT_SYMBOL_GPL(clk_set_parent);
2868 
2869 static int clk_core_set_phase_nolock(struct clk_core *core, int degrees)
2870 {
2871 	int ret = -EINVAL;
2872 
2873 	lockdep_assert_held(&prepare_lock);
2874 
2875 	if (!core)
2876 		return 0;
2877 
2878 	if (clk_core_rate_is_protected(core))
2879 		return -EBUSY;
2880 
2881 	trace_clk_set_phase(core, degrees);
2882 
2883 	if (core->ops->set_phase) {
2884 		ret = core->ops->set_phase(core->hw, degrees);
2885 		if (!ret)
2886 			core->phase = degrees;
2887 	}
2888 
2889 	trace_clk_set_phase_complete(core, degrees);
2890 
2891 	return ret;
2892 }
2893 
2894 /**
2895  * clk_set_phase - adjust the phase shift of a clock signal
2896  * @clk: clock signal source
2897  * @degrees: number of degrees the signal is shifted
2898  *
2899  * Shifts the phase of a clock signal by the specified
2900  * degrees. Returns 0 on success, -EERROR otherwise.
2901  *
2902  * This function makes no distinction about the input or reference
2903  * signal that we adjust the clock signal phase against. For example
2904  * phase locked-loop clock signal generators we may shift phase with
2905  * respect to feedback clock signal input, but for other cases the
2906  * clock phase may be shifted with respect to some other, unspecified
2907  * signal.
2908  *
2909  * Additionally the concept of phase shift does not propagate through
2910  * the clock tree hierarchy, which sets it apart from clock rates and
2911  * clock accuracy. A parent clock phase attribute does not have an
2912  * impact on the phase attribute of a child clock.
2913  */
2914 int clk_set_phase(struct clk *clk, int degrees)
2915 {
2916 	int ret;
2917 
2918 	if (!clk)
2919 		return 0;
2920 
2921 	/* sanity check degrees */
2922 	degrees %= 360;
2923 	if (degrees < 0)
2924 		degrees += 360;
2925 
2926 	clk_prepare_lock();
2927 
2928 	if (clk->exclusive_count)
2929 		clk_core_rate_unprotect(clk->core);
2930 
2931 	ret = clk_core_set_phase_nolock(clk->core, degrees);
2932 
2933 	if (clk->exclusive_count)
2934 		clk_core_rate_protect(clk->core);
2935 
2936 	clk_prepare_unlock();
2937 
2938 	return ret;
2939 }
2940 EXPORT_SYMBOL_GPL(clk_set_phase);
2941 
2942 static int clk_core_get_phase(struct clk_core *core)
2943 {
2944 	int ret;
2945 
2946 	lockdep_assert_held(&prepare_lock);
2947 	if (!core->ops->get_phase)
2948 		return 0;
2949 
2950 	/* Always try to update cached phase if possible */
2951 	ret = core->ops->get_phase(core->hw);
2952 	if (ret >= 0)
2953 		core->phase = ret;
2954 
2955 	return ret;
2956 }
2957 
2958 /**
2959  * clk_get_phase - return the phase shift of a clock signal
2960  * @clk: clock signal source
2961  *
2962  * Returns the phase shift of a clock node in degrees, otherwise returns
2963  * -EERROR.
2964  */
2965 int clk_get_phase(struct clk *clk)
2966 {
2967 	int ret;
2968 
2969 	if (!clk)
2970 		return 0;
2971 
2972 	clk_prepare_lock();
2973 	ret = clk_core_get_phase(clk->core);
2974 	clk_prepare_unlock();
2975 
2976 	return ret;
2977 }
2978 EXPORT_SYMBOL_GPL(clk_get_phase);
2979 
2980 static void clk_core_reset_duty_cycle_nolock(struct clk_core *core)
2981 {
2982 	/* Assume a default value of 50% */
2983 	core->duty.num = 1;
2984 	core->duty.den = 2;
2985 }
2986 
2987 static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core);
2988 
2989 static int clk_core_update_duty_cycle_nolock(struct clk_core *core)
2990 {
2991 	struct clk_duty *duty = &core->duty;
2992 	int ret = 0;
2993 
2994 	if (!core->ops->get_duty_cycle)
2995 		return clk_core_update_duty_cycle_parent_nolock(core);
2996 
2997 	ret = core->ops->get_duty_cycle(core->hw, duty);
2998 	if (ret)
2999 		goto reset;
3000 
3001 	/* Don't trust the clock provider too much */
3002 	if (duty->den == 0 || duty->num > duty->den) {
3003 		ret = -EINVAL;
3004 		goto reset;
3005 	}
3006 
3007 	return 0;
3008 
3009 reset:
3010 	clk_core_reset_duty_cycle_nolock(core);
3011 	return ret;
3012 }
3013 
3014 static int clk_core_update_duty_cycle_parent_nolock(struct clk_core *core)
3015 {
3016 	int ret = 0;
3017 
3018 	if (core->parent &&
3019 	    core->flags & CLK_DUTY_CYCLE_PARENT) {
3020 		ret = clk_core_update_duty_cycle_nolock(core->parent);
3021 		memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
3022 	} else {
3023 		clk_core_reset_duty_cycle_nolock(core);
3024 	}
3025 
3026 	return ret;
3027 }
3028 
3029 static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
3030 						 struct clk_duty *duty);
3031 
3032 static int clk_core_set_duty_cycle_nolock(struct clk_core *core,
3033 					  struct clk_duty *duty)
3034 {
3035 	int ret;
3036 
3037 	lockdep_assert_held(&prepare_lock);
3038 
3039 	if (clk_core_rate_is_protected(core))
3040 		return -EBUSY;
3041 
3042 	trace_clk_set_duty_cycle(core, duty);
3043 
3044 	if (!core->ops->set_duty_cycle)
3045 		return clk_core_set_duty_cycle_parent_nolock(core, duty);
3046 
3047 	ret = core->ops->set_duty_cycle(core->hw, duty);
3048 	if (!ret)
3049 		memcpy(&core->duty, duty, sizeof(*duty));
3050 
3051 	trace_clk_set_duty_cycle_complete(core, duty);
3052 
3053 	return ret;
3054 }
3055 
3056 static int clk_core_set_duty_cycle_parent_nolock(struct clk_core *core,
3057 						 struct clk_duty *duty)
3058 {
3059 	int ret = 0;
3060 
3061 	if (core->parent &&
3062 	    core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) {
3063 		ret = clk_core_set_duty_cycle_nolock(core->parent, duty);
3064 		memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
3065 	}
3066 
3067 	return ret;
3068 }
3069 
3070 /**
3071  * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
3072  * @clk: clock signal source
3073  * @num: numerator of the duty cycle ratio to be applied
3074  * @den: denominator of the duty cycle ratio to be applied
3075  *
3076  * Apply the duty cycle ratio if the ratio is valid and the clock can
3077  * perform this operation
3078  *
3079  * Returns (0) on success, a negative errno otherwise.
3080  */
3081 int clk_set_duty_cycle(struct clk *clk, unsigned int num, unsigned int den)
3082 {
3083 	int ret;
3084 	struct clk_duty duty;
3085 
3086 	if (!clk)
3087 		return 0;
3088 
3089 	/* sanity check the ratio */
3090 	if (den == 0 || num > den)
3091 		return -EINVAL;
3092 
3093 	duty.num = num;
3094 	duty.den = den;
3095 
3096 	clk_prepare_lock();
3097 
3098 	if (clk->exclusive_count)
3099 		clk_core_rate_unprotect(clk->core);
3100 
3101 	ret = clk_core_set_duty_cycle_nolock(clk->core, &duty);
3102 
3103 	if (clk->exclusive_count)
3104 		clk_core_rate_protect(clk->core);
3105 
3106 	clk_prepare_unlock();
3107 
3108 	return ret;
3109 }
3110 EXPORT_SYMBOL_GPL(clk_set_duty_cycle);
3111 
3112 static int clk_core_get_scaled_duty_cycle(struct clk_core *core,
3113 					  unsigned int scale)
3114 {
3115 	struct clk_duty *duty = &core->duty;
3116 	int ret;
3117 
3118 	clk_prepare_lock();
3119 
3120 	ret = clk_core_update_duty_cycle_nolock(core);
3121 	if (!ret)
3122 		ret = mult_frac(scale, duty->num, duty->den);
3123 
3124 	clk_prepare_unlock();
3125 
3126 	return ret;
3127 }
3128 
3129 /**
3130  * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal
3131  * @clk: clock signal source
3132  * @scale: scaling factor to be applied to represent the ratio as an integer
3133  *
3134  * Returns the duty cycle ratio of a clock node multiplied by the provided
3135  * scaling factor, or negative errno on error.
3136  */
3137 int clk_get_scaled_duty_cycle(struct clk *clk, unsigned int scale)
3138 {
3139 	if (!clk)
3140 		return 0;
3141 
3142 	return clk_core_get_scaled_duty_cycle(clk->core, scale);
3143 }
3144 EXPORT_SYMBOL_GPL(clk_get_scaled_duty_cycle);
3145 
3146 /**
3147  * clk_is_match - check if two clk's point to the same hardware clock
3148  * @p: clk compared against q
3149  * @q: clk compared against p
3150  *
3151  * Returns true if the two struct clk pointers both point to the same hardware
3152  * clock node. Put differently, returns true if struct clk *p and struct clk *q
3153  * share the same struct clk_core object.
3154  *
3155  * Returns false otherwise. Note that two NULL clks are treated as matching.
3156  */
3157 bool clk_is_match(const struct clk *p, const struct clk *q)
3158 {
3159 	/* trivial case: identical struct clk's or both NULL */
3160 	if (p == q)
3161 		return true;
3162 
3163 	/* true if clk->core pointers match. Avoid dereferencing garbage */
3164 	if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
3165 		if (p->core == q->core)
3166 			return true;
3167 
3168 	return false;
3169 }
3170 EXPORT_SYMBOL_GPL(clk_is_match);
3171 
3172 /***        debugfs support        ***/
3173 
3174 #ifdef CONFIG_DEBUG_FS
3175 #include <linux/debugfs.h>
3176 
3177 static struct dentry *rootdir;
3178 static int inited = 0;
3179 static DEFINE_MUTEX(clk_debug_lock);
3180 static HLIST_HEAD(clk_debug_list);
3181 
3182 static struct hlist_head *orphan_list[] = {
3183 	&clk_orphan_list,
3184 	NULL,
3185 };
3186 
3187 static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
3188 				 int level)
3189 {
3190 	int phase;
3191 
3192 	seq_printf(s, "%*s%-*s %7d %8d %8d %11lu %10lu ",
3193 		   level * 3 + 1, "",
3194 		   30 - level * 3, c->name,
3195 		   c->enable_count, c->prepare_count, c->protect_count,
3196 		   clk_core_get_rate_recalc(c),
3197 		   clk_core_get_accuracy_recalc(c));
3198 
3199 	phase = clk_core_get_phase(c);
3200 	if (phase >= 0)
3201 		seq_printf(s, "%5d", phase);
3202 	else
3203 		seq_puts(s, "-----");
3204 
3205 	seq_printf(s, " %6d", clk_core_get_scaled_duty_cycle(c, 100000));
3206 
3207 	if (c->ops->is_enabled)
3208 		seq_printf(s, " %9c\n", clk_core_is_enabled(c) ? 'Y' : 'N');
3209 	else if (!c->ops->enable)
3210 		seq_printf(s, " %9c\n", 'Y');
3211 	else
3212 		seq_printf(s, " %9c\n", '?');
3213 }
3214 
3215 static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
3216 				     int level)
3217 {
3218 	struct clk_core *child;
3219 
3220 	clk_pm_runtime_get(c);
3221 	clk_summary_show_one(s, c, level);
3222 	clk_pm_runtime_put(c);
3223 
3224 	hlist_for_each_entry(child, &c->children, child_node)
3225 		clk_summary_show_subtree(s, child, level + 1);
3226 }
3227 
3228 static int clk_summary_show(struct seq_file *s, void *data)
3229 {
3230 	struct clk_core *c;
3231 	struct hlist_head **lists = s->private;
3232 
3233 	seq_puts(s, "                                 enable  prepare  protect                                duty  hardware\n");
3234 	seq_puts(s, "   clock                          count    count    count        rate   accuracy phase  cycle    enable\n");
3235 	seq_puts(s, "-------------------------------------------------------------------------------------------------------\n");
3236 
3237 	clk_prepare_lock();
3238 
3239 	for (; *lists; lists++)
3240 		hlist_for_each_entry(c, *lists, child_node)
3241 			clk_summary_show_subtree(s, c, 0);
3242 
3243 	clk_prepare_unlock();
3244 
3245 	return 0;
3246 }
3247 DEFINE_SHOW_ATTRIBUTE(clk_summary);
3248 
3249 static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
3250 {
3251 	int phase;
3252 	unsigned long min_rate, max_rate;
3253 
3254 	clk_core_get_boundaries(c, &min_rate, &max_rate);
3255 
3256 	/* This should be JSON format, i.e. elements separated with a comma */
3257 	seq_printf(s, "\"%s\": { ", c->name);
3258 	seq_printf(s, "\"enable_count\": %d,", c->enable_count);
3259 	seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
3260 	seq_printf(s, "\"protect_count\": %d,", c->protect_count);
3261 	seq_printf(s, "\"rate\": %lu,", clk_core_get_rate_recalc(c));
3262 	seq_printf(s, "\"min_rate\": %lu,", min_rate);
3263 	seq_printf(s, "\"max_rate\": %lu,", max_rate);
3264 	seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy_recalc(c));
3265 	phase = clk_core_get_phase(c);
3266 	if (phase >= 0)
3267 		seq_printf(s, "\"phase\": %d,", phase);
3268 	seq_printf(s, "\"duty_cycle\": %u",
3269 		   clk_core_get_scaled_duty_cycle(c, 100000));
3270 }
3271 
3272 static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
3273 {
3274 	struct clk_core *child;
3275 
3276 	clk_dump_one(s, c, level);
3277 
3278 	hlist_for_each_entry(child, &c->children, child_node) {
3279 		seq_putc(s, ',');
3280 		clk_dump_subtree(s, child, level + 1);
3281 	}
3282 
3283 	seq_putc(s, '}');
3284 }
3285 
3286 static int clk_dump_show(struct seq_file *s, void *data)
3287 {
3288 	struct clk_core *c;
3289 	bool first_node = true;
3290 	struct hlist_head **lists = s->private;
3291 
3292 	seq_putc(s, '{');
3293 	clk_prepare_lock();
3294 
3295 	for (; *lists; lists++) {
3296 		hlist_for_each_entry(c, *lists, child_node) {
3297 			if (!first_node)
3298 				seq_putc(s, ',');
3299 			first_node = false;
3300 			clk_dump_subtree(s, c, 0);
3301 		}
3302 	}
3303 
3304 	clk_prepare_unlock();
3305 
3306 	seq_puts(s, "}\n");
3307 	return 0;
3308 }
3309 DEFINE_SHOW_ATTRIBUTE(clk_dump);
3310 
3311 #undef CLOCK_ALLOW_WRITE_DEBUGFS
3312 #ifdef CLOCK_ALLOW_WRITE_DEBUGFS
3313 /*
3314  * This can be dangerous, therefore don't provide any real compile time
3315  * configuration option for this feature.
3316  * People who want to use this will need to modify the source code directly.
3317  */
3318 static int clk_rate_set(void *data, u64 val)
3319 {
3320 	struct clk_core *core = data;
3321 	int ret;
3322 
3323 	clk_prepare_lock();
3324 	ret = clk_core_set_rate_nolock(core, val);
3325 	clk_prepare_unlock();
3326 
3327 	return ret;
3328 }
3329 
3330 #define clk_rate_mode	0644
3331 
3332 static int clk_prepare_enable_set(void *data, u64 val)
3333 {
3334 	struct clk_core *core = data;
3335 	int ret = 0;
3336 
3337 	if (val)
3338 		ret = clk_prepare_enable(core->hw->clk);
3339 	else
3340 		clk_disable_unprepare(core->hw->clk);
3341 
3342 	return ret;
3343 }
3344 
3345 static int clk_prepare_enable_get(void *data, u64 *val)
3346 {
3347 	struct clk_core *core = data;
3348 
3349 	*val = core->enable_count && core->prepare_count;
3350 	return 0;
3351 }
3352 
3353 DEFINE_DEBUGFS_ATTRIBUTE(clk_prepare_enable_fops, clk_prepare_enable_get,
3354 			 clk_prepare_enable_set, "%llu\n");
3355 
3356 #else
3357 #define clk_rate_set	NULL
3358 #define clk_rate_mode	0444
3359 #endif
3360 
3361 static int clk_rate_get(void *data, u64 *val)
3362 {
3363 	struct clk_core *core = data;
3364 
3365 	clk_prepare_lock();
3366 	*val = clk_core_get_rate_recalc(core);
3367 	clk_prepare_unlock();
3368 
3369 	return 0;
3370 }
3371 
3372 DEFINE_DEBUGFS_ATTRIBUTE(clk_rate_fops, clk_rate_get, clk_rate_set, "%llu\n");
3373 
3374 static const struct {
3375 	unsigned long flag;
3376 	const char *name;
3377 } clk_flags[] = {
3378 #define ENTRY(f) { f, #f }
3379 	ENTRY(CLK_SET_RATE_GATE),
3380 	ENTRY(CLK_SET_PARENT_GATE),
3381 	ENTRY(CLK_SET_RATE_PARENT),
3382 	ENTRY(CLK_IGNORE_UNUSED),
3383 	ENTRY(CLK_GET_RATE_NOCACHE),
3384 	ENTRY(CLK_SET_RATE_NO_REPARENT),
3385 	ENTRY(CLK_GET_ACCURACY_NOCACHE),
3386 	ENTRY(CLK_RECALC_NEW_RATES),
3387 	ENTRY(CLK_SET_RATE_UNGATE),
3388 	ENTRY(CLK_IS_CRITICAL),
3389 	ENTRY(CLK_OPS_PARENT_ENABLE),
3390 	ENTRY(CLK_DUTY_CYCLE_PARENT),
3391 #undef ENTRY
3392 };
3393 
3394 static int clk_flags_show(struct seq_file *s, void *data)
3395 {
3396 	struct clk_core *core = s->private;
3397 	unsigned long flags = core->flags;
3398 	unsigned int i;
3399 
3400 	for (i = 0; flags && i < ARRAY_SIZE(clk_flags); i++) {
3401 		if (flags & clk_flags[i].flag) {
3402 			seq_printf(s, "%s\n", clk_flags[i].name);
3403 			flags &= ~clk_flags[i].flag;
3404 		}
3405 	}
3406 	if (flags) {
3407 		/* Unknown flags */
3408 		seq_printf(s, "0x%lx\n", flags);
3409 	}
3410 
3411 	return 0;
3412 }
3413 DEFINE_SHOW_ATTRIBUTE(clk_flags);
3414 
3415 static void possible_parent_show(struct seq_file *s, struct clk_core *core,
3416 				 unsigned int i, char terminator)
3417 {
3418 	struct clk_core *parent;
3419 
3420 	/*
3421 	 * Go through the following options to fetch a parent's name.
3422 	 *
3423 	 * 1. Fetch the registered parent clock and use its name
3424 	 * 2. Use the global (fallback) name if specified
3425 	 * 3. Use the local fw_name if provided
3426 	 * 4. Fetch parent clock's clock-output-name if DT index was set
3427 	 *
3428 	 * This may still fail in some cases, such as when the parent is
3429 	 * specified directly via a struct clk_hw pointer, but it isn't
3430 	 * registered (yet).
3431 	 */
3432 	parent = clk_core_get_parent_by_index(core, i);
3433 	if (parent)
3434 		seq_puts(s, parent->name);
3435 	else if (core->parents[i].name)
3436 		seq_puts(s, core->parents[i].name);
3437 	else if (core->parents[i].fw_name)
3438 		seq_printf(s, "<%s>(fw)", core->parents[i].fw_name);
3439 	else if (core->parents[i].index >= 0)
3440 		seq_puts(s,
3441 			 of_clk_get_parent_name(core->of_node,
3442 						core->parents[i].index));
3443 	else
3444 		seq_puts(s, "(missing)");
3445 
3446 	seq_putc(s, terminator);
3447 }
3448 
3449 static int possible_parents_show(struct seq_file *s, void *data)
3450 {
3451 	struct clk_core *core = s->private;
3452 	int i;
3453 
3454 	for (i = 0; i < core->num_parents - 1; i++)
3455 		possible_parent_show(s, core, i, ' ');
3456 
3457 	possible_parent_show(s, core, i, '\n');
3458 
3459 	return 0;
3460 }
3461 DEFINE_SHOW_ATTRIBUTE(possible_parents);
3462 
3463 static int current_parent_show(struct seq_file *s, void *data)
3464 {
3465 	struct clk_core *core = s->private;
3466 
3467 	if (core->parent)
3468 		seq_printf(s, "%s\n", core->parent->name);
3469 
3470 	return 0;
3471 }
3472 DEFINE_SHOW_ATTRIBUTE(current_parent);
3473 
3474 #ifdef CLOCK_ALLOW_WRITE_DEBUGFS
3475 static ssize_t current_parent_write(struct file *file, const char __user *ubuf,
3476 				    size_t count, loff_t *ppos)
3477 {
3478 	struct seq_file *s = file->private_data;
3479 	struct clk_core *core = s->private;
3480 	struct clk_core *parent;
3481 	u8 idx;
3482 	int err;
3483 
3484 	err = kstrtou8_from_user(ubuf, count, 0, &idx);
3485 	if (err < 0)
3486 		return err;
3487 
3488 	parent = clk_core_get_parent_by_index(core, idx);
3489 	if (!parent)
3490 		return -ENOENT;
3491 
3492 	clk_prepare_lock();
3493 	err = clk_core_set_parent_nolock(core, parent);
3494 	clk_prepare_unlock();
3495 	if (err)
3496 		return err;
3497 
3498 	return count;
3499 }
3500 
3501 static const struct file_operations current_parent_rw_fops = {
3502 	.open		= current_parent_open,
3503 	.write		= current_parent_write,
3504 	.read		= seq_read,
3505 	.llseek		= seq_lseek,
3506 	.release	= single_release,
3507 };
3508 #endif
3509 
3510 static int clk_duty_cycle_show(struct seq_file *s, void *data)
3511 {
3512 	struct clk_core *core = s->private;
3513 	struct clk_duty *duty = &core->duty;
3514 
3515 	seq_printf(s, "%u/%u\n", duty->num, duty->den);
3516 
3517 	return 0;
3518 }
3519 DEFINE_SHOW_ATTRIBUTE(clk_duty_cycle);
3520 
3521 static int clk_min_rate_show(struct seq_file *s, void *data)
3522 {
3523 	struct clk_core *core = s->private;
3524 	unsigned long min_rate, max_rate;
3525 
3526 	clk_prepare_lock();
3527 	clk_core_get_boundaries(core, &min_rate, &max_rate);
3528 	clk_prepare_unlock();
3529 	seq_printf(s, "%lu\n", min_rate);
3530 
3531 	return 0;
3532 }
3533 DEFINE_SHOW_ATTRIBUTE(clk_min_rate);
3534 
3535 static int clk_max_rate_show(struct seq_file *s, void *data)
3536 {
3537 	struct clk_core *core = s->private;
3538 	unsigned long min_rate, max_rate;
3539 
3540 	clk_prepare_lock();
3541 	clk_core_get_boundaries(core, &min_rate, &max_rate);
3542 	clk_prepare_unlock();
3543 	seq_printf(s, "%lu\n", max_rate);
3544 
3545 	return 0;
3546 }
3547 DEFINE_SHOW_ATTRIBUTE(clk_max_rate);
3548 
3549 static void clk_debug_create_one(struct clk_core *core, struct dentry *pdentry)
3550 {
3551 	struct dentry *root;
3552 
3553 	if (!core || !pdentry)
3554 		return;
3555 
3556 	root = debugfs_create_dir(core->name, pdentry);
3557 	core->dentry = root;
3558 
3559 	debugfs_create_file("clk_rate", clk_rate_mode, root, core,
3560 			    &clk_rate_fops);
3561 	debugfs_create_file("clk_min_rate", 0444, root, core, &clk_min_rate_fops);
3562 	debugfs_create_file("clk_max_rate", 0444, root, core, &clk_max_rate_fops);
3563 	debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
3564 	debugfs_create_u32("clk_phase", 0444, root, &core->phase);
3565 	debugfs_create_file("clk_flags", 0444, root, core, &clk_flags_fops);
3566 	debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
3567 	debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
3568 	debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
3569 	debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
3570 	debugfs_create_file("clk_duty_cycle", 0444, root, core,
3571 			    &clk_duty_cycle_fops);
3572 #ifdef CLOCK_ALLOW_WRITE_DEBUGFS
3573 	debugfs_create_file("clk_prepare_enable", 0644, root, core,
3574 			    &clk_prepare_enable_fops);
3575 
3576 	if (core->num_parents > 1)
3577 		debugfs_create_file("clk_parent", 0644, root, core,
3578 				    &current_parent_rw_fops);
3579 	else
3580 #endif
3581 	if (core->num_parents > 0)
3582 		debugfs_create_file("clk_parent", 0444, root, core,
3583 				    &current_parent_fops);
3584 
3585 	if (core->num_parents > 1)
3586 		debugfs_create_file("clk_possible_parents", 0444, root, core,
3587 				    &possible_parents_fops);
3588 
3589 	if (core->ops->debug_init)
3590 		core->ops->debug_init(core->hw, core->dentry);
3591 }
3592 
3593 /**
3594  * clk_debug_register - add a clk node to the debugfs clk directory
3595  * @core: the clk being added to the debugfs clk directory
3596  *
3597  * Dynamically adds a clk to the debugfs clk directory if debugfs has been
3598  * initialized.  Otherwise it bails out early since the debugfs clk directory
3599  * will be created lazily by clk_debug_init as part of a late_initcall.
3600  */
3601 static void clk_debug_register(struct clk_core *core)
3602 {
3603 	mutex_lock(&clk_debug_lock);
3604 	hlist_add_head(&core->debug_node, &clk_debug_list);
3605 	if (inited)
3606 		clk_debug_create_one(core, rootdir);
3607 	mutex_unlock(&clk_debug_lock);
3608 }
3609 
3610  /**
3611  * clk_debug_unregister - remove a clk node from the debugfs clk directory
3612  * @core: the clk being removed from the debugfs clk directory
3613  *
3614  * Dynamically removes a clk and all its child nodes from the
3615  * debugfs clk directory if clk->dentry points to debugfs created by
3616  * clk_debug_register in __clk_core_init.
3617  */
3618 static void clk_debug_unregister(struct clk_core *core)
3619 {
3620 	mutex_lock(&clk_debug_lock);
3621 	hlist_del_init(&core->debug_node);
3622 	debugfs_remove_recursive(core->dentry);
3623 	core->dentry = NULL;
3624 	mutex_unlock(&clk_debug_lock);
3625 }
3626 
3627 /**
3628  * clk_debug_init - lazily populate the debugfs clk directory
3629  *
3630  * clks are often initialized very early during boot before memory can be
3631  * dynamically allocated and well before debugfs is setup. This function
3632  * populates the debugfs clk directory once at boot-time when we know that
3633  * debugfs is setup. It should only be called once at boot-time, all other clks
3634  * added dynamically will be done so with clk_debug_register.
3635  */
3636 static int __init clk_debug_init(void)
3637 {
3638 	struct clk_core *core;
3639 
3640 #ifdef CLOCK_ALLOW_WRITE_DEBUGFS
3641 	pr_warn("\n");
3642 	pr_warn("********************************************************************\n");
3643 	pr_warn("**     NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE           **\n");
3644 	pr_warn("**                                                                **\n");
3645 	pr_warn("**  WRITEABLE clk DebugFS SUPPORT HAS BEEN ENABLED IN THIS KERNEL **\n");
3646 	pr_warn("**                                                                **\n");
3647 	pr_warn("** This means that this kernel is built to expose clk operations  **\n");
3648 	pr_warn("** such as parent or rate setting, enabling, disabling, etc.      **\n");
3649 	pr_warn("** to userspace, which may compromise security on your system.    **\n");
3650 	pr_warn("**                                                                **\n");
3651 	pr_warn("** If you see this message and you are not debugging the          **\n");
3652 	pr_warn("** kernel, report this immediately to your vendor!                **\n");
3653 	pr_warn("**                                                                **\n");
3654 	pr_warn("**     NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE           **\n");
3655 	pr_warn("********************************************************************\n");
3656 #endif
3657 
3658 	rootdir = debugfs_create_dir("clk", NULL);
3659 
3660 	debugfs_create_file("clk_summary", 0444, rootdir, &all_lists,
3661 			    &clk_summary_fops);
3662 	debugfs_create_file("clk_dump", 0444, rootdir, &all_lists,
3663 			    &clk_dump_fops);
3664 	debugfs_create_file("clk_orphan_summary", 0444, rootdir, &orphan_list,
3665 			    &clk_summary_fops);
3666 	debugfs_create_file("clk_orphan_dump", 0444, rootdir, &orphan_list,
3667 			    &clk_dump_fops);
3668 
3669 	mutex_lock(&clk_debug_lock);
3670 	hlist_for_each_entry(core, &clk_debug_list, debug_node)
3671 		clk_debug_create_one(core, rootdir);
3672 
3673 	inited = 1;
3674 	mutex_unlock(&clk_debug_lock);
3675 
3676 	return 0;
3677 }
3678 late_initcall(clk_debug_init);
3679 #else
3680 static inline void clk_debug_register(struct clk_core *core) { }
3681 static inline void clk_debug_unregister(struct clk_core *core)
3682 {
3683 }
3684 #endif
3685 
3686 static void clk_core_reparent_orphans_nolock(void)
3687 {
3688 	struct clk_core *orphan;
3689 	struct hlist_node *tmp2;
3690 
3691 	/*
3692 	 * walk the list of orphan clocks and reparent any that newly finds a
3693 	 * parent.
3694 	 */
3695 	hlist_for_each_entry_safe(orphan, tmp2, &clk_orphan_list, child_node) {
3696 		struct clk_core *parent = __clk_init_parent(orphan);
3697 
3698 		/*
3699 		 * We need to use __clk_set_parent_before() and _after() to
3700 		 * properly migrate any prepare/enable count of the orphan
3701 		 * clock. This is important for CLK_IS_CRITICAL clocks, which
3702 		 * are enabled during init but might not have a parent yet.
3703 		 */
3704 		if (parent) {
3705 			/* update the clk tree topology */
3706 			__clk_set_parent_before(orphan, parent);
3707 			__clk_set_parent_after(orphan, parent, NULL);
3708 			__clk_recalc_accuracies(orphan);
3709 			__clk_recalc_rates(orphan, true, 0);
3710 
3711 			/*
3712 			 * __clk_init_parent() will set the initial req_rate to
3713 			 * 0 if the clock doesn't have clk_ops::recalc_rate and
3714 			 * is an orphan when it's registered.
3715 			 *
3716 			 * 'req_rate' is used by clk_set_rate_range() and
3717 			 * clk_put() to trigger a clk_set_rate() call whenever
3718 			 * the boundaries are modified. Let's make sure
3719 			 * 'req_rate' is set to something non-zero so that
3720 			 * clk_set_rate_range() doesn't drop the frequency.
3721 			 */
3722 			orphan->req_rate = orphan->rate;
3723 		}
3724 	}
3725 }
3726 
3727 /**
3728  * __clk_core_init - initialize the data structures in a struct clk_core
3729  * @core:	clk_core being initialized
3730  *
3731  * Initializes the lists in struct clk_core, queries the hardware for the
3732  * parent and rate and sets them both.
3733  */
3734 static int __clk_core_init(struct clk_core *core)
3735 {
3736 	int ret;
3737 	struct clk_core *parent;
3738 	unsigned long rate;
3739 	int phase;
3740 
3741 	clk_prepare_lock();
3742 
3743 	/*
3744 	 * Set hw->core after grabbing the prepare_lock to synchronize with
3745 	 * callers of clk_core_fill_parent_index() where we treat hw->core
3746 	 * being NULL as the clk not being registered yet. This is crucial so
3747 	 * that clks aren't parented until their parent is fully registered.
3748 	 */
3749 	core->hw->core = core;
3750 
3751 	ret = clk_pm_runtime_get(core);
3752 	if (ret)
3753 		goto unlock;
3754 
3755 	/* check to see if a clock with this name is already registered */
3756 	if (clk_core_lookup(core->name)) {
3757 		pr_debug("%s: clk %s already initialized\n",
3758 				__func__, core->name);
3759 		ret = -EEXIST;
3760 		goto out;
3761 	}
3762 
3763 	/* check that clk_ops are sane.  See Documentation/driver-api/clk.rst */
3764 	if (core->ops->set_rate &&
3765 	    !((core->ops->round_rate || core->ops->determine_rate) &&
3766 	      core->ops->recalc_rate)) {
3767 		pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n",
3768 		       __func__, core->name);
3769 		ret = -EINVAL;
3770 		goto out;
3771 	}
3772 
3773 	if (core->ops->set_parent && !core->ops->get_parent) {
3774 		pr_err("%s: %s must implement .get_parent & .set_parent\n",
3775 		       __func__, core->name);
3776 		ret = -EINVAL;
3777 		goto out;
3778 	}
3779 
3780 	if (core->ops->set_parent && !core->ops->determine_rate) {
3781 		pr_err("%s: %s must implement .set_parent & .determine_rate\n",
3782 			__func__, core->name);
3783 		ret = -EINVAL;
3784 		goto out;
3785 	}
3786 
3787 	if (core->num_parents > 1 && !core->ops->get_parent) {
3788 		pr_err("%s: %s must implement .get_parent as it has multi parents\n",
3789 		       __func__, core->name);
3790 		ret = -EINVAL;
3791 		goto out;
3792 	}
3793 
3794 	if (core->ops->set_rate_and_parent &&
3795 			!(core->ops->set_parent && core->ops->set_rate)) {
3796 		pr_err("%s: %s must implement .set_parent & .set_rate\n",
3797 				__func__, core->name);
3798 		ret = -EINVAL;
3799 		goto out;
3800 	}
3801 
3802 	/*
3803 	 * optional platform-specific magic
3804 	 *
3805 	 * The .init callback is not used by any of the basic clock types, but
3806 	 * exists for weird hardware that must perform initialization magic for
3807 	 * CCF to get an accurate view of clock for any other callbacks. It may
3808 	 * also be used needs to perform dynamic allocations. Such allocation
3809 	 * must be freed in the terminate() callback.
3810 	 * This callback shall not be used to initialize the parameters state,
3811 	 * such as rate, parent, etc ...
3812 	 *
3813 	 * If it exist, this callback should called before any other callback of
3814 	 * the clock
3815 	 */
3816 	if (core->ops->init) {
3817 		ret = core->ops->init(core->hw);
3818 		if (ret)
3819 			goto out;
3820 	}
3821 
3822 	parent = core->parent = __clk_init_parent(core);
3823 
3824 	/*
3825 	 * Populate core->parent if parent has already been clk_core_init'd. If
3826 	 * parent has not yet been clk_core_init'd then place clk in the orphan
3827 	 * list.  If clk doesn't have any parents then place it in the root
3828 	 * clk list.
3829 	 *
3830 	 * Every time a new clk is clk_init'd then we walk the list of orphan
3831 	 * clocks and re-parent any that are children of the clock currently
3832 	 * being clk_init'd.
3833 	 */
3834 	if (parent) {
3835 		hlist_add_head(&core->child_node, &parent->children);
3836 		core->orphan = parent->orphan;
3837 	} else if (!core->num_parents) {
3838 		hlist_add_head(&core->child_node, &clk_root_list);
3839 		core->orphan = false;
3840 	} else {
3841 		hlist_add_head(&core->child_node, &clk_orphan_list);
3842 		core->orphan = true;
3843 	}
3844 
3845 	/*
3846 	 * Set clk's accuracy.  The preferred method is to use
3847 	 * .recalc_accuracy. For simple clocks and lazy developers the default
3848 	 * fallback is to use the parent's accuracy.  If a clock doesn't have a
3849 	 * parent (or is orphaned) then accuracy is set to zero (perfect
3850 	 * clock).
3851 	 */
3852 	if (core->ops->recalc_accuracy)
3853 		core->accuracy = core->ops->recalc_accuracy(core->hw,
3854 					clk_core_get_accuracy_no_lock(parent));
3855 	else if (parent)
3856 		core->accuracy = parent->accuracy;
3857 	else
3858 		core->accuracy = 0;
3859 
3860 	/*
3861 	 * Set clk's phase by clk_core_get_phase() caching the phase.
3862 	 * Since a phase is by definition relative to its parent, just
3863 	 * query the current clock phase, or just assume it's in phase.
3864 	 */
3865 	phase = clk_core_get_phase(core);
3866 	if (phase < 0) {
3867 		ret = phase;
3868 		pr_warn("%s: Failed to get phase for clk '%s'\n", __func__,
3869 			core->name);
3870 		goto out;
3871 	}
3872 
3873 	/*
3874 	 * Set clk's duty cycle.
3875 	 */
3876 	clk_core_update_duty_cycle_nolock(core);
3877 
3878 	/*
3879 	 * Set clk's rate.  The preferred method is to use .recalc_rate.  For
3880 	 * simple clocks and lazy developers the default fallback is to use the
3881 	 * parent's rate.  If a clock doesn't have a parent (or is orphaned)
3882 	 * then rate is set to zero.
3883 	 */
3884 	if (core->ops->recalc_rate)
3885 		rate = core->ops->recalc_rate(core->hw,
3886 				clk_core_get_rate_nolock(parent));
3887 	else if (parent)
3888 		rate = parent->rate;
3889 	else
3890 		rate = 0;
3891 	core->rate = core->req_rate = rate;
3892 
3893 	/*
3894 	 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
3895 	 * don't get accidentally disabled when walking the orphan tree and
3896 	 * reparenting clocks
3897 	 */
3898 	if (core->flags & CLK_IS_CRITICAL) {
3899 		ret = clk_core_prepare(core);
3900 		if (ret) {
3901 			pr_warn("%s: critical clk '%s' failed to prepare\n",
3902 			       __func__, core->name);
3903 			goto out;
3904 		}
3905 
3906 		ret = clk_core_enable_lock(core);
3907 		if (ret) {
3908 			pr_warn("%s: critical clk '%s' failed to enable\n",
3909 			       __func__, core->name);
3910 			clk_core_unprepare(core);
3911 			goto out;
3912 		}
3913 	}
3914 
3915 	clk_core_reparent_orphans_nolock();
3916 
3917 	kref_init(&core->ref);
3918 out:
3919 	clk_pm_runtime_put(core);
3920 unlock:
3921 	if (ret) {
3922 		hlist_del_init(&core->child_node);
3923 		core->hw->core = NULL;
3924 	}
3925 
3926 	clk_prepare_unlock();
3927 
3928 	if (!ret)
3929 		clk_debug_register(core);
3930 
3931 	return ret;
3932 }
3933 
3934 /**
3935  * clk_core_link_consumer - Add a clk consumer to the list of consumers in a clk_core
3936  * @core: clk to add consumer to
3937  * @clk: consumer to link to a clk
3938  */
3939 static void clk_core_link_consumer(struct clk_core *core, struct clk *clk)
3940 {
3941 	clk_prepare_lock();
3942 	hlist_add_head(&clk->clks_node, &core->clks);
3943 	clk_prepare_unlock();
3944 }
3945 
3946 /**
3947  * clk_core_unlink_consumer - Remove a clk consumer from the list of consumers in a clk_core
3948  * @clk: consumer to unlink
3949  */
3950 static void clk_core_unlink_consumer(struct clk *clk)
3951 {
3952 	lockdep_assert_held(&prepare_lock);
3953 	hlist_del(&clk->clks_node);
3954 }
3955 
3956 /**
3957  * alloc_clk - Allocate a clk consumer, but leave it unlinked to the clk_core
3958  * @core: clk to allocate a consumer for
3959  * @dev_id: string describing device name
3960  * @con_id: connection ID string on device
3961  *
3962  * Returns: clk consumer left unlinked from the consumer list
3963  */
3964 static struct clk *alloc_clk(struct clk_core *core, const char *dev_id,
3965 			     const char *con_id)
3966 {
3967 	struct clk *clk;
3968 
3969 	clk = kzalloc(sizeof(*clk), GFP_KERNEL);
3970 	if (!clk)
3971 		return ERR_PTR(-ENOMEM);
3972 
3973 	clk->core = core;
3974 	clk->dev_id = dev_id;
3975 	clk->con_id = kstrdup_const(con_id, GFP_KERNEL);
3976 	clk->max_rate = ULONG_MAX;
3977 
3978 	return clk;
3979 }
3980 
3981 /**
3982  * free_clk - Free a clk consumer
3983  * @clk: clk consumer to free
3984  *
3985  * Note, this assumes the clk has been unlinked from the clk_core consumer
3986  * list.
3987  */
3988 static void free_clk(struct clk *clk)
3989 {
3990 	kfree_const(clk->con_id);
3991 	kfree(clk);
3992 }
3993 
3994 /**
3995  * clk_hw_create_clk: Allocate and link a clk consumer to a clk_core given
3996  * a clk_hw
3997  * @dev: clk consumer device
3998  * @hw: clk_hw associated with the clk being consumed
3999  * @dev_id: string describing device name
4000  * @con_id: connection ID string on device
4001  *
4002  * This is the main function used to create a clk pointer for use by clk
4003  * consumers. It connects a consumer to the clk_core and clk_hw structures
4004  * used by the framework and clk provider respectively.
4005  */
4006 struct clk *clk_hw_create_clk(struct device *dev, struct clk_hw *hw,
4007 			      const char *dev_id, const char *con_id)
4008 {
4009 	struct clk *clk;
4010 	struct clk_core *core;
4011 
4012 	/* This is to allow this function to be chained to others */
4013 	if (IS_ERR_OR_NULL(hw))
4014 		return ERR_CAST(hw);
4015 
4016 	core = hw->core;
4017 	clk = alloc_clk(core, dev_id, con_id);
4018 	if (IS_ERR(clk))
4019 		return clk;
4020 	clk->dev = dev;
4021 
4022 	if (!try_module_get(core->owner)) {
4023 		free_clk(clk);
4024 		return ERR_PTR(-ENOENT);
4025 	}
4026 
4027 	kref_get(&core->ref);
4028 	clk_core_link_consumer(core, clk);
4029 
4030 	return clk;
4031 }
4032 
4033 /**
4034  * clk_hw_get_clk - get clk consumer given an clk_hw
4035  * @hw: clk_hw associated with the clk being consumed
4036  * @con_id: connection ID string on device
4037  *
4038  * Returns: new clk consumer
4039  * This is the function to be used by providers which need
4040  * to get a consumer clk and act on the clock element
4041  * Calls to this function must be balanced with calls clk_put()
4042  */
4043 struct clk *clk_hw_get_clk(struct clk_hw *hw, const char *con_id)
4044 {
4045 	struct device *dev = hw->core->dev;
4046 	const char *name = dev ? dev_name(dev) : NULL;
4047 
4048 	return clk_hw_create_clk(dev, hw, name, con_id);
4049 }
4050 EXPORT_SYMBOL(clk_hw_get_clk);
4051 
4052 static int clk_cpy_name(const char **dst_p, const char *src, bool must_exist)
4053 {
4054 	const char *dst;
4055 
4056 	if (!src) {
4057 		if (must_exist)
4058 			return -EINVAL;
4059 		return 0;
4060 	}
4061 
4062 	*dst_p = dst = kstrdup_const(src, GFP_KERNEL);
4063 	if (!dst)
4064 		return -ENOMEM;
4065 
4066 	return 0;
4067 }
4068 
4069 static int clk_core_populate_parent_map(struct clk_core *core,
4070 					const struct clk_init_data *init)
4071 {
4072 	u8 num_parents = init->num_parents;
4073 	const char * const *parent_names = init->parent_names;
4074 	const struct clk_hw **parent_hws = init->parent_hws;
4075 	const struct clk_parent_data *parent_data = init->parent_data;
4076 	int i, ret = 0;
4077 	struct clk_parent_map *parents, *parent;
4078 
4079 	if (!num_parents)
4080 		return 0;
4081 
4082 	/*
4083 	 * Avoid unnecessary string look-ups of clk_core's possible parents by
4084 	 * having a cache of names/clk_hw pointers to clk_core pointers.
4085 	 */
4086 	parents = kcalloc(num_parents, sizeof(*parents), GFP_KERNEL);
4087 	core->parents = parents;
4088 	if (!parents)
4089 		return -ENOMEM;
4090 
4091 	/* Copy everything over because it might be __initdata */
4092 	for (i = 0, parent = parents; i < num_parents; i++, parent++) {
4093 		parent->index = -1;
4094 		if (parent_names) {
4095 			/* throw a WARN if any entries are NULL */
4096 			WARN(!parent_names[i],
4097 				"%s: invalid NULL in %s's .parent_names\n",
4098 				__func__, core->name);
4099 			ret = clk_cpy_name(&parent->name, parent_names[i],
4100 					   true);
4101 		} else if (parent_data) {
4102 			parent->hw = parent_data[i].hw;
4103 			parent->index = parent_data[i].index;
4104 			ret = clk_cpy_name(&parent->fw_name,
4105 					   parent_data[i].fw_name, false);
4106 			if (!ret)
4107 				ret = clk_cpy_name(&parent->name,
4108 						   parent_data[i].name,
4109 						   false);
4110 		} else if (parent_hws) {
4111 			parent->hw = parent_hws[i];
4112 		} else {
4113 			ret = -EINVAL;
4114 			WARN(1, "Must specify parents if num_parents > 0\n");
4115 		}
4116 
4117 		if (ret) {
4118 			do {
4119 				kfree_const(parents[i].name);
4120 				kfree_const(parents[i].fw_name);
4121 			} while (--i >= 0);
4122 			kfree(parents);
4123 
4124 			return ret;
4125 		}
4126 	}
4127 
4128 	return 0;
4129 }
4130 
4131 static void clk_core_free_parent_map(struct clk_core *core)
4132 {
4133 	int i = core->num_parents;
4134 
4135 	if (!core->num_parents)
4136 		return;
4137 
4138 	while (--i >= 0) {
4139 		kfree_const(core->parents[i].name);
4140 		kfree_const(core->parents[i].fw_name);
4141 	}
4142 
4143 	kfree(core->parents);
4144 }
4145 
4146 static struct clk *
4147 __clk_register(struct device *dev, struct device_node *np, struct clk_hw *hw)
4148 {
4149 	int ret;
4150 	struct clk_core *core;
4151 	const struct clk_init_data *init = hw->init;
4152 
4153 	/*
4154 	 * The init data is not supposed to be used outside of registration path.
4155 	 * Set it to NULL so that provider drivers can't use it either and so that
4156 	 * we catch use of hw->init early on in the core.
4157 	 */
4158 	hw->init = NULL;
4159 
4160 	core = kzalloc(sizeof(*core), GFP_KERNEL);
4161 	if (!core) {
4162 		ret = -ENOMEM;
4163 		goto fail_out;
4164 	}
4165 
4166 	core->name = kstrdup_const(init->name, GFP_KERNEL);
4167 	if (!core->name) {
4168 		ret = -ENOMEM;
4169 		goto fail_name;
4170 	}
4171 
4172 	if (WARN_ON(!init->ops)) {
4173 		ret = -EINVAL;
4174 		goto fail_ops;
4175 	}
4176 	core->ops = init->ops;
4177 
4178 	if (dev && pm_runtime_enabled(dev))
4179 		core->rpm_enabled = true;
4180 	core->dev = dev;
4181 	core->of_node = np;
4182 	if (dev && dev->driver)
4183 		core->owner = dev->driver->owner;
4184 	core->hw = hw;
4185 	core->flags = init->flags;
4186 	core->num_parents = init->num_parents;
4187 	core->min_rate = 0;
4188 	core->max_rate = ULONG_MAX;
4189 
4190 	ret = clk_core_populate_parent_map(core, init);
4191 	if (ret)
4192 		goto fail_parents;
4193 
4194 	INIT_HLIST_HEAD(&core->clks);
4195 
4196 	/*
4197 	 * Don't call clk_hw_create_clk() here because that would pin the
4198 	 * provider module to itself and prevent it from ever being removed.
4199 	 */
4200 	hw->clk = alloc_clk(core, NULL, NULL);
4201 	if (IS_ERR(hw->clk)) {
4202 		ret = PTR_ERR(hw->clk);
4203 		goto fail_create_clk;
4204 	}
4205 
4206 	clk_core_link_consumer(core, hw->clk);
4207 
4208 	ret = __clk_core_init(core);
4209 	if (!ret)
4210 		return hw->clk;
4211 
4212 	clk_prepare_lock();
4213 	clk_core_unlink_consumer(hw->clk);
4214 	clk_prepare_unlock();
4215 
4216 	free_clk(hw->clk);
4217 	hw->clk = NULL;
4218 
4219 fail_create_clk:
4220 	clk_core_free_parent_map(core);
4221 fail_parents:
4222 fail_ops:
4223 	kfree_const(core->name);
4224 fail_name:
4225 	kfree(core);
4226 fail_out:
4227 	return ERR_PTR(ret);
4228 }
4229 
4230 /**
4231  * dev_or_parent_of_node() - Get device node of @dev or @dev's parent
4232  * @dev: Device to get device node of
4233  *
4234  * Return: device node pointer of @dev, or the device node pointer of
4235  * @dev->parent if dev doesn't have a device node, or NULL if neither
4236  * @dev or @dev->parent have a device node.
4237  */
4238 static struct device_node *dev_or_parent_of_node(struct device *dev)
4239 {
4240 	struct device_node *np;
4241 
4242 	if (!dev)
4243 		return NULL;
4244 
4245 	np = dev_of_node(dev);
4246 	if (!np)
4247 		np = dev_of_node(dev->parent);
4248 
4249 	return np;
4250 }
4251 
4252 /**
4253  * clk_register - allocate a new clock, register it and return an opaque cookie
4254  * @dev: device that is registering this clock
4255  * @hw: link to hardware-specific clock data
4256  *
4257  * clk_register is the *deprecated* interface for populating the clock tree with
4258  * new clock nodes. Use clk_hw_register() instead.
4259  *
4260  * Returns: a pointer to the newly allocated struct clk which
4261  * cannot be dereferenced by driver code but may be used in conjunction with the
4262  * rest of the clock API.  In the event of an error clk_register will return an
4263  * error code; drivers must test for an error code after calling clk_register.
4264  */
4265 struct clk *clk_register(struct device *dev, struct clk_hw *hw)
4266 {
4267 	return __clk_register(dev, dev_or_parent_of_node(dev), hw);
4268 }
4269 EXPORT_SYMBOL_GPL(clk_register);
4270 
4271 /**
4272  * clk_hw_register - register a clk_hw and return an error code
4273  * @dev: device that is registering this clock
4274  * @hw: link to hardware-specific clock data
4275  *
4276  * clk_hw_register is the primary interface for populating the clock tree with
4277  * new clock nodes. It returns an integer equal to zero indicating success or
4278  * less than zero indicating failure. Drivers must test for an error code after
4279  * calling clk_hw_register().
4280  */
4281 int clk_hw_register(struct device *dev, struct clk_hw *hw)
4282 {
4283 	return PTR_ERR_OR_ZERO(__clk_register(dev, dev_or_parent_of_node(dev),
4284 			       hw));
4285 }
4286 EXPORT_SYMBOL_GPL(clk_hw_register);
4287 
4288 /*
4289  * of_clk_hw_register - register a clk_hw and return an error code
4290  * @node: device_node of device that is registering this clock
4291  * @hw: link to hardware-specific clock data
4292  *
4293  * of_clk_hw_register() is the primary interface for populating the clock tree
4294  * with new clock nodes when a struct device is not available, but a struct
4295  * device_node is. It returns an integer equal to zero indicating success or
4296  * less than zero indicating failure. Drivers must test for an error code after
4297  * calling of_clk_hw_register().
4298  */
4299 int of_clk_hw_register(struct device_node *node, struct clk_hw *hw)
4300 {
4301 	return PTR_ERR_OR_ZERO(__clk_register(NULL, node, hw));
4302 }
4303 EXPORT_SYMBOL_GPL(of_clk_hw_register);
4304 
4305 /* Free memory allocated for a clock. */
4306 static void __clk_release(struct kref *ref)
4307 {
4308 	struct clk_core *core = container_of(ref, struct clk_core, ref);
4309 
4310 	lockdep_assert_held(&prepare_lock);
4311 
4312 	clk_core_free_parent_map(core);
4313 	kfree_const(core->name);
4314 	kfree(core);
4315 }
4316 
4317 /*
4318  * Empty clk_ops for unregistered clocks. These are used temporarily
4319  * after clk_unregister() was called on a clock and until last clock
4320  * consumer calls clk_put() and the struct clk object is freed.
4321  */
4322 static int clk_nodrv_prepare_enable(struct clk_hw *hw)
4323 {
4324 	return -ENXIO;
4325 }
4326 
4327 static void clk_nodrv_disable_unprepare(struct clk_hw *hw)
4328 {
4329 	WARN_ON_ONCE(1);
4330 }
4331 
4332 static int clk_nodrv_set_rate(struct clk_hw *hw, unsigned long rate,
4333 					unsigned long parent_rate)
4334 {
4335 	return -ENXIO;
4336 }
4337 
4338 static int clk_nodrv_set_parent(struct clk_hw *hw, u8 index)
4339 {
4340 	return -ENXIO;
4341 }
4342 
4343 static int clk_nodrv_determine_rate(struct clk_hw *hw,
4344 				    struct clk_rate_request *req)
4345 {
4346 	return -ENXIO;
4347 }
4348 
4349 static const struct clk_ops clk_nodrv_ops = {
4350 	.enable		= clk_nodrv_prepare_enable,
4351 	.disable	= clk_nodrv_disable_unprepare,
4352 	.prepare	= clk_nodrv_prepare_enable,
4353 	.unprepare	= clk_nodrv_disable_unprepare,
4354 	.determine_rate	= clk_nodrv_determine_rate,
4355 	.set_rate	= clk_nodrv_set_rate,
4356 	.set_parent	= clk_nodrv_set_parent,
4357 };
4358 
4359 static void clk_core_evict_parent_cache_subtree(struct clk_core *root,
4360 						const struct clk_core *target)
4361 {
4362 	int i;
4363 	struct clk_core *child;
4364 
4365 	for (i = 0; i < root->num_parents; i++)
4366 		if (root->parents[i].core == target)
4367 			root->parents[i].core = NULL;
4368 
4369 	hlist_for_each_entry(child, &root->children, child_node)
4370 		clk_core_evict_parent_cache_subtree(child, target);
4371 }
4372 
4373 /* Remove this clk from all parent caches */
4374 static void clk_core_evict_parent_cache(struct clk_core *core)
4375 {
4376 	const struct hlist_head **lists;
4377 	struct clk_core *root;
4378 
4379 	lockdep_assert_held(&prepare_lock);
4380 
4381 	for (lists = all_lists; *lists; lists++)
4382 		hlist_for_each_entry(root, *lists, child_node)
4383 			clk_core_evict_parent_cache_subtree(root, core);
4384 
4385 }
4386 
4387 /**
4388  * clk_unregister - unregister a currently registered clock
4389  * @clk: clock to unregister
4390  */
4391 void clk_unregister(struct clk *clk)
4392 {
4393 	unsigned long flags;
4394 	const struct clk_ops *ops;
4395 
4396 	if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
4397 		return;
4398 
4399 	clk_debug_unregister(clk->core);
4400 
4401 	clk_prepare_lock();
4402 
4403 	ops = clk->core->ops;
4404 	if (ops == &clk_nodrv_ops) {
4405 		pr_err("%s: unregistered clock: %s\n", __func__,
4406 		       clk->core->name);
4407 		goto unlock;
4408 	}
4409 	/*
4410 	 * Assign empty clock ops for consumers that might still hold
4411 	 * a reference to this clock.
4412 	 */
4413 	flags = clk_enable_lock();
4414 	clk->core->ops = &clk_nodrv_ops;
4415 	clk_enable_unlock(flags);
4416 
4417 	if (ops->terminate)
4418 		ops->terminate(clk->core->hw);
4419 
4420 	if (!hlist_empty(&clk->core->children)) {
4421 		struct clk_core *child;
4422 		struct hlist_node *t;
4423 
4424 		/* Reparent all children to the orphan list. */
4425 		hlist_for_each_entry_safe(child, t, &clk->core->children,
4426 					  child_node)
4427 			clk_core_set_parent_nolock(child, NULL);
4428 	}
4429 
4430 	clk_core_evict_parent_cache(clk->core);
4431 
4432 	hlist_del_init(&clk->core->child_node);
4433 
4434 	if (clk->core->prepare_count)
4435 		pr_warn("%s: unregistering prepared clock: %s\n",
4436 					__func__, clk->core->name);
4437 
4438 	if (clk->core->protect_count)
4439 		pr_warn("%s: unregistering protected clock: %s\n",
4440 					__func__, clk->core->name);
4441 
4442 	kref_put(&clk->core->ref, __clk_release);
4443 	free_clk(clk);
4444 unlock:
4445 	clk_prepare_unlock();
4446 }
4447 EXPORT_SYMBOL_GPL(clk_unregister);
4448 
4449 /**
4450  * clk_hw_unregister - unregister a currently registered clk_hw
4451  * @hw: hardware-specific clock data to unregister
4452  */
4453 void clk_hw_unregister(struct clk_hw *hw)
4454 {
4455 	clk_unregister(hw->clk);
4456 }
4457 EXPORT_SYMBOL_GPL(clk_hw_unregister);
4458 
4459 static void devm_clk_unregister_cb(struct device *dev, void *res)
4460 {
4461 	clk_unregister(*(struct clk **)res);
4462 }
4463 
4464 static void devm_clk_hw_unregister_cb(struct device *dev, void *res)
4465 {
4466 	clk_hw_unregister(*(struct clk_hw **)res);
4467 }
4468 
4469 /**
4470  * devm_clk_register - resource managed clk_register()
4471  * @dev: device that is registering this clock
4472  * @hw: link to hardware-specific clock data
4473  *
4474  * Managed clk_register(). This function is *deprecated*, use devm_clk_hw_register() instead.
4475  *
4476  * Clocks returned from this function are automatically clk_unregister()ed on
4477  * driver detach. See clk_register() for more information.
4478  */
4479 struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw)
4480 {
4481 	struct clk *clk;
4482 	struct clk **clkp;
4483 
4484 	clkp = devres_alloc(devm_clk_unregister_cb, sizeof(*clkp), GFP_KERNEL);
4485 	if (!clkp)
4486 		return ERR_PTR(-ENOMEM);
4487 
4488 	clk = clk_register(dev, hw);
4489 	if (!IS_ERR(clk)) {
4490 		*clkp = clk;
4491 		devres_add(dev, clkp);
4492 	} else {
4493 		devres_free(clkp);
4494 	}
4495 
4496 	return clk;
4497 }
4498 EXPORT_SYMBOL_GPL(devm_clk_register);
4499 
4500 /**
4501  * devm_clk_hw_register - resource managed clk_hw_register()
4502  * @dev: device that is registering this clock
4503  * @hw: link to hardware-specific clock data
4504  *
4505  * Managed clk_hw_register(). Clocks registered by this function are
4506  * automatically clk_hw_unregister()ed on driver detach. See clk_hw_register()
4507  * for more information.
4508  */
4509 int devm_clk_hw_register(struct device *dev, struct clk_hw *hw)
4510 {
4511 	struct clk_hw **hwp;
4512 	int ret;
4513 
4514 	hwp = devres_alloc(devm_clk_hw_unregister_cb, sizeof(*hwp), GFP_KERNEL);
4515 	if (!hwp)
4516 		return -ENOMEM;
4517 
4518 	ret = clk_hw_register(dev, hw);
4519 	if (!ret) {
4520 		*hwp = hw;
4521 		devres_add(dev, hwp);
4522 	} else {
4523 		devres_free(hwp);
4524 	}
4525 
4526 	return ret;
4527 }
4528 EXPORT_SYMBOL_GPL(devm_clk_hw_register);
4529 
4530 static void devm_clk_release(struct device *dev, void *res)
4531 {
4532 	clk_put(*(struct clk **)res);
4533 }
4534 
4535 /**
4536  * devm_clk_hw_get_clk - resource managed clk_hw_get_clk()
4537  * @dev: device that is registering this clock
4538  * @hw: clk_hw associated with the clk being consumed
4539  * @con_id: connection ID string on device
4540  *
4541  * Managed clk_hw_get_clk(). Clocks got with this function are
4542  * automatically clk_put() on driver detach. See clk_put()
4543  * for more information.
4544  */
4545 struct clk *devm_clk_hw_get_clk(struct device *dev, struct clk_hw *hw,
4546 				const char *con_id)
4547 {
4548 	struct clk *clk;
4549 	struct clk **clkp;
4550 
4551 	/* This should not happen because it would mean we have drivers
4552 	 * passing around clk_hw pointers instead of having the caller use
4553 	 * proper clk_get() style APIs
4554 	 */
4555 	WARN_ON_ONCE(dev != hw->core->dev);
4556 
4557 	clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL);
4558 	if (!clkp)
4559 		return ERR_PTR(-ENOMEM);
4560 
4561 	clk = clk_hw_get_clk(hw, con_id);
4562 	if (!IS_ERR(clk)) {
4563 		*clkp = clk;
4564 		devres_add(dev, clkp);
4565 	} else {
4566 		devres_free(clkp);
4567 	}
4568 
4569 	return clk;
4570 }
4571 EXPORT_SYMBOL_GPL(devm_clk_hw_get_clk);
4572 
4573 /*
4574  * clkdev helpers
4575  */
4576 
4577 void __clk_put(struct clk *clk)
4578 {
4579 	struct module *owner;
4580 
4581 	if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
4582 		return;
4583 
4584 	clk_prepare_lock();
4585 
4586 	/*
4587 	 * Before calling clk_put, all calls to clk_rate_exclusive_get() from a
4588 	 * given user should be balanced with calls to clk_rate_exclusive_put()
4589 	 * and by that same consumer
4590 	 */
4591 	if (WARN_ON(clk->exclusive_count)) {
4592 		/* We voiced our concern, let's sanitize the situation */
4593 		clk->core->protect_count -= (clk->exclusive_count - 1);
4594 		clk_core_rate_unprotect(clk->core);
4595 		clk->exclusive_count = 0;
4596 	}
4597 
4598 	hlist_del(&clk->clks_node);
4599 
4600 	/* If we had any boundaries on that clock, let's drop them. */
4601 	if (clk->min_rate > 0 || clk->max_rate < ULONG_MAX)
4602 		clk_set_rate_range_nolock(clk, 0, ULONG_MAX);
4603 
4604 	owner = clk->core->owner;
4605 	kref_put(&clk->core->ref, __clk_release);
4606 
4607 	clk_prepare_unlock();
4608 
4609 	module_put(owner);
4610 
4611 	free_clk(clk);
4612 }
4613 
4614 /***        clk rate change notifiers        ***/
4615 
4616 /**
4617  * clk_notifier_register - add a clk rate change notifier
4618  * @clk: struct clk * to watch
4619  * @nb: struct notifier_block * with callback info
4620  *
4621  * Request notification when clk's rate changes.  This uses an SRCU
4622  * notifier because we want it to block and notifier unregistrations are
4623  * uncommon.  The callbacks associated with the notifier must not
4624  * re-enter into the clk framework by calling any top-level clk APIs;
4625  * this will cause a nested prepare_lock mutex.
4626  *
4627  * In all notification cases (pre, post and abort rate change) the original
4628  * clock rate is passed to the callback via struct clk_notifier_data.old_rate
4629  * and the new frequency is passed via struct clk_notifier_data.new_rate.
4630  *
4631  * clk_notifier_register() must be called from non-atomic context.
4632  * Returns -EINVAL if called with null arguments, -ENOMEM upon
4633  * allocation failure; otherwise, passes along the return value of
4634  * srcu_notifier_chain_register().
4635  */
4636 int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
4637 {
4638 	struct clk_notifier *cn;
4639 	int ret = -ENOMEM;
4640 
4641 	if (!clk || !nb)
4642 		return -EINVAL;
4643 
4644 	clk_prepare_lock();
4645 
4646 	/* search the list of notifiers for this clk */
4647 	list_for_each_entry(cn, &clk_notifier_list, node)
4648 		if (cn->clk == clk)
4649 			goto found;
4650 
4651 	/* if clk wasn't in the notifier list, allocate new clk_notifier */
4652 	cn = kzalloc(sizeof(*cn), GFP_KERNEL);
4653 	if (!cn)
4654 		goto out;
4655 
4656 	cn->clk = clk;
4657 	srcu_init_notifier_head(&cn->notifier_head);
4658 
4659 	list_add(&cn->node, &clk_notifier_list);
4660 
4661 found:
4662 	ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
4663 
4664 	clk->core->notifier_count++;
4665 
4666 out:
4667 	clk_prepare_unlock();
4668 
4669 	return ret;
4670 }
4671 EXPORT_SYMBOL_GPL(clk_notifier_register);
4672 
4673 /**
4674  * clk_notifier_unregister - remove a clk rate change notifier
4675  * @clk: struct clk *
4676  * @nb: struct notifier_block * with callback info
4677  *
4678  * Request no further notification for changes to 'clk' and frees memory
4679  * allocated in clk_notifier_register.
4680  *
4681  * Returns -EINVAL if called with null arguments; otherwise, passes
4682  * along the return value of srcu_notifier_chain_unregister().
4683  */
4684 int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
4685 {
4686 	struct clk_notifier *cn;
4687 	int ret = -ENOENT;
4688 
4689 	if (!clk || !nb)
4690 		return -EINVAL;
4691 
4692 	clk_prepare_lock();
4693 
4694 	list_for_each_entry(cn, &clk_notifier_list, node) {
4695 		if (cn->clk == clk) {
4696 			ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
4697 
4698 			clk->core->notifier_count--;
4699 
4700 			/* XXX the notifier code should handle this better */
4701 			if (!cn->notifier_head.head) {
4702 				srcu_cleanup_notifier_head(&cn->notifier_head);
4703 				list_del(&cn->node);
4704 				kfree(cn);
4705 			}
4706 			break;
4707 		}
4708 	}
4709 
4710 	clk_prepare_unlock();
4711 
4712 	return ret;
4713 }
4714 EXPORT_SYMBOL_GPL(clk_notifier_unregister);
4715 
4716 struct clk_notifier_devres {
4717 	struct clk *clk;
4718 	struct notifier_block *nb;
4719 };
4720 
4721 static void devm_clk_notifier_release(struct device *dev, void *res)
4722 {
4723 	struct clk_notifier_devres *devres = res;
4724 
4725 	clk_notifier_unregister(devres->clk, devres->nb);
4726 }
4727 
4728 int devm_clk_notifier_register(struct device *dev, struct clk *clk,
4729 			       struct notifier_block *nb)
4730 {
4731 	struct clk_notifier_devres *devres;
4732 	int ret;
4733 
4734 	devres = devres_alloc(devm_clk_notifier_release,
4735 			      sizeof(*devres), GFP_KERNEL);
4736 
4737 	if (!devres)
4738 		return -ENOMEM;
4739 
4740 	ret = clk_notifier_register(clk, nb);
4741 	if (!ret) {
4742 		devres->clk = clk;
4743 		devres->nb = nb;
4744 		devres_add(dev, devres);
4745 	} else {
4746 		devres_free(devres);
4747 	}
4748 
4749 	return ret;
4750 }
4751 EXPORT_SYMBOL_GPL(devm_clk_notifier_register);
4752 
4753 #ifdef CONFIG_OF
4754 static void clk_core_reparent_orphans(void)
4755 {
4756 	clk_prepare_lock();
4757 	clk_core_reparent_orphans_nolock();
4758 	clk_prepare_unlock();
4759 }
4760 
4761 /**
4762  * struct of_clk_provider - Clock provider registration structure
4763  * @link: Entry in global list of clock providers
4764  * @node: Pointer to device tree node of clock provider
4765  * @get: Get clock callback.  Returns NULL or a struct clk for the
4766  *       given clock specifier
4767  * @get_hw: Get clk_hw callback.  Returns NULL, ERR_PTR or a
4768  *       struct clk_hw for the given clock specifier
4769  * @data: context pointer to be passed into @get callback
4770  */
4771 struct of_clk_provider {
4772 	struct list_head link;
4773 
4774 	struct device_node *node;
4775 	struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
4776 	struct clk_hw *(*get_hw)(struct of_phandle_args *clkspec, void *data);
4777 	void *data;
4778 };
4779 
4780 extern struct of_device_id __clk_of_table;
4781 static const struct of_device_id __clk_of_table_sentinel
4782 	__used __section("__clk_of_table_end");
4783 
4784 static LIST_HEAD(of_clk_providers);
4785 static DEFINE_MUTEX(of_clk_mutex);
4786 
4787 struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
4788 				     void *data)
4789 {
4790 	return data;
4791 }
4792 EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
4793 
4794 struct clk_hw *of_clk_hw_simple_get(struct of_phandle_args *clkspec, void *data)
4795 {
4796 	return data;
4797 }
4798 EXPORT_SYMBOL_GPL(of_clk_hw_simple_get);
4799 
4800 struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data)
4801 {
4802 	struct clk_onecell_data *clk_data = data;
4803 	unsigned int idx = clkspec->args[0];
4804 
4805 	if (idx >= clk_data->clk_num) {
4806 		pr_err("%s: invalid clock index %u\n", __func__, idx);
4807 		return ERR_PTR(-EINVAL);
4808 	}
4809 
4810 	return clk_data->clks[idx];
4811 }
4812 EXPORT_SYMBOL_GPL(of_clk_src_onecell_get);
4813 
4814 struct clk_hw *
4815 of_clk_hw_onecell_get(struct of_phandle_args *clkspec, void *data)
4816 {
4817 	struct clk_hw_onecell_data *hw_data = data;
4818 	unsigned int idx = clkspec->args[0];
4819 
4820 	if (idx >= hw_data->num) {
4821 		pr_err("%s: invalid index %u\n", __func__, idx);
4822 		return ERR_PTR(-EINVAL);
4823 	}
4824 
4825 	return hw_data->hws[idx];
4826 }
4827 EXPORT_SYMBOL_GPL(of_clk_hw_onecell_get);
4828 
4829 /**
4830  * of_clk_add_provider() - Register a clock provider for a node
4831  * @np: Device node pointer associated with clock provider
4832  * @clk_src_get: callback for decoding clock
4833  * @data: context pointer for @clk_src_get callback.
4834  *
4835  * This function is *deprecated*. Use of_clk_add_hw_provider() instead.
4836  */
4837 int of_clk_add_provider(struct device_node *np,
4838 			struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
4839 						   void *data),
4840 			void *data)
4841 {
4842 	struct of_clk_provider *cp;
4843 	int ret;
4844 
4845 	if (!np)
4846 		return 0;
4847 
4848 	cp = kzalloc(sizeof(*cp), GFP_KERNEL);
4849 	if (!cp)
4850 		return -ENOMEM;
4851 
4852 	cp->node = of_node_get(np);
4853 	cp->data = data;
4854 	cp->get = clk_src_get;
4855 
4856 	mutex_lock(&of_clk_mutex);
4857 	list_add(&cp->link, &of_clk_providers);
4858 	mutex_unlock(&of_clk_mutex);
4859 	pr_debug("Added clock from %pOF\n", np);
4860 
4861 	clk_core_reparent_orphans();
4862 
4863 	ret = of_clk_set_defaults(np, true);
4864 	if (ret < 0)
4865 		of_clk_del_provider(np);
4866 
4867 	fwnode_dev_initialized(&np->fwnode, true);
4868 
4869 	return ret;
4870 }
4871 EXPORT_SYMBOL_GPL(of_clk_add_provider);
4872 
4873 /**
4874  * of_clk_add_hw_provider() - Register a clock provider for a node
4875  * @np: Device node pointer associated with clock provider
4876  * @get: callback for decoding clk_hw
4877  * @data: context pointer for @get callback.
4878  */
4879 int of_clk_add_hw_provider(struct device_node *np,
4880 			   struct clk_hw *(*get)(struct of_phandle_args *clkspec,
4881 						 void *data),
4882 			   void *data)
4883 {
4884 	struct of_clk_provider *cp;
4885 	int ret;
4886 
4887 	if (!np)
4888 		return 0;
4889 
4890 	cp = kzalloc(sizeof(*cp), GFP_KERNEL);
4891 	if (!cp)
4892 		return -ENOMEM;
4893 
4894 	cp->node = of_node_get(np);
4895 	cp->data = data;
4896 	cp->get_hw = get;
4897 
4898 	mutex_lock(&of_clk_mutex);
4899 	list_add(&cp->link, &of_clk_providers);
4900 	mutex_unlock(&of_clk_mutex);
4901 	pr_debug("Added clk_hw provider from %pOF\n", np);
4902 
4903 	clk_core_reparent_orphans();
4904 
4905 	ret = of_clk_set_defaults(np, true);
4906 	if (ret < 0)
4907 		of_clk_del_provider(np);
4908 
4909 	fwnode_dev_initialized(&np->fwnode, true);
4910 
4911 	return ret;
4912 }
4913 EXPORT_SYMBOL_GPL(of_clk_add_hw_provider);
4914 
4915 static void devm_of_clk_release_provider(struct device *dev, void *res)
4916 {
4917 	of_clk_del_provider(*(struct device_node **)res);
4918 }
4919 
4920 /*
4921  * We allow a child device to use its parent device as the clock provider node
4922  * for cases like MFD sub-devices where the child device driver wants to use
4923  * devm_*() APIs but not list the device in DT as a sub-node.
4924  */
4925 static struct device_node *get_clk_provider_node(struct device *dev)
4926 {
4927 	struct device_node *np, *parent_np;
4928 
4929 	np = dev->of_node;
4930 	parent_np = dev->parent ? dev->parent->of_node : NULL;
4931 
4932 	if (!of_property_present(np, "#clock-cells"))
4933 		if (of_property_present(parent_np, "#clock-cells"))
4934 			np = parent_np;
4935 
4936 	return np;
4937 }
4938 
4939 /**
4940  * devm_of_clk_add_hw_provider() - Managed clk provider node registration
4941  * @dev: Device acting as the clock provider (used for DT node and lifetime)
4942  * @get: callback for decoding clk_hw
4943  * @data: context pointer for @get callback
4944  *
4945  * Registers clock provider for given device's node. If the device has no DT
4946  * node or if the device node lacks of clock provider information (#clock-cells)
4947  * then the parent device's node is scanned for this information. If parent node
4948  * has the #clock-cells then it is used in registration. Provider is
4949  * automatically released at device exit.
4950  *
4951  * Return: 0 on success or an errno on failure.
4952  */
4953 int devm_of_clk_add_hw_provider(struct device *dev,
4954 			struct clk_hw *(*get)(struct of_phandle_args *clkspec,
4955 					      void *data),
4956 			void *data)
4957 {
4958 	struct device_node **ptr, *np;
4959 	int ret;
4960 
4961 	ptr = devres_alloc(devm_of_clk_release_provider, sizeof(*ptr),
4962 			   GFP_KERNEL);
4963 	if (!ptr)
4964 		return -ENOMEM;
4965 
4966 	np = get_clk_provider_node(dev);
4967 	ret = of_clk_add_hw_provider(np, get, data);
4968 	if (!ret) {
4969 		*ptr = np;
4970 		devres_add(dev, ptr);
4971 	} else {
4972 		devres_free(ptr);
4973 	}
4974 
4975 	return ret;
4976 }
4977 EXPORT_SYMBOL_GPL(devm_of_clk_add_hw_provider);
4978 
4979 /**
4980  * of_clk_del_provider() - Remove a previously registered clock provider
4981  * @np: Device node pointer associated with clock provider
4982  */
4983 void of_clk_del_provider(struct device_node *np)
4984 {
4985 	struct of_clk_provider *cp;
4986 
4987 	if (!np)
4988 		return;
4989 
4990 	mutex_lock(&of_clk_mutex);
4991 	list_for_each_entry(cp, &of_clk_providers, link) {
4992 		if (cp->node == np) {
4993 			list_del(&cp->link);
4994 			fwnode_dev_initialized(&np->fwnode, false);
4995 			of_node_put(cp->node);
4996 			kfree(cp);
4997 			break;
4998 		}
4999 	}
5000 	mutex_unlock(&of_clk_mutex);
5001 }
5002 EXPORT_SYMBOL_GPL(of_clk_del_provider);
5003 
5004 /**
5005  * of_parse_clkspec() - Parse a DT clock specifier for a given device node
5006  * @np: device node to parse clock specifier from
5007  * @index: index of phandle to parse clock out of. If index < 0, @name is used
5008  * @name: clock name to find and parse. If name is NULL, the index is used
5009  * @out_args: Result of parsing the clock specifier
5010  *
5011  * Parses a device node's "clocks" and "clock-names" properties to find the
5012  * phandle and cells for the index or name that is desired. The resulting clock
5013  * specifier is placed into @out_args, or an errno is returned when there's a
5014  * parsing error. The @index argument is ignored if @name is non-NULL.
5015  *
5016  * Example:
5017  *
5018  * phandle1: clock-controller@1 {
5019  *	#clock-cells = <2>;
5020  * }
5021  *
5022  * phandle2: clock-controller@2 {
5023  *	#clock-cells = <1>;
5024  * }
5025  *
5026  * clock-consumer@3 {
5027  *	clocks = <&phandle1 1 2 &phandle2 3>;
5028  *	clock-names = "name1", "name2";
5029  * }
5030  *
5031  * To get a device_node for `clock-controller@2' node you may call this
5032  * function a few different ways:
5033  *
5034  *   of_parse_clkspec(clock-consumer@3, -1, "name2", &args);
5035  *   of_parse_clkspec(clock-consumer@3, 1, NULL, &args);
5036  *   of_parse_clkspec(clock-consumer@3, 1, "name2", &args);
5037  *
5038  * Return: 0 upon successfully parsing the clock specifier. Otherwise, -ENOENT
5039  * if @name is NULL or -EINVAL if @name is non-NULL and it can't be found in
5040  * the "clock-names" property of @np.
5041  */
5042 static int of_parse_clkspec(const struct device_node *np, int index,
5043 			    const char *name, struct of_phandle_args *out_args)
5044 {
5045 	int ret = -ENOENT;
5046 
5047 	/* Walk up the tree of devices looking for a clock property that matches */
5048 	while (np) {
5049 		/*
5050 		 * For named clocks, first look up the name in the
5051 		 * "clock-names" property.  If it cannot be found, then index
5052 		 * will be an error code and of_parse_phandle_with_args() will
5053 		 * return -EINVAL.
5054 		 */
5055 		if (name)
5056 			index = of_property_match_string(np, "clock-names", name);
5057 		ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells",
5058 						 index, out_args);
5059 		if (!ret)
5060 			break;
5061 		if (name && index >= 0)
5062 			break;
5063 
5064 		/*
5065 		 * No matching clock found on this node.  If the parent node
5066 		 * has a "clock-ranges" property, then we can try one of its
5067 		 * clocks.
5068 		 */
5069 		np = np->parent;
5070 		if (np && !of_get_property(np, "clock-ranges", NULL))
5071 			break;
5072 		index = 0;
5073 	}
5074 
5075 	return ret;
5076 }
5077 
5078 static struct clk_hw *
5079 __of_clk_get_hw_from_provider(struct of_clk_provider *provider,
5080 			      struct of_phandle_args *clkspec)
5081 {
5082 	struct clk *clk;
5083 
5084 	if (provider->get_hw)
5085 		return provider->get_hw(clkspec, provider->data);
5086 
5087 	clk = provider->get(clkspec, provider->data);
5088 	if (IS_ERR(clk))
5089 		return ERR_CAST(clk);
5090 	return __clk_get_hw(clk);
5091 }
5092 
5093 static struct clk_hw *
5094 of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec)
5095 {
5096 	struct of_clk_provider *provider;
5097 	struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER);
5098 
5099 	if (!clkspec)
5100 		return ERR_PTR(-EINVAL);
5101 
5102 	mutex_lock(&of_clk_mutex);
5103 	list_for_each_entry(provider, &of_clk_providers, link) {
5104 		if (provider->node == clkspec->np) {
5105 			hw = __of_clk_get_hw_from_provider(provider, clkspec);
5106 			if (!IS_ERR(hw))
5107 				break;
5108 		}
5109 	}
5110 	mutex_unlock(&of_clk_mutex);
5111 
5112 	return hw;
5113 }
5114 
5115 /**
5116  * of_clk_get_from_provider() - Lookup a clock from a clock provider
5117  * @clkspec: pointer to a clock specifier data structure
5118  *
5119  * This function looks up a struct clk from the registered list of clock
5120  * providers, an input is a clock specifier data structure as returned
5121  * from the of_parse_phandle_with_args() function call.
5122  */
5123 struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
5124 {
5125 	struct clk_hw *hw = of_clk_get_hw_from_clkspec(clkspec);
5126 
5127 	return clk_hw_create_clk(NULL, hw, NULL, __func__);
5128 }
5129 EXPORT_SYMBOL_GPL(of_clk_get_from_provider);
5130 
5131 struct clk_hw *of_clk_get_hw(struct device_node *np, int index,
5132 			     const char *con_id)
5133 {
5134 	int ret;
5135 	struct clk_hw *hw;
5136 	struct of_phandle_args clkspec;
5137 
5138 	ret = of_parse_clkspec(np, index, con_id, &clkspec);
5139 	if (ret)
5140 		return ERR_PTR(ret);
5141 
5142 	hw = of_clk_get_hw_from_clkspec(&clkspec);
5143 	of_node_put(clkspec.np);
5144 
5145 	return hw;
5146 }
5147 
5148 static struct clk *__of_clk_get(struct device_node *np,
5149 				int index, const char *dev_id,
5150 				const char *con_id)
5151 {
5152 	struct clk_hw *hw = of_clk_get_hw(np, index, con_id);
5153 
5154 	return clk_hw_create_clk(NULL, hw, dev_id, con_id);
5155 }
5156 
5157 struct clk *of_clk_get(struct device_node *np, int index)
5158 {
5159 	return __of_clk_get(np, index, np->full_name, NULL);
5160 }
5161 EXPORT_SYMBOL(of_clk_get);
5162 
5163 /**
5164  * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node
5165  * @np: pointer to clock consumer node
5166  * @name: name of consumer's clock input, or NULL for the first clock reference
5167  *
5168  * This function parses the clocks and clock-names properties,
5169  * and uses them to look up the struct clk from the registered list of clock
5170  * providers.
5171  */
5172 struct clk *of_clk_get_by_name(struct device_node *np, const char *name)
5173 {
5174 	if (!np)
5175 		return ERR_PTR(-ENOENT);
5176 
5177 	return __of_clk_get(np, 0, np->full_name, name);
5178 }
5179 EXPORT_SYMBOL(of_clk_get_by_name);
5180 
5181 /**
5182  * of_clk_get_parent_count() - Count the number of clocks a device node has
5183  * @np: device node to count
5184  *
5185  * Returns: The number of clocks that are possible parents of this node
5186  */
5187 unsigned int of_clk_get_parent_count(const struct device_node *np)
5188 {
5189 	int count;
5190 
5191 	count = of_count_phandle_with_args(np, "clocks", "#clock-cells");
5192 	if (count < 0)
5193 		return 0;
5194 
5195 	return count;
5196 }
5197 EXPORT_SYMBOL_GPL(of_clk_get_parent_count);
5198 
5199 const char *of_clk_get_parent_name(const struct device_node *np, int index)
5200 {
5201 	struct of_phandle_args clkspec;
5202 	struct property *prop;
5203 	const char *clk_name;
5204 	const __be32 *vp;
5205 	u32 pv;
5206 	int rc;
5207 	int count;
5208 	struct clk *clk;
5209 
5210 	rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
5211 					&clkspec);
5212 	if (rc)
5213 		return NULL;
5214 
5215 	index = clkspec.args_count ? clkspec.args[0] : 0;
5216 	count = 0;
5217 
5218 	/* if there is an indices property, use it to transfer the index
5219 	 * specified into an array offset for the clock-output-names property.
5220 	 */
5221 	of_property_for_each_u32(clkspec.np, "clock-indices", prop, vp, pv) {
5222 		if (index == pv) {
5223 			index = count;
5224 			break;
5225 		}
5226 		count++;
5227 	}
5228 	/* We went off the end of 'clock-indices' without finding it */
5229 	if (prop && !vp)
5230 		return NULL;
5231 
5232 	if (of_property_read_string_index(clkspec.np, "clock-output-names",
5233 					  index,
5234 					  &clk_name) < 0) {
5235 		/*
5236 		 * Best effort to get the name if the clock has been
5237 		 * registered with the framework. If the clock isn't
5238 		 * registered, we return the node name as the name of
5239 		 * the clock as long as #clock-cells = 0.
5240 		 */
5241 		clk = of_clk_get_from_provider(&clkspec);
5242 		if (IS_ERR(clk)) {
5243 			if (clkspec.args_count == 0)
5244 				clk_name = clkspec.np->name;
5245 			else
5246 				clk_name = NULL;
5247 		} else {
5248 			clk_name = __clk_get_name(clk);
5249 			clk_put(clk);
5250 		}
5251 	}
5252 
5253 
5254 	of_node_put(clkspec.np);
5255 	return clk_name;
5256 }
5257 EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
5258 
5259 /**
5260  * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
5261  * number of parents
5262  * @np: Device node pointer associated with clock provider
5263  * @parents: pointer to char array that hold the parents' names
5264  * @size: size of the @parents array
5265  *
5266  * Return: number of parents for the clock node.
5267  */
5268 int of_clk_parent_fill(struct device_node *np, const char **parents,
5269 		       unsigned int size)
5270 {
5271 	unsigned int i = 0;
5272 
5273 	while (i < size && (parents[i] = of_clk_get_parent_name(np, i)) != NULL)
5274 		i++;
5275 
5276 	return i;
5277 }
5278 EXPORT_SYMBOL_GPL(of_clk_parent_fill);
5279 
5280 struct clock_provider {
5281 	void (*clk_init_cb)(struct device_node *);
5282 	struct device_node *np;
5283 	struct list_head node;
5284 };
5285 
5286 /*
5287  * This function looks for a parent clock. If there is one, then it
5288  * checks that the provider for this parent clock was initialized, in
5289  * this case the parent clock will be ready.
5290  */
5291 static int parent_ready(struct device_node *np)
5292 {
5293 	int i = 0;
5294 
5295 	while (true) {
5296 		struct clk *clk = of_clk_get(np, i);
5297 
5298 		/* this parent is ready we can check the next one */
5299 		if (!IS_ERR(clk)) {
5300 			clk_put(clk);
5301 			i++;
5302 			continue;
5303 		}
5304 
5305 		/* at least one parent is not ready, we exit now */
5306 		if (PTR_ERR(clk) == -EPROBE_DEFER)
5307 			return 0;
5308 
5309 		/*
5310 		 * Here we make assumption that the device tree is
5311 		 * written correctly. So an error means that there is
5312 		 * no more parent. As we didn't exit yet, then the
5313 		 * previous parent are ready. If there is no clock
5314 		 * parent, no need to wait for them, then we can
5315 		 * consider their absence as being ready
5316 		 */
5317 		return 1;
5318 	}
5319 }
5320 
5321 /**
5322  * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree
5323  * @np: Device node pointer associated with clock provider
5324  * @index: clock index
5325  * @flags: pointer to top-level framework flags
5326  *
5327  * Detects if the clock-critical property exists and, if so, sets the
5328  * corresponding CLK_IS_CRITICAL flag.
5329  *
5330  * Do not use this function. It exists only for legacy Device Tree
5331  * bindings, such as the one-clock-per-node style that are outdated.
5332  * Those bindings typically put all clock data into .dts and the Linux
5333  * driver has no clock data, thus making it impossible to set this flag
5334  * correctly from the driver. Only those drivers may call
5335  * of_clk_detect_critical from their setup functions.
5336  *
5337  * Return: error code or zero on success
5338  */
5339 int of_clk_detect_critical(struct device_node *np, int index,
5340 			   unsigned long *flags)
5341 {
5342 	struct property *prop;
5343 	const __be32 *cur;
5344 	uint32_t idx;
5345 
5346 	if (!np || !flags)
5347 		return -EINVAL;
5348 
5349 	of_property_for_each_u32(np, "clock-critical", prop, cur, idx)
5350 		if (index == idx)
5351 			*flags |= CLK_IS_CRITICAL;
5352 
5353 	return 0;
5354 }
5355 
5356 /**
5357  * of_clk_init() - Scan and init clock providers from the DT
5358  * @matches: array of compatible values and init functions for providers.
5359  *
5360  * This function scans the device tree for matching clock providers
5361  * and calls their initialization functions. It also does it by trying
5362  * to follow the dependencies.
5363  */
5364 void __init of_clk_init(const struct of_device_id *matches)
5365 {
5366 	const struct of_device_id *match;
5367 	struct device_node *np;
5368 	struct clock_provider *clk_provider, *next;
5369 	bool is_init_done;
5370 	bool force = false;
5371 	LIST_HEAD(clk_provider_list);
5372 
5373 	if (!matches)
5374 		matches = &__clk_of_table;
5375 
5376 	/* First prepare the list of the clocks providers */
5377 	for_each_matching_node_and_match(np, matches, &match) {
5378 		struct clock_provider *parent;
5379 
5380 		if (!of_device_is_available(np))
5381 			continue;
5382 
5383 		parent = kzalloc(sizeof(*parent), GFP_KERNEL);
5384 		if (!parent) {
5385 			list_for_each_entry_safe(clk_provider, next,
5386 						 &clk_provider_list, node) {
5387 				list_del(&clk_provider->node);
5388 				of_node_put(clk_provider->np);
5389 				kfree(clk_provider);
5390 			}
5391 			of_node_put(np);
5392 			return;
5393 		}
5394 
5395 		parent->clk_init_cb = match->data;
5396 		parent->np = of_node_get(np);
5397 		list_add_tail(&parent->node, &clk_provider_list);
5398 	}
5399 
5400 	while (!list_empty(&clk_provider_list)) {
5401 		is_init_done = false;
5402 		list_for_each_entry_safe(clk_provider, next,
5403 					&clk_provider_list, node) {
5404 			if (force || parent_ready(clk_provider->np)) {
5405 
5406 				/* Don't populate platform devices */
5407 				of_node_set_flag(clk_provider->np,
5408 						 OF_POPULATED);
5409 
5410 				clk_provider->clk_init_cb(clk_provider->np);
5411 				of_clk_set_defaults(clk_provider->np, true);
5412 
5413 				list_del(&clk_provider->node);
5414 				of_node_put(clk_provider->np);
5415 				kfree(clk_provider);
5416 				is_init_done = true;
5417 			}
5418 		}
5419 
5420 		/*
5421 		 * We didn't manage to initialize any of the
5422 		 * remaining providers during the last loop, so now we
5423 		 * initialize all the remaining ones unconditionally
5424 		 * in case the clock parent was not mandatory
5425 		 */
5426 		if (!is_init_done)
5427 			force = true;
5428 	}
5429 }
5430 #endif
5431