xref: /linux/drivers/clk/clk-pwm.c (revision c0e297dc61f8d4453e07afbea1fa8d0e67cd4a34)
1 /*
2  * Copyright (C) 2014 Philipp Zabel, Pengutronix
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  *
8  * PWM (mis)used as clock output
9  */
10 #include <linux/clk-provider.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/of.h>
14 #include <linux/platform_device.h>
15 #include <linux/pwm.h>
16 
17 struct clk_pwm {
18 	struct clk_hw hw;
19 	struct pwm_device *pwm;
20 	u32 fixed_rate;
21 };
22 
23 static inline struct clk_pwm *to_clk_pwm(struct clk_hw *hw)
24 {
25 	return container_of(hw, struct clk_pwm, hw);
26 }
27 
28 static int clk_pwm_prepare(struct clk_hw *hw)
29 {
30 	struct clk_pwm *clk_pwm = to_clk_pwm(hw);
31 
32 	return pwm_enable(clk_pwm->pwm);
33 }
34 
35 static void clk_pwm_unprepare(struct clk_hw *hw)
36 {
37 	struct clk_pwm *clk_pwm = to_clk_pwm(hw);
38 
39 	pwm_disable(clk_pwm->pwm);
40 }
41 
42 static unsigned long clk_pwm_recalc_rate(struct clk_hw *hw,
43 					 unsigned long parent_rate)
44 {
45 	struct clk_pwm *clk_pwm = to_clk_pwm(hw);
46 
47 	return clk_pwm->fixed_rate;
48 }
49 
50 static const struct clk_ops clk_pwm_ops = {
51 	.prepare = clk_pwm_prepare,
52 	.unprepare = clk_pwm_unprepare,
53 	.recalc_rate = clk_pwm_recalc_rate,
54 };
55 
56 static int clk_pwm_probe(struct platform_device *pdev)
57 {
58 	struct device_node *node = pdev->dev.of_node;
59 	struct clk_init_data init;
60 	struct clk_pwm *clk_pwm;
61 	struct pwm_device *pwm;
62 	const char *clk_name;
63 	struct clk *clk;
64 	int ret;
65 
66 	clk_pwm = devm_kzalloc(&pdev->dev, sizeof(*clk_pwm), GFP_KERNEL);
67 	if (!clk_pwm)
68 		return -ENOMEM;
69 
70 	pwm = devm_pwm_get(&pdev->dev, NULL);
71 	if (IS_ERR(pwm))
72 		return PTR_ERR(pwm);
73 
74 	if (!pwm->period) {
75 		dev_err(&pdev->dev, "invalid PWM period\n");
76 		return -EINVAL;
77 	}
78 
79 	if (of_property_read_u32(node, "clock-frequency", &clk_pwm->fixed_rate))
80 		clk_pwm->fixed_rate = NSEC_PER_SEC / pwm->period;
81 
82 	if (pwm->period != NSEC_PER_SEC / clk_pwm->fixed_rate &&
83 	    pwm->period != DIV_ROUND_UP(NSEC_PER_SEC, clk_pwm->fixed_rate)) {
84 		dev_err(&pdev->dev,
85 			"clock-frequency does not match PWM period\n");
86 		return -EINVAL;
87 	}
88 
89 	ret = pwm_config(pwm, (pwm->period + 1) >> 1, pwm->period);
90 	if (ret < 0)
91 		return ret;
92 
93 	clk_name = node->name;
94 	of_property_read_string(node, "clock-output-names", &clk_name);
95 
96 	init.name = clk_name;
97 	init.ops = &clk_pwm_ops;
98 	init.flags = CLK_IS_BASIC | CLK_IS_ROOT;
99 	init.num_parents = 0;
100 
101 	clk_pwm->pwm = pwm;
102 	clk_pwm->hw.init = &init;
103 	clk = devm_clk_register(&pdev->dev, &clk_pwm->hw);
104 	if (IS_ERR(clk))
105 		return PTR_ERR(clk);
106 
107 	return of_clk_add_provider(node, of_clk_src_simple_get, clk);
108 }
109 
110 static int clk_pwm_remove(struct platform_device *pdev)
111 {
112 	of_clk_del_provider(pdev->dev.of_node);
113 
114 	return 0;
115 }
116 
117 static const struct of_device_id clk_pwm_dt_ids[] = {
118 	{ .compatible = "pwm-clock" },
119 	{ }
120 };
121 MODULE_DEVICE_TABLE(of, clk_pwm_dt_ids);
122 
123 static struct platform_driver clk_pwm_driver = {
124 	.probe = clk_pwm_probe,
125 	.remove = clk_pwm_remove,
126 	.driver = {
127 		.name = "pwm-clock",
128 		.of_match_table = of_match_ptr(clk_pwm_dt_ids),
129 	},
130 };
131 
132 module_platform_driver(clk_pwm_driver);
133 
134 MODULE_AUTHOR("Philipp Zabel <p.zabel@pengutronix.de>");
135 MODULE_DESCRIPTION("PWM clock driver");
136 MODULE_LICENSE("GPL");
137