1 #include <linux/clk.h> 2 #include <linux/clkdev.h> 3 #include <linux/err.h> 4 #include <linux/io.h> 5 #include <linux/clk-provider.h> 6 7 /* 8 * The Nomadik clock tree is described in the STN8815A12 DB V4.2 9 * reference manual for the chip, page 94 ff. 10 */ 11 12 void __init nomadik_clk_init(void) 13 { 14 struct clk *clk; 15 16 clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0); 17 clk_register_clkdev(clk, "apb_pclk", NULL); 18 clk_register_clkdev(clk, NULL, "gpio.0"); 19 clk_register_clkdev(clk, NULL, "gpio.1"); 20 clk_register_clkdev(clk, NULL, "gpio.2"); 21 clk_register_clkdev(clk, NULL, "gpio.3"); 22 clk_register_clkdev(clk, NULL, "rng"); 23 24 /* 25 * The 2.4 MHz TIMCLK reference clock is active at boot time, this is 26 * actually the MXTALCLK @19.2 MHz divided by 8. This clock is used 27 * by the timers and watchdog. See page 105 ff. 28 */ 29 clk = clk_register_fixed_rate(NULL, "TIMCLK", NULL, CLK_IS_ROOT, 30 2400000); 31 clk_register_clkdev(clk, NULL, "mtu0"); 32 clk_register_clkdev(clk, NULL, "mtu1"); 33 34 /* 35 * At boot time, PLL2 is set to generate a set of fixed clocks, 36 * one of them is CLK48, the 48 MHz clock, routed to the UART, MMC/SD 37 * I2C, IrDA, USB and SSP blocks. 38 */ 39 clk = clk_register_fixed_rate(NULL, "CLK48", NULL, CLK_IS_ROOT, 40 48000000); 41 clk_register_clkdev(clk, NULL, "uart0"); 42 clk_register_clkdev(clk, NULL, "uart1"); 43 clk_register_clkdev(clk, NULL, "mmci"); 44 clk_register_clkdev(clk, NULL, "ssp"); 45 clk_register_clkdev(clk, NULL, "nmk-i2c.0"); 46 clk_register_clkdev(clk, NULL, "nmk-i2c.1"); 47 } 48