xref: /linux/drivers/clk/clk-hi655x.c (revision e21f9e2e862e9eb3dd64eaddb6256b3e5098660f)
1 /*
2  * Clock driver for Hi655x
3  *
4  * Copyright (c) 2017, Linaro Ltd.
5  *
6  * Author: Daniel Lezcano <daniel.lezcano@linaro.org>
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms and conditions of the GNU General Public License,
10  * version 2, as published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  */
17 #include <linux/clk-provider.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/regmap.h>
21 #include <linux/slab.h>
22 #include <linux/mfd/core.h>
23 #include <linux/mfd/hi655x-pmic.h>
24 
25 #define HI655X_CLK_BASE	HI655X_BUS_ADDR(0x1c)
26 #define HI655X_CLK_SET	BIT(6)
27 
28 struct hi655x_clk {
29 	struct hi655x_pmic *hi655x;
30 	struct clk_hw       clk_hw;
31 };
32 
33 static unsigned long hi655x_clk_recalc_rate(struct clk_hw *hw,
34 					    unsigned long parent_rate)
35 {
36 	return 32768;
37 }
38 
39 static int hi655x_clk_enable(struct clk_hw *hw, bool enable)
40 {
41 	struct hi655x_clk *hi655x_clk =
42 		container_of(hw, struct hi655x_clk, clk_hw);
43 
44 	struct hi655x_pmic *hi655x = hi655x_clk->hi655x;
45 
46 	return regmap_update_bits(hi655x->regmap, HI655X_CLK_BASE,
47 				  HI655X_CLK_SET, enable ? HI655X_CLK_SET : 0);
48 }
49 
50 static int hi655x_clk_prepare(struct clk_hw *hw)
51 {
52 	return hi655x_clk_enable(hw, true);
53 }
54 
55 static void hi655x_clk_unprepare(struct clk_hw *hw)
56 {
57 	hi655x_clk_enable(hw, false);
58 }
59 
60 static int hi655x_clk_is_prepared(struct clk_hw *hw)
61 {
62 	struct hi655x_clk *hi655x_clk =
63 		container_of(hw, struct hi655x_clk, clk_hw);
64 	struct hi655x_pmic *hi655x = hi655x_clk->hi655x;
65 	int ret;
66 	uint32_t val;
67 
68 	ret = regmap_read(hi655x->regmap, HI655X_CLK_BASE, &val);
69 	if (ret < 0)
70 		return ret;
71 
72 	return val & HI655X_CLK_BASE;
73 }
74 
75 static const struct clk_ops hi655x_clk_ops = {
76 	.prepare     = hi655x_clk_prepare,
77 	.unprepare   = hi655x_clk_unprepare,
78 	.is_prepared = hi655x_clk_is_prepared,
79 	.recalc_rate = hi655x_clk_recalc_rate,
80 };
81 
82 static int hi655x_clk_probe(struct platform_device *pdev)
83 {
84 	struct device *parent = pdev->dev.parent;
85 	struct hi655x_pmic *hi655x = dev_get_drvdata(parent);
86 	struct hi655x_clk *hi655x_clk;
87 	const char *clk_name = "hi655x-clk";
88 	struct clk_init_data init = {
89 		.name = clk_name,
90 		.ops = &hi655x_clk_ops
91 	};
92 	int ret;
93 
94 	hi655x_clk = devm_kzalloc(&pdev->dev, sizeof(*hi655x_clk), GFP_KERNEL);
95 	if (!hi655x_clk)
96 		return -ENOMEM;
97 
98 	of_property_read_string_index(parent->of_node, "clock-output-names",
99 				      0, &clk_name);
100 
101 	hi655x_clk->clk_hw.init	= &init;
102 	hi655x_clk->hi655x	= hi655x;
103 
104 	platform_set_drvdata(pdev, hi655x_clk);
105 
106 	ret = devm_clk_hw_register(&pdev->dev, &hi655x_clk->clk_hw);
107 	if (ret)
108 		return ret;
109 
110 	return of_clk_add_hw_provider(parent->of_node, of_clk_hw_simple_get,
111 				     &hi655x_clk->clk_hw);
112 }
113 
114 static struct platform_driver hi655x_clk_driver = {
115 	.probe =  hi655x_clk_probe,
116 	.driver		= {
117 		.name	= "hi655x-clk",
118 	},
119 };
120 
121 module_platform_driver(hi655x_clk_driver);
122 
123 MODULE_DESCRIPTION("Clk driver for the hi655x series PMICs");
124 MODULE_AUTHOR("Daniel Lezcano <daniel.lezcano@linaro.org>");
125 MODULE_LICENSE("GPL");
126 MODULE_ALIAS("platform:hi655x-clk");
127