1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - https://www.ti.com 4 * 5 * Authors: 6 * Jyri Sarha <jsarha@ti.com> 7 * Sergej Sawazki <ce3a@gmx.de> 8 * 9 * Gpio controlled clock implementation 10 */ 11 12 #include <linux/clk-provider.h> 13 #include <linux/export.h> 14 #include <linux/slab.h> 15 #include <linux/gpio/consumer.h> 16 #include <linux/err.h> 17 #include <linux/device.h> 18 #include <linux/of.h> 19 #include <linux/platform_device.h> 20 #include <linux/regulator/consumer.h> 21 22 /** 23 * DOC: basic gpio gated clock which can be enabled and disabled 24 * with gpio output 25 * Traits of this clock: 26 * prepare - clk_(un)prepare are functional and control a gpio that can sleep 27 * enable - clk_enable and clk_disable are functional & control 28 * non-sleeping gpio 29 * rate - inherits rate from parent. No clk_set_rate support 30 * parent - fixed parent. No clk_set_parent support 31 */ 32 33 /** 34 * struct clk_gpio - gpio gated clock 35 * 36 * @hw: handle between common and hardware-specific interfaces 37 * @gpiod: gpio descriptor 38 * 39 * Clock with a gpio control for enabling and disabling the parent clock 40 * or switching between two parents by asserting or deasserting the gpio. 41 * 42 * Implements .enable, .disable and .is_enabled or 43 * .get_parent, .set_parent and .determine_rate depending on which clk_ops 44 * is used. 45 */ 46 struct clk_gpio { 47 struct clk_hw hw; 48 struct gpio_desc *gpiod; 49 }; 50 51 #define to_clk_gpio(_hw) container_of(_hw, struct clk_gpio, hw) 52 53 static int clk_gpio_gate_enable(struct clk_hw *hw) 54 { 55 struct clk_gpio *clk = to_clk_gpio(hw); 56 57 gpiod_set_value(clk->gpiod, 1); 58 59 return 0; 60 } 61 62 static void clk_gpio_gate_disable(struct clk_hw *hw) 63 { 64 struct clk_gpio *clk = to_clk_gpio(hw); 65 66 gpiod_set_value(clk->gpiod, 0); 67 } 68 69 static int clk_gpio_gate_is_enabled(struct clk_hw *hw) 70 { 71 struct clk_gpio *clk = to_clk_gpio(hw); 72 73 return gpiod_get_value(clk->gpiod); 74 } 75 76 static const struct clk_ops clk_gpio_gate_ops = { 77 .enable = clk_gpio_gate_enable, 78 .disable = clk_gpio_gate_disable, 79 .is_enabled = clk_gpio_gate_is_enabled, 80 }; 81 82 static int clk_sleeping_gpio_gate_prepare(struct clk_hw *hw) 83 { 84 struct clk_gpio *clk = to_clk_gpio(hw); 85 86 gpiod_set_value_cansleep(clk->gpiod, 1); 87 88 return 0; 89 } 90 91 static void clk_sleeping_gpio_gate_unprepare(struct clk_hw *hw) 92 { 93 struct clk_gpio *clk = to_clk_gpio(hw); 94 95 gpiod_set_value_cansleep(clk->gpiod, 0); 96 } 97 98 static int clk_sleeping_gpio_gate_is_prepared(struct clk_hw *hw) 99 { 100 struct clk_gpio *clk = to_clk_gpio(hw); 101 102 return gpiod_get_value_cansleep(clk->gpiod); 103 } 104 105 static const struct clk_ops clk_sleeping_gpio_gate_ops = { 106 .prepare = clk_sleeping_gpio_gate_prepare, 107 .unprepare = clk_sleeping_gpio_gate_unprepare, 108 .is_prepared = clk_sleeping_gpio_gate_is_prepared, 109 }; 110 111 /** 112 * DOC: basic clock multiplexer which can be controlled with a gpio output 113 * Traits of this clock: 114 * prepare - clk_prepare only ensures that parents are prepared 115 * rate - rate is only affected by parent switching. No clk_set_rate support 116 * parent - parent is adjustable through clk_set_parent 117 */ 118 119 static u8 clk_gpio_mux_get_parent(struct clk_hw *hw) 120 { 121 struct clk_gpio *clk = to_clk_gpio(hw); 122 123 return gpiod_get_value_cansleep(clk->gpiod); 124 } 125 126 static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index) 127 { 128 struct clk_gpio *clk = to_clk_gpio(hw); 129 130 gpiod_set_value_cansleep(clk->gpiod, index); 131 132 return 0; 133 } 134 135 static const struct clk_ops clk_gpio_mux_ops = { 136 .get_parent = clk_gpio_mux_get_parent, 137 .set_parent = clk_gpio_mux_set_parent, 138 .determine_rate = __clk_mux_determine_rate, 139 }; 140 141 static struct clk_hw *clk_register_gpio(struct device *dev, u8 num_parents, 142 struct gpio_desc *gpiod, 143 const struct clk_ops *clk_gpio_ops) 144 { 145 struct clk_gpio *clk_gpio; 146 struct clk_hw *hw; 147 struct clk_init_data init = {}; 148 int err; 149 const struct clk_parent_data gpio_parent_data[] = { 150 { .index = 0 }, 151 { .index = 1 }, 152 }; 153 154 clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL); 155 if (!clk_gpio) 156 return ERR_PTR(-ENOMEM); 157 158 init.name = dev->of_node->name; 159 init.ops = clk_gpio_ops; 160 init.parent_data = gpio_parent_data; 161 init.num_parents = num_parents; 162 init.flags = CLK_SET_RATE_PARENT; 163 164 clk_gpio->gpiod = gpiod; 165 clk_gpio->hw.init = &init; 166 167 hw = &clk_gpio->hw; 168 err = devm_clk_hw_register(dev, hw); 169 if (err) 170 return ERR_PTR(err); 171 172 return hw; 173 } 174 175 static struct clk_hw *clk_hw_register_gpio_gate(struct device *dev, 176 int num_parents, 177 struct gpio_desc *gpiod) 178 { 179 const struct clk_ops *ops; 180 181 if (gpiod_cansleep(gpiod)) 182 ops = &clk_sleeping_gpio_gate_ops; 183 else 184 ops = &clk_gpio_gate_ops; 185 186 return clk_register_gpio(dev, num_parents, gpiod, ops); 187 } 188 189 static struct clk_hw *clk_hw_register_gpio_mux(struct device *dev, 190 struct gpio_desc *gpiod) 191 { 192 return clk_register_gpio(dev, 2, gpiod, &clk_gpio_mux_ops); 193 } 194 195 static int gpio_clk_driver_probe(struct platform_device *pdev) 196 { 197 struct device *dev = &pdev->dev; 198 struct device_node *node = dev->of_node; 199 const char *gpio_name; 200 unsigned int num_parents; 201 struct gpio_desc *gpiod; 202 struct clk_hw *hw; 203 bool is_mux; 204 205 is_mux = of_device_is_compatible(node, "gpio-mux-clock"); 206 207 num_parents = of_clk_get_parent_count(node); 208 if (is_mux && num_parents != 2) { 209 dev_err(dev, "mux-clock must have 2 parents\n"); 210 return -EINVAL; 211 } 212 213 gpio_name = is_mux ? "select" : "enable"; 214 gpiod = devm_gpiod_get(dev, gpio_name, GPIOD_OUT_LOW); 215 if (IS_ERR(gpiod)) 216 return dev_err_probe(dev, PTR_ERR(gpiod), 217 "Can't get '%s' named GPIO property\n", gpio_name); 218 219 if (is_mux) 220 hw = clk_hw_register_gpio_mux(dev, gpiod); 221 else 222 hw = clk_hw_register_gpio_gate(dev, num_parents, gpiod); 223 if (IS_ERR(hw)) 224 return PTR_ERR(hw); 225 226 return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw); 227 } 228 229 static const struct of_device_id gpio_clk_match_table[] = { 230 { .compatible = "gpio-mux-clock" }, 231 { .compatible = "gpio-gate-clock" }, 232 { } 233 }; 234 235 static struct platform_driver gpio_clk_driver = { 236 .probe = gpio_clk_driver_probe, 237 .driver = { 238 .name = "gpio-clk", 239 .of_match_table = gpio_clk_match_table, 240 }, 241 }; 242 builtin_platform_driver(gpio_clk_driver); 243 244 /** 245 * DOC: gated fixed clock, controlled with a gpio output and a regulator 246 * Traits of this clock: 247 * prepare - clk_prepare and clk_unprepare are function & control regulator 248 * optionally a gpio that can sleep 249 * enable - clk_enable and clk_disable are functional & control gpio 250 * rate - rate is fixed and set on clock registration 251 * parent - fixed clock is a root clock and has no parent 252 */ 253 254 /** 255 * struct clk_gated_fixed - Gateable fixed rate clock 256 * @clk_gpio: instance of clk_gpio for gate-gpio 257 * @supply: supply regulator 258 * @rate: fixed rate 259 */ 260 struct clk_gated_fixed { 261 struct clk_gpio clk_gpio; 262 struct regulator *supply; 263 unsigned long rate; 264 }; 265 266 #define to_clk_gated_fixed(_clk_gpio) container_of(_clk_gpio, struct clk_gated_fixed, clk_gpio) 267 268 static unsigned long clk_gated_fixed_recalc_rate(struct clk_hw *hw, 269 unsigned long parent_rate) 270 { 271 return to_clk_gated_fixed(to_clk_gpio(hw))->rate; 272 } 273 274 static int clk_gated_fixed_prepare(struct clk_hw *hw) 275 { 276 struct clk_gated_fixed *clk = to_clk_gated_fixed(to_clk_gpio(hw)); 277 278 if (!clk->supply) 279 return 0; 280 281 return regulator_enable(clk->supply); 282 } 283 284 static void clk_gated_fixed_unprepare(struct clk_hw *hw) 285 { 286 struct clk_gated_fixed *clk = to_clk_gated_fixed(to_clk_gpio(hw)); 287 288 if (!clk->supply) 289 return; 290 291 regulator_disable(clk->supply); 292 } 293 294 static int clk_gated_fixed_is_prepared(struct clk_hw *hw) 295 { 296 struct clk_gated_fixed *clk = to_clk_gated_fixed(to_clk_gpio(hw)); 297 298 if (!clk->supply) 299 return true; 300 301 return regulator_is_enabled(clk->supply); 302 } 303 304 /* 305 * Fixed gated clock with non-sleeping gpio. 306 * 307 * Prepare operation turns on the supply regulator 308 * and the enable operation switches the enable-gpio. 309 */ 310 static const struct clk_ops clk_gated_fixed_ops = { 311 .prepare = clk_gated_fixed_prepare, 312 .unprepare = clk_gated_fixed_unprepare, 313 .is_prepared = clk_gated_fixed_is_prepared, 314 .enable = clk_gpio_gate_enable, 315 .disable = clk_gpio_gate_disable, 316 .is_enabled = clk_gpio_gate_is_enabled, 317 .recalc_rate = clk_gated_fixed_recalc_rate, 318 }; 319 320 static int clk_sleeping_gated_fixed_prepare(struct clk_hw *hw) 321 { 322 int ret; 323 324 ret = clk_gated_fixed_prepare(hw); 325 if (ret) 326 return ret; 327 328 ret = clk_sleeping_gpio_gate_prepare(hw); 329 if (ret) 330 clk_gated_fixed_unprepare(hw); 331 332 return ret; 333 } 334 335 static void clk_sleeping_gated_fixed_unprepare(struct clk_hw *hw) 336 { 337 clk_gated_fixed_unprepare(hw); 338 clk_sleeping_gpio_gate_unprepare(hw); 339 } 340 341 /* 342 * Fixed gated clock with non-sleeping gpio. 343 * 344 * Enabling the supply regulator and switching the enable-gpio happens 345 * both in the prepare step. 346 * is_prepared only needs to check the gpio state, as toggling the 347 * gpio is the last step when preparing. 348 */ 349 static const struct clk_ops clk_sleeping_gated_fixed_ops = { 350 .prepare = clk_sleeping_gated_fixed_prepare, 351 .unprepare = clk_sleeping_gated_fixed_unprepare, 352 .is_prepared = clk_sleeping_gpio_gate_is_prepared, 353 .recalc_rate = clk_gated_fixed_recalc_rate, 354 }; 355 356 static int clk_gated_fixed_probe(struct platform_device *pdev) 357 { 358 struct device *dev = &pdev->dev; 359 struct clk_gated_fixed *clk; 360 const struct clk_ops *ops; 361 const char *clk_name; 362 u32 rate; 363 int ret; 364 365 clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL); 366 if (!clk) 367 return -ENOMEM; 368 369 ret = device_property_read_u32(dev, "clock-frequency", &rate); 370 if (ret) 371 return dev_err_probe(dev, ret, "Failed to get clock-frequency\n"); 372 clk->rate = rate; 373 374 ret = device_property_read_string(dev, "clock-output-names", &clk_name); 375 if (ret) 376 clk_name = fwnode_get_name(dev->fwnode); 377 378 clk->supply = devm_regulator_get_optional(dev, "vdd"); 379 if (IS_ERR(clk->supply)) { 380 if (PTR_ERR(clk->supply) != -ENODEV) 381 return dev_err_probe(dev, PTR_ERR(clk->supply), 382 "Failed to get regulator\n"); 383 clk->supply = NULL; 384 } 385 386 clk->clk_gpio.gpiod = devm_gpiod_get_optional(dev, "enable", 387 GPIOD_OUT_LOW); 388 if (IS_ERR(clk->clk_gpio.gpiod)) 389 return dev_err_probe(dev, PTR_ERR(clk->clk_gpio.gpiod), 390 "Failed to get gpio\n"); 391 392 if (gpiod_cansleep(clk->clk_gpio.gpiod)) 393 ops = &clk_sleeping_gated_fixed_ops; 394 else 395 ops = &clk_gated_fixed_ops; 396 397 clk->clk_gpio.hw.init = CLK_HW_INIT_NO_PARENT(clk_name, ops, 0); 398 399 /* register the clock */ 400 ret = devm_clk_hw_register(dev, &clk->clk_gpio.hw); 401 if (ret) 402 return dev_err_probe(dev, ret, 403 "Failed to register clock\n"); 404 405 ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, 406 &clk->clk_gpio.hw); 407 if (ret) 408 return dev_err_probe(dev, ret, 409 "Failed to register clock provider\n"); 410 411 return 0; 412 } 413 414 static const struct of_device_id gated_fixed_clk_match_table[] = { 415 { .compatible = "gated-fixed-clock" }, 416 { /* sentinel */ } 417 }; 418 419 static struct platform_driver gated_fixed_clk_driver = { 420 .probe = clk_gated_fixed_probe, 421 .driver = { 422 .name = "gated-fixed-clk", 423 .of_match_table = gated_fixed_clk_match_table, 424 }, 425 }; 426 builtin_platform_driver(gated_fixed_clk_driver); 427