xref: /linux/drivers/clk/clk-divider.c (revision 4949009eb8d40a441dcddcd96e101e77d31cf1b2)
1 /*
2  * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3  * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>
4  * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * Adjustable divider clock implementation
11  */
12 
13 #include <linux/clk-provider.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/io.h>
17 #include <linux/err.h>
18 #include <linux/string.h>
19 #include <linux/log2.h>
20 
21 /*
22  * DOC: basic adjustable divider clock that cannot gate
23  *
24  * Traits of this clock:
25  * prepare - clk_prepare only ensures that parents are prepared
26  * enable - clk_enable only ensures that parents are enabled
27  * rate - rate is adjustable.  clk->rate = DIV_ROUND_UP(parent->rate / divisor)
28  * parent - fixed parent.  No clk_set_parent support
29  */
30 
31 #define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
32 
33 #define div_mask(d)	((1 << ((d)->width)) - 1)
34 
35 static unsigned int _get_table_maxdiv(const struct clk_div_table *table)
36 {
37 	unsigned int maxdiv = 0;
38 	const struct clk_div_table *clkt;
39 
40 	for (clkt = table; clkt->div; clkt++)
41 		if (clkt->div > maxdiv)
42 			maxdiv = clkt->div;
43 	return maxdiv;
44 }
45 
46 static unsigned int _get_table_mindiv(const struct clk_div_table *table)
47 {
48 	unsigned int mindiv = UINT_MAX;
49 	const struct clk_div_table *clkt;
50 
51 	for (clkt = table; clkt->div; clkt++)
52 		if (clkt->div < mindiv)
53 			mindiv = clkt->div;
54 	return mindiv;
55 }
56 
57 static unsigned int _get_maxdiv(struct clk_divider *divider)
58 {
59 	if (divider->flags & CLK_DIVIDER_ONE_BASED)
60 		return div_mask(divider);
61 	if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
62 		return 1 << div_mask(divider);
63 	if (divider->table)
64 		return _get_table_maxdiv(divider->table);
65 	return div_mask(divider) + 1;
66 }
67 
68 static unsigned int _get_table_div(const struct clk_div_table *table,
69 							unsigned int val)
70 {
71 	const struct clk_div_table *clkt;
72 
73 	for (clkt = table; clkt->div; clkt++)
74 		if (clkt->val == val)
75 			return clkt->div;
76 	return 0;
77 }
78 
79 static unsigned int _get_div(struct clk_divider *divider, unsigned int val)
80 {
81 	if (divider->flags & CLK_DIVIDER_ONE_BASED)
82 		return val;
83 	if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
84 		return 1 << val;
85 	if (divider->table)
86 		return _get_table_div(divider->table, val);
87 	return val + 1;
88 }
89 
90 static unsigned int _get_table_val(const struct clk_div_table *table,
91 							unsigned int div)
92 {
93 	const struct clk_div_table *clkt;
94 
95 	for (clkt = table; clkt->div; clkt++)
96 		if (clkt->div == div)
97 			return clkt->val;
98 	return 0;
99 }
100 
101 static unsigned int _get_val(struct clk_divider *divider, unsigned int div)
102 {
103 	if (divider->flags & CLK_DIVIDER_ONE_BASED)
104 		return div;
105 	if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
106 		return __ffs(div);
107 	if (divider->table)
108 		return  _get_table_val(divider->table, div);
109 	return div - 1;
110 }
111 
112 static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
113 		unsigned long parent_rate)
114 {
115 	struct clk_divider *divider = to_clk_divider(hw);
116 	unsigned int div, val;
117 
118 	val = clk_readl(divider->reg) >> divider->shift;
119 	val &= div_mask(divider);
120 
121 	div = _get_div(divider, val);
122 	if (!div) {
123 		WARN(!(divider->flags & CLK_DIVIDER_ALLOW_ZERO),
124 			"%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n",
125 			__clk_get_name(hw->clk));
126 		return parent_rate;
127 	}
128 
129 	return DIV_ROUND_UP(parent_rate, div);
130 }
131 
132 /*
133  * The reverse of DIV_ROUND_UP: The maximum number which
134  * divided by m is r
135  */
136 #define MULT_ROUND_UP(r, m) ((r) * (m) + (m) - 1)
137 
138 static bool _is_valid_table_div(const struct clk_div_table *table,
139 							 unsigned int div)
140 {
141 	const struct clk_div_table *clkt;
142 
143 	for (clkt = table; clkt->div; clkt++)
144 		if (clkt->div == div)
145 			return true;
146 	return false;
147 }
148 
149 static bool _is_valid_div(struct clk_divider *divider, unsigned int div)
150 {
151 	if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
152 		return is_power_of_2(div);
153 	if (divider->table)
154 		return _is_valid_table_div(divider->table, div);
155 	return true;
156 }
157 
158 static int _round_up_table(const struct clk_div_table *table, int div)
159 {
160 	const struct clk_div_table *clkt;
161 	int up = INT_MAX;
162 
163 	for (clkt = table; clkt->div; clkt++) {
164 		if (clkt->div == div)
165 			return clkt->div;
166 		else if (clkt->div < div)
167 			continue;
168 
169 		if ((clkt->div - div) < (up - div))
170 			up = clkt->div;
171 	}
172 
173 	return up;
174 }
175 
176 static int _round_down_table(const struct clk_div_table *table, int div)
177 {
178 	const struct clk_div_table *clkt;
179 	int down = _get_table_mindiv(table);
180 
181 	for (clkt = table; clkt->div; clkt++) {
182 		if (clkt->div == div)
183 			return clkt->div;
184 		else if (clkt->div > div)
185 			continue;
186 
187 		if ((div - clkt->div) < (div - down))
188 			down = clkt->div;
189 	}
190 
191 	return down;
192 }
193 
194 static int _div_round_up(struct clk_divider *divider,
195 		unsigned long parent_rate, unsigned long rate)
196 {
197 	int div = DIV_ROUND_UP(parent_rate, rate);
198 
199 	if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
200 		div = __roundup_pow_of_two(div);
201 	if (divider->table)
202 		div = _round_up_table(divider->table, div);
203 
204 	return div;
205 }
206 
207 static int _div_round_closest(struct clk_divider *divider,
208 		unsigned long parent_rate, unsigned long rate)
209 {
210 	int up, down, div;
211 
212 	up = down = div = DIV_ROUND_CLOSEST(parent_rate, rate);
213 
214 	if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) {
215 		up = __roundup_pow_of_two(div);
216 		down = __rounddown_pow_of_two(div);
217 	} else if (divider->table) {
218 		up = _round_up_table(divider->table, div);
219 		down = _round_down_table(divider->table, div);
220 	}
221 
222 	return (up - div) <= (div - down) ? up : down;
223 }
224 
225 static int _div_round(struct clk_divider *divider, unsigned long parent_rate,
226 		unsigned long rate)
227 {
228 	if (divider->flags & CLK_DIVIDER_ROUND_CLOSEST)
229 		return _div_round_closest(divider, parent_rate, rate);
230 
231 	return _div_round_up(divider, parent_rate, rate);
232 }
233 
234 static bool _is_best_div(struct clk_divider *divider,
235 		unsigned long rate, unsigned long now, unsigned long best)
236 {
237 	if (divider->flags & CLK_DIVIDER_ROUND_CLOSEST)
238 		return abs(rate - now) < abs(rate - best);
239 
240 	return now <= rate && now > best;
241 }
242 
243 static int _next_div(struct clk_divider *divider, int div)
244 {
245 	div++;
246 
247 	if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
248 		return __roundup_pow_of_two(div);
249 	if (divider->table)
250 		return _round_up_table(divider->table, div);
251 
252 	return div;
253 }
254 
255 static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
256 		unsigned long *best_parent_rate)
257 {
258 	struct clk_divider *divider = to_clk_divider(hw);
259 	int i, bestdiv = 0;
260 	unsigned long parent_rate, best = 0, now, maxdiv;
261 	unsigned long parent_rate_saved = *best_parent_rate;
262 
263 	if (!rate)
264 		rate = 1;
265 
266 	/* if read only, just return current value */
267 	if (divider->flags & CLK_DIVIDER_READ_ONLY) {
268 		bestdiv = readl(divider->reg) >> divider->shift;
269 		bestdiv &= div_mask(divider);
270 		bestdiv = _get_div(divider, bestdiv);
271 		return bestdiv;
272 	}
273 
274 	maxdiv = _get_maxdiv(divider);
275 
276 	if (!(__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT)) {
277 		parent_rate = *best_parent_rate;
278 		bestdiv = _div_round(divider, parent_rate, rate);
279 		bestdiv = bestdiv == 0 ? 1 : bestdiv;
280 		bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv;
281 		return bestdiv;
282 	}
283 
284 	/*
285 	 * The maximum divider we can use without overflowing
286 	 * unsigned long in rate * i below
287 	 */
288 	maxdiv = min(ULONG_MAX / rate, maxdiv);
289 
290 	for (i = 1; i <= maxdiv; i = _next_div(divider, i)) {
291 		if (!_is_valid_div(divider, i))
292 			continue;
293 		if (rate * i == parent_rate_saved) {
294 			/*
295 			 * It's the most ideal case if the requested rate can be
296 			 * divided from parent clock without needing to change
297 			 * parent rate, so return the divider immediately.
298 			 */
299 			*best_parent_rate = parent_rate_saved;
300 			return i;
301 		}
302 		parent_rate = __clk_round_rate(__clk_get_parent(hw->clk),
303 				MULT_ROUND_UP(rate, i));
304 		now = DIV_ROUND_UP(parent_rate, i);
305 		if (_is_best_div(divider, rate, now, best)) {
306 			bestdiv = i;
307 			best = now;
308 			*best_parent_rate = parent_rate;
309 		}
310 	}
311 
312 	if (!bestdiv) {
313 		bestdiv = _get_maxdiv(divider);
314 		*best_parent_rate = __clk_round_rate(__clk_get_parent(hw->clk), 1);
315 	}
316 
317 	return bestdiv;
318 }
319 
320 static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
321 				unsigned long *prate)
322 {
323 	int div;
324 	div = clk_divider_bestdiv(hw, rate, prate);
325 
326 	return DIV_ROUND_UP(*prate, div);
327 }
328 
329 static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
330 				unsigned long parent_rate)
331 {
332 	struct clk_divider *divider = to_clk_divider(hw);
333 	unsigned int div, value;
334 	unsigned long flags = 0;
335 	u32 val;
336 
337 	div = DIV_ROUND_UP(parent_rate, rate);
338 
339 	if (!_is_valid_div(divider, div))
340 		return -EINVAL;
341 
342 	value = _get_val(divider, div);
343 
344 	if (value > div_mask(divider))
345 		value = div_mask(divider);
346 
347 	if (divider->lock)
348 		spin_lock_irqsave(divider->lock, flags);
349 
350 	if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
351 		val = div_mask(divider) << (divider->shift + 16);
352 	} else {
353 		val = clk_readl(divider->reg);
354 		val &= ~(div_mask(divider) << divider->shift);
355 	}
356 	val |= value << divider->shift;
357 	clk_writel(val, divider->reg);
358 
359 	if (divider->lock)
360 		spin_unlock_irqrestore(divider->lock, flags);
361 
362 	return 0;
363 }
364 
365 const struct clk_ops clk_divider_ops = {
366 	.recalc_rate = clk_divider_recalc_rate,
367 	.round_rate = clk_divider_round_rate,
368 	.set_rate = clk_divider_set_rate,
369 };
370 EXPORT_SYMBOL_GPL(clk_divider_ops);
371 
372 static struct clk *_register_divider(struct device *dev, const char *name,
373 		const char *parent_name, unsigned long flags,
374 		void __iomem *reg, u8 shift, u8 width,
375 		u8 clk_divider_flags, const struct clk_div_table *table,
376 		spinlock_t *lock)
377 {
378 	struct clk_divider *div;
379 	struct clk *clk;
380 	struct clk_init_data init;
381 
382 	if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
383 		if (width + shift > 16) {
384 			pr_warn("divider value exceeds LOWORD field\n");
385 			return ERR_PTR(-EINVAL);
386 		}
387 	}
388 
389 	/* allocate the divider */
390 	div = kzalloc(sizeof(struct clk_divider), GFP_KERNEL);
391 	if (!div) {
392 		pr_err("%s: could not allocate divider clk\n", __func__);
393 		return ERR_PTR(-ENOMEM);
394 	}
395 
396 	init.name = name;
397 	init.ops = &clk_divider_ops;
398 	init.flags = flags | CLK_IS_BASIC;
399 	init.parent_names = (parent_name ? &parent_name: NULL);
400 	init.num_parents = (parent_name ? 1 : 0);
401 
402 	/* struct clk_divider assignments */
403 	div->reg = reg;
404 	div->shift = shift;
405 	div->width = width;
406 	div->flags = clk_divider_flags;
407 	div->lock = lock;
408 	div->hw.init = &init;
409 	div->table = table;
410 
411 	/* register the clock */
412 	clk = clk_register(dev, &div->hw);
413 
414 	if (IS_ERR(clk))
415 		kfree(div);
416 
417 	return clk;
418 }
419 
420 /**
421  * clk_register_divider - register a divider clock with the clock framework
422  * @dev: device registering this clock
423  * @name: name of this clock
424  * @parent_name: name of clock's parent
425  * @flags: framework-specific flags
426  * @reg: register address to adjust divider
427  * @shift: number of bits to shift the bitfield
428  * @width: width of the bitfield
429  * @clk_divider_flags: divider-specific flags for this clock
430  * @lock: shared register lock for this clock
431  */
432 struct clk *clk_register_divider(struct device *dev, const char *name,
433 		const char *parent_name, unsigned long flags,
434 		void __iomem *reg, u8 shift, u8 width,
435 		u8 clk_divider_flags, spinlock_t *lock)
436 {
437 	return _register_divider(dev, name, parent_name, flags, reg, shift,
438 			width, clk_divider_flags, NULL, lock);
439 }
440 EXPORT_SYMBOL_GPL(clk_register_divider);
441 
442 /**
443  * clk_register_divider_table - register a table based divider clock with
444  * the clock framework
445  * @dev: device registering this clock
446  * @name: name of this clock
447  * @parent_name: name of clock's parent
448  * @flags: framework-specific flags
449  * @reg: register address to adjust divider
450  * @shift: number of bits to shift the bitfield
451  * @width: width of the bitfield
452  * @clk_divider_flags: divider-specific flags for this clock
453  * @table: array of divider/value pairs ending with a div set to 0
454  * @lock: shared register lock for this clock
455  */
456 struct clk *clk_register_divider_table(struct device *dev, const char *name,
457 		const char *parent_name, unsigned long flags,
458 		void __iomem *reg, u8 shift, u8 width,
459 		u8 clk_divider_flags, const struct clk_div_table *table,
460 		spinlock_t *lock)
461 {
462 	return _register_divider(dev, name, parent_name, flags, reg, shift,
463 			width, clk_divider_flags, table, lock);
464 }
465 EXPORT_SYMBOL_GPL(clk_register_divider_table);
466