1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (C) 2018 ROHM Semiconductors 3 4 #include <linux/kernel.h> 5 #include <linux/module.h> 6 #include <linux/init.h> 7 #include <linux/err.h> 8 #include <linux/platform_device.h> 9 #include <linux/slab.h> 10 #include <linux/mfd/rohm-generic.h> 11 #include <linux/clk-provider.h> 12 #include <linux/clkdev.h> 13 #include <linux/regmap.h> 14 15 /* clk control registers */ 16 /* BD71815 */ 17 #define BD71815_REG_OUT32K 0x1d 18 /* BD71828 */ 19 #define BD71828_REG_OUT32K 0x4B 20 /* BD71837 and BD71847 */ 21 #define BD718XX_REG_OUT32K 0x2E 22 /* BD72720 */ 23 #define BD72720_REG_OUT32K 0x9a 24 /* 25 * BD71837, BD71847, and BD71828 all use bit [0] to clk output control 26 */ 27 #define CLK_OUT_EN_MASK BIT(0) 28 29 30 struct bd718xx_clk { 31 struct clk_hw hw; 32 u8 reg; 33 u8 mask; 34 struct platform_device *pdev; 35 struct regmap *regmap; 36 }; 37 38 static int bd71837_clk_set(struct bd718xx_clk *c, unsigned int status) 39 { 40 return regmap_update_bits(c->regmap, c->reg, c->mask, status); 41 } 42 43 static void bd71837_clk_disable(struct clk_hw *hw) 44 { 45 int rv; 46 struct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw); 47 48 rv = bd71837_clk_set(c, 0); 49 if (rv) 50 dev_dbg(&c->pdev->dev, "Failed to disable 32K clk (%d)\n", rv); 51 } 52 53 static int bd71837_clk_enable(struct clk_hw *hw) 54 { 55 struct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw); 56 57 return bd71837_clk_set(c, 0xffffffff); 58 } 59 60 static int bd71837_clk_is_enabled(struct clk_hw *hw) 61 { 62 int enabled; 63 int rval; 64 struct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw); 65 66 rval = regmap_read(c->regmap, c->reg, &enabled); 67 68 if (rval) 69 return rval; 70 71 return enabled & c->mask; 72 } 73 74 static const struct clk_ops bd71837_clk_ops = { 75 .prepare = &bd71837_clk_enable, 76 .unprepare = &bd71837_clk_disable, 77 .is_prepared = &bd71837_clk_is_enabled, 78 }; 79 80 static int bd71837_clk_probe(struct platform_device *pdev) 81 { 82 struct bd718xx_clk *c; 83 int rval = -ENOMEM; 84 const char *parent_clk; 85 struct device *parent = pdev->dev.parent; 86 struct clk_init_data init = { 87 .name = "bd718xx-32k-out", 88 .ops = &bd71837_clk_ops, 89 }; 90 enum rohm_chip_type chip = platform_get_device_id(pdev)->driver_data; 91 92 c = devm_kzalloc(&pdev->dev, sizeof(*c), GFP_KERNEL); 93 if (!c) 94 return -ENOMEM; 95 96 c->regmap = dev_get_regmap(pdev->dev.parent, NULL); 97 if (!c->regmap) 98 return -ENODEV; 99 100 init.num_parents = 1; 101 parent_clk = of_clk_get_parent_name(parent->of_node, 0); 102 103 init.parent_names = &parent_clk; 104 if (!parent_clk) { 105 dev_err(&pdev->dev, "No parent clk found\n"); 106 return -EINVAL; 107 } 108 switch (chip) { 109 case ROHM_CHIP_TYPE_BD71837: 110 case ROHM_CHIP_TYPE_BD71847: 111 c->reg = BD718XX_REG_OUT32K; 112 c->mask = CLK_OUT_EN_MASK; 113 break; 114 case ROHM_CHIP_TYPE_BD71828: 115 c->reg = BD71828_REG_OUT32K; 116 c->mask = CLK_OUT_EN_MASK; 117 break; 118 case ROHM_CHIP_TYPE_BD71815: 119 c->reg = BD71815_REG_OUT32K; 120 c->mask = CLK_OUT_EN_MASK; 121 break; 122 case ROHM_CHIP_TYPE_BD72720: 123 c->reg = BD72720_REG_OUT32K; 124 c->mask = CLK_OUT_EN_MASK; 125 break; 126 default: 127 dev_err(&pdev->dev, "Unknown clk chip\n"); 128 return -EINVAL; 129 } 130 c->pdev = pdev; 131 c->hw.init = &init; 132 133 of_property_read_string_index(parent->of_node, 134 "clock-output-names", 0, &init.name); 135 136 rval = devm_clk_hw_register(&pdev->dev, &c->hw); 137 if (rval) { 138 dev_err(&pdev->dev, "failed to register 32K clk"); 139 return rval; 140 } 141 rval = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_simple_get, 142 &c->hw); 143 if (rval) 144 dev_err(&pdev->dev, "adding clk provider failed\n"); 145 146 return rval; 147 } 148 149 static const struct platform_device_id bd718x7_clk_id[] = { 150 { "bd71837-clk", ROHM_CHIP_TYPE_BD71837 }, 151 { "bd71847-clk", ROHM_CHIP_TYPE_BD71847 }, 152 { "bd71828-clk", ROHM_CHIP_TYPE_BD71828 }, 153 { "bd71815-clk", ROHM_CHIP_TYPE_BD71815 }, 154 { "bd72720-clk", ROHM_CHIP_TYPE_BD72720 }, 155 { }, 156 }; 157 MODULE_DEVICE_TABLE(platform, bd718x7_clk_id); 158 159 static struct platform_driver bd71837_clk = { 160 .driver = { 161 .name = "bd718xx-clk", 162 }, 163 .probe = bd71837_clk_probe, 164 .id_table = bd718x7_clk_id, 165 }; 166 167 module_platform_driver(bd71837_clk); 168 169 MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>"); 170 MODULE_DESCRIPTION("BD718(15/18/28/37/47/50) and BD72720 chip clk driver"); 171 MODULE_LICENSE("GPL"); 172 MODULE_ALIAS("platform:bd718xx-clk"); 173