1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2005, 2006 IBM Corporation 4 * Copyright (C) 2014, 2015 Intel Corporation 5 * 6 * Authors: 7 * Leendert van Doorn <leendert@watson.ibm.com> 8 * Kylene Hall <kjhall@us.ibm.com> 9 * 10 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 11 * 12 * Device driver for TCG/TCPA TPM (trusted platform module). 13 * Specifications at www.trustedcomputinggroup.org 14 * 15 * This device driver implements the TPM interface as defined in 16 * the TCG TPM Interface Spec version 1.2, revision 1.0. 17 */ 18 #include <linux/init.h> 19 #include <linux/module.h> 20 #include <linux/moduleparam.h> 21 #include <linux/pnp.h> 22 #include <linux/slab.h> 23 #include <linux/interrupt.h> 24 #include <linux/wait.h> 25 #include <linux/acpi.h> 26 #include <linux/freezer.h> 27 #include "tpm.h" 28 #include "tpm_tis_core.h" 29 30 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value); 31 32 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask, 33 bool check_cancel, bool *canceled) 34 { 35 u8 status = chip->ops->status(chip); 36 37 *canceled = false; 38 if ((status & mask) == mask) 39 return true; 40 if (check_cancel && chip->ops->req_canceled(chip, status)) { 41 *canceled = true; 42 return true; 43 } 44 return false; 45 } 46 47 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask, 48 unsigned long timeout, wait_queue_head_t *queue, 49 bool check_cancel) 50 { 51 unsigned long stop; 52 long rc; 53 u8 status; 54 bool canceled = false; 55 56 /* check current status */ 57 status = chip->ops->status(chip); 58 if ((status & mask) == mask) 59 return 0; 60 61 stop = jiffies + timeout; 62 63 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 64 again: 65 timeout = stop - jiffies; 66 if ((long)timeout <= 0) 67 return -ETIME; 68 rc = wait_event_interruptible_timeout(*queue, 69 wait_for_tpm_stat_cond(chip, mask, check_cancel, 70 &canceled), 71 timeout); 72 if (rc > 0) { 73 if (canceled) 74 return -ECANCELED; 75 return 0; 76 } 77 if (rc == -ERESTARTSYS && freezing(current)) { 78 clear_thread_flag(TIF_SIGPENDING); 79 goto again; 80 } 81 } else { 82 do { 83 usleep_range(TPM_TIMEOUT_USECS_MIN, 84 TPM_TIMEOUT_USECS_MAX); 85 status = chip->ops->status(chip); 86 if ((status & mask) == mask) 87 return 0; 88 } while (time_before(jiffies, stop)); 89 } 90 return -ETIME; 91 } 92 93 /* Before we attempt to access the TPM we must see that the valid bit is set. 94 * The specification says that this bit is 0 at reset and remains 0 until the 95 * 'TPM has gone through its self test and initialization and has established 96 * correct values in the other bits.' 97 */ 98 static int wait_startup(struct tpm_chip *chip, int l) 99 { 100 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 101 unsigned long stop = jiffies + chip->timeout_a; 102 103 do { 104 int rc; 105 u8 access; 106 107 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 108 if (rc < 0) 109 return rc; 110 111 if (access & TPM_ACCESS_VALID) 112 return 0; 113 tpm_msleep(TPM_TIMEOUT); 114 } while (time_before(jiffies, stop)); 115 return -1; 116 } 117 118 static bool check_locality(struct tpm_chip *chip, int l) 119 { 120 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 121 int rc; 122 u8 access; 123 124 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 125 if (rc < 0) 126 return false; 127 128 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == 129 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) { 130 priv->locality = l; 131 return true; 132 } 133 134 return false; 135 } 136 137 static bool locality_inactive(struct tpm_chip *chip, int l) 138 { 139 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 140 int rc; 141 u8 access; 142 143 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 144 if (rc < 0) 145 return false; 146 147 if ((access & (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY)) 148 == TPM_ACCESS_VALID) 149 return true; 150 151 return false; 152 } 153 154 static int release_locality(struct tpm_chip *chip, int l) 155 { 156 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 157 unsigned long stop, timeout; 158 long rc; 159 160 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY); 161 162 stop = jiffies + chip->timeout_a; 163 164 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 165 again: 166 timeout = stop - jiffies; 167 if ((long)timeout <= 0) 168 return -1; 169 170 rc = wait_event_interruptible_timeout(priv->int_queue, 171 (locality_inactive(chip, l)), 172 timeout); 173 174 if (rc > 0) 175 return 0; 176 177 if (rc == -ERESTARTSYS && freezing(current)) { 178 clear_thread_flag(TIF_SIGPENDING); 179 goto again; 180 } 181 } else { 182 do { 183 if (locality_inactive(chip, l)) 184 return 0; 185 tpm_msleep(TPM_TIMEOUT); 186 } while (time_before(jiffies, stop)); 187 } 188 return -1; 189 } 190 191 static int request_locality(struct tpm_chip *chip, int l) 192 { 193 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 194 unsigned long stop, timeout; 195 long rc; 196 197 if (check_locality(chip, l)) 198 return l; 199 200 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE); 201 if (rc < 0) 202 return rc; 203 204 stop = jiffies + chip->timeout_a; 205 206 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 207 again: 208 timeout = stop - jiffies; 209 if ((long)timeout <= 0) 210 return -1; 211 rc = wait_event_interruptible_timeout(priv->int_queue, 212 (check_locality 213 (chip, l)), 214 timeout); 215 if (rc > 0) 216 return l; 217 if (rc == -ERESTARTSYS && freezing(current)) { 218 clear_thread_flag(TIF_SIGPENDING); 219 goto again; 220 } 221 } else { 222 /* wait for burstcount */ 223 do { 224 if (check_locality(chip, l)) 225 return l; 226 tpm_msleep(TPM_TIMEOUT); 227 } while (time_before(jiffies, stop)); 228 } 229 return -1; 230 } 231 232 static u8 tpm_tis_status(struct tpm_chip *chip) 233 { 234 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 235 int rc; 236 u8 status; 237 238 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status); 239 if (rc < 0) 240 return 0; 241 242 return status; 243 } 244 245 static void tpm_tis_ready(struct tpm_chip *chip) 246 { 247 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 248 249 /* this causes the current command to be aborted */ 250 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY); 251 } 252 253 static int get_burstcount(struct tpm_chip *chip) 254 { 255 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 256 unsigned long stop; 257 int burstcnt, rc; 258 u32 value; 259 260 /* wait for burstcount */ 261 if (chip->flags & TPM_CHIP_FLAG_TPM2) 262 stop = jiffies + chip->timeout_a; 263 else 264 stop = jiffies + chip->timeout_d; 265 do { 266 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value); 267 if (rc < 0) 268 return rc; 269 270 burstcnt = (value >> 8) & 0xFFFF; 271 if (burstcnt) 272 return burstcnt; 273 usleep_range(TPM_TIMEOUT_USECS_MIN, TPM_TIMEOUT_USECS_MAX); 274 } while (time_before(jiffies, stop)); 275 return -EBUSY; 276 } 277 278 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) 279 { 280 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 281 int size = 0, burstcnt, rc; 282 283 while (size < count) { 284 rc = wait_for_tpm_stat(chip, 285 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 286 chip->timeout_c, 287 &priv->read_queue, true); 288 if (rc < 0) 289 return rc; 290 burstcnt = get_burstcount(chip); 291 if (burstcnt < 0) { 292 dev_err(&chip->dev, "Unable to read burstcount\n"); 293 return burstcnt; 294 } 295 burstcnt = min_t(int, burstcnt, count - size); 296 297 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality), 298 burstcnt, buf + size); 299 if (rc < 0) 300 return rc; 301 302 size += burstcnt; 303 } 304 return size; 305 } 306 307 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count) 308 { 309 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 310 int size = 0; 311 int status; 312 u32 expected; 313 314 if (count < TPM_HEADER_SIZE) { 315 size = -EIO; 316 goto out; 317 } 318 319 size = recv_data(chip, buf, TPM_HEADER_SIZE); 320 /* read first 10 bytes, including tag, paramsize, and result */ 321 if (size < TPM_HEADER_SIZE) { 322 dev_err(&chip->dev, "Unable to read header\n"); 323 goto out; 324 } 325 326 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 327 if (expected > count || expected < TPM_HEADER_SIZE) { 328 size = -EIO; 329 goto out; 330 } 331 332 size += recv_data(chip, &buf[TPM_HEADER_SIZE], 333 expected - TPM_HEADER_SIZE); 334 if (size < expected) { 335 dev_err(&chip->dev, "Unable to read remainder of result\n"); 336 size = -ETIME; 337 goto out; 338 } 339 340 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 341 &priv->int_queue, false) < 0) { 342 size = -ETIME; 343 goto out; 344 } 345 status = tpm_tis_status(chip); 346 if (status & TPM_STS_DATA_AVAIL) { /* retry? */ 347 dev_err(&chip->dev, "Error left over data\n"); 348 size = -EIO; 349 goto out; 350 } 351 352 out: 353 tpm_tis_ready(chip); 354 return size; 355 } 356 357 /* 358 * If interrupts are used (signaled by an irq set in the vendor structure) 359 * tpm.c can skip polling for the data to be available as the interrupt is 360 * waited for here 361 */ 362 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len) 363 { 364 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 365 int rc, status, burstcnt; 366 size_t count = 0; 367 bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND; 368 369 status = tpm_tis_status(chip); 370 if ((status & TPM_STS_COMMAND_READY) == 0) { 371 tpm_tis_ready(chip); 372 if (wait_for_tpm_stat 373 (chip, TPM_STS_COMMAND_READY, chip->timeout_b, 374 &priv->int_queue, false) < 0) { 375 rc = -ETIME; 376 goto out_err; 377 } 378 } 379 380 while (count < len - 1) { 381 burstcnt = get_burstcount(chip); 382 if (burstcnt < 0) { 383 dev_err(&chip->dev, "Unable to read burstcount\n"); 384 rc = burstcnt; 385 goto out_err; 386 } 387 burstcnt = min_t(int, burstcnt, len - count - 1); 388 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality), 389 burstcnt, buf + count); 390 if (rc < 0) 391 goto out_err; 392 393 count += burstcnt; 394 395 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 396 &priv->int_queue, false) < 0) { 397 rc = -ETIME; 398 goto out_err; 399 } 400 status = tpm_tis_status(chip); 401 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) { 402 rc = -EIO; 403 goto out_err; 404 } 405 } 406 407 /* write last byte */ 408 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]); 409 if (rc < 0) 410 goto out_err; 411 412 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 413 &priv->int_queue, false) < 0) { 414 rc = -ETIME; 415 goto out_err; 416 } 417 status = tpm_tis_status(chip); 418 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) { 419 rc = -EIO; 420 goto out_err; 421 } 422 423 return 0; 424 425 out_err: 426 tpm_tis_ready(chip); 427 return rc; 428 } 429 430 static void disable_interrupts(struct tpm_chip *chip) 431 { 432 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 433 u32 intmask; 434 int rc; 435 436 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 437 if (rc < 0) 438 intmask = 0; 439 440 intmask &= ~TPM_GLOBAL_INT_ENABLE; 441 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 442 443 devm_free_irq(chip->dev.parent, priv->irq, chip); 444 priv->irq = 0; 445 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 446 } 447 448 /* 449 * If interrupts are used (signaled by an irq set in the vendor structure) 450 * tpm.c can skip polling for the data to be available as the interrupt is 451 * waited for here 452 */ 453 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len) 454 { 455 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 456 int rc; 457 u32 ordinal; 458 unsigned long dur; 459 460 rc = tpm_tis_send_data(chip, buf, len); 461 if (rc < 0) 462 return rc; 463 464 /* go and do it */ 465 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO); 466 if (rc < 0) 467 goto out_err; 468 469 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 470 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 471 472 dur = tpm_calc_ordinal_duration(chip, ordinal); 473 if (wait_for_tpm_stat 474 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur, 475 &priv->read_queue, false) < 0) { 476 rc = -ETIME; 477 goto out_err; 478 } 479 } 480 return 0; 481 out_err: 482 tpm_tis_ready(chip); 483 return rc; 484 } 485 486 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len) 487 { 488 int rc, irq; 489 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 490 491 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested) 492 return tpm_tis_send_main(chip, buf, len); 493 494 /* Verify receipt of the expected IRQ */ 495 irq = priv->irq; 496 priv->irq = 0; 497 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 498 rc = tpm_tis_send_main(chip, buf, len); 499 priv->irq = irq; 500 chip->flags |= TPM_CHIP_FLAG_IRQ; 501 if (!priv->irq_tested) 502 tpm_msleep(1); 503 if (!priv->irq_tested) 504 disable_interrupts(chip); 505 priv->irq_tested = true; 506 return rc; 507 } 508 509 struct tis_vendor_durations_override { 510 u32 did_vid; 511 struct tpm1_version version; 512 unsigned long durations[3]; 513 }; 514 515 static const struct tis_vendor_durations_override vendor_dur_overrides[] = { 516 /* STMicroelectronics 0x104a */ 517 { 0x0000104a, 518 { 1, 2, 8, 28 }, 519 { (2 * 60 * HZ), (2 * 60 * HZ), (2 * 60 * HZ) } }, 520 }; 521 522 static void tpm_tis_update_durations(struct tpm_chip *chip, 523 unsigned long *duration_cap) 524 { 525 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 526 struct tpm1_version *version; 527 u32 did_vid; 528 int i, rc; 529 cap_t cap; 530 531 chip->duration_adjusted = false; 532 533 if (chip->ops->clk_enable != NULL) 534 chip->ops->clk_enable(chip, true); 535 536 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid); 537 if (rc < 0) { 538 dev_warn(&chip->dev, "%s: failed to read did_vid. %d\n", 539 __func__, rc); 540 goto out; 541 } 542 543 /* Try to get a TPM version 1.2 or 1.1 TPM_CAP_VERSION_INFO */ 544 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_2, &cap, 545 "attempting to determine the 1.2 version", 546 sizeof(cap.version2)); 547 if (!rc) { 548 version = &cap.version2.version; 549 } else { 550 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_1, &cap, 551 "attempting to determine the 1.1 version", 552 sizeof(cap.version1)); 553 554 if (rc) 555 goto out; 556 557 version = &cap.version1; 558 } 559 560 for (i = 0; i != ARRAY_SIZE(vendor_dur_overrides); i++) { 561 if (vendor_dur_overrides[i].did_vid != did_vid) 562 continue; 563 564 if ((version->major == 565 vendor_dur_overrides[i].version.major) && 566 (version->minor == 567 vendor_dur_overrides[i].version.minor) && 568 (version->rev_major == 569 vendor_dur_overrides[i].version.rev_major) && 570 (version->rev_minor == 571 vendor_dur_overrides[i].version.rev_minor)) { 572 573 memcpy(duration_cap, 574 vendor_dur_overrides[i].durations, 575 sizeof(vendor_dur_overrides[i].durations)); 576 577 chip->duration_adjusted = true; 578 goto out; 579 } 580 } 581 582 out: 583 if (chip->ops->clk_enable != NULL) 584 chip->ops->clk_enable(chip, false); 585 } 586 587 struct tis_vendor_timeout_override { 588 u32 did_vid; 589 unsigned long timeout_us[4]; 590 }; 591 592 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = { 593 /* Atmel 3204 */ 594 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000), 595 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, 596 }; 597 598 static void tpm_tis_update_timeouts(struct tpm_chip *chip, 599 unsigned long *timeout_cap) 600 { 601 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 602 int i, rc; 603 u32 did_vid; 604 605 chip->timeout_adjusted = false; 606 607 if (chip->ops->clk_enable != NULL) 608 chip->ops->clk_enable(chip, true); 609 610 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid); 611 if (rc < 0) { 612 dev_warn(&chip->dev, "%s: failed to read did_vid: %d\n", 613 __func__, rc); 614 goto out; 615 } 616 617 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) { 618 if (vendor_timeout_overrides[i].did_vid != did_vid) 619 continue; 620 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us, 621 sizeof(vendor_timeout_overrides[i].timeout_us)); 622 chip->timeout_adjusted = true; 623 } 624 625 out: 626 if (chip->ops->clk_enable != NULL) 627 chip->ops->clk_enable(chip, false); 628 629 return; 630 } 631 632 /* 633 * Early probing for iTPM with STS_DATA_EXPECT flaw. 634 * Try sending command without itpm flag set and if that 635 * fails, repeat with itpm flag set. 636 */ 637 static int probe_itpm(struct tpm_chip *chip) 638 { 639 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 640 int rc = 0; 641 static const u8 cmd_getticks[] = { 642 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a, 643 0x00, 0x00, 0x00, 0xf1 644 }; 645 size_t len = sizeof(cmd_getticks); 646 u16 vendor; 647 648 if (priv->flags & TPM_TIS_ITPM_WORKAROUND) 649 return 0; 650 651 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor); 652 if (rc < 0) 653 return rc; 654 655 /* probe only iTPMS */ 656 if (vendor != TPM_VID_INTEL) 657 return 0; 658 659 if (request_locality(chip, 0) != 0) 660 return -EBUSY; 661 662 rc = tpm_tis_send_data(chip, cmd_getticks, len); 663 if (rc == 0) 664 goto out; 665 666 tpm_tis_ready(chip); 667 668 priv->flags |= TPM_TIS_ITPM_WORKAROUND; 669 670 rc = tpm_tis_send_data(chip, cmd_getticks, len); 671 if (rc == 0) 672 dev_info(&chip->dev, "Detected an iTPM.\n"); 673 else { 674 priv->flags &= ~TPM_TIS_ITPM_WORKAROUND; 675 rc = -EFAULT; 676 } 677 678 out: 679 tpm_tis_ready(chip); 680 release_locality(chip, priv->locality); 681 682 return rc; 683 } 684 685 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status) 686 { 687 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 688 689 switch (priv->manufacturer_id) { 690 case TPM_VID_WINBOND: 691 return ((status == TPM_STS_VALID) || 692 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY))); 693 case TPM_VID_STM: 694 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)); 695 default: 696 return (status == TPM_STS_COMMAND_READY); 697 } 698 } 699 700 static irqreturn_t tis_int_handler(int dummy, void *dev_id) 701 { 702 struct tpm_chip *chip = dev_id; 703 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 704 u32 interrupt; 705 int i, rc; 706 707 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt); 708 if (rc < 0) 709 return IRQ_NONE; 710 711 if (interrupt == 0) 712 return IRQ_NONE; 713 714 priv->irq_tested = true; 715 if (interrupt & TPM_INTF_DATA_AVAIL_INT) 716 wake_up_interruptible(&priv->read_queue); 717 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT) 718 for (i = 0; i < 5; i++) 719 if (check_locality(chip, i)) 720 break; 721 if (interrupt & 722 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT | 723 TPM_INTF_CMD_READY_INT)) 724 wake_up_interruptible(&priv->int_queue); 725 726 /* Clear interrupts handled with TPM_EOI */ 727 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt); 728 if (rc < 0) 729 return IRQ_NONE; 730 731 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt); 732 return IRQ_HANDLED; 733 } 734 735 static int tpm_tis_gen_interrupt(struct tpm_chip *chip) 736 { 737 const char *desc = "attempting to generate an interrupt"; 738 u32 cap2; 739 cap_t cap; 740 741 if (chip->flags & TPM_CHIP_FLAG_TPM2) 742 return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc); 743 else 744 return tpm1_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc, 745 0); 746 } 747 748 /* Register the IRQ and issue a command that will cause an interrupt. If an 749 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse 750 * everything and leave in polling mode. Returns 0 on success. 751 */ 752 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask, 753 int flags, int irq) 754 { 755 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 756 u8 original_int_vec; 757 int rc; 758 u32 int_status; 759 760 if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags, 761 dev_name(&chip->dev), chip) != 0) { 762 dev_info(&chip->dev, "Unable to request irq: %d for probe\n", 763 irq); 764 return -1; 765 } 766 priv->irq = irq; 767 768 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality), 769 &original_int_vec); 770 if (rc < 0) 771 return rc; 772 773 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq); 774 if (rc < 0) 775 return rc; 776 777 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status); 778 if (rc < 0) 779 return rc; 780 781 /* Clear all existing */ 782 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status); 783 if (rc < 0) 784 return rc; 785 786 /* Turn on */ 787 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), 788 intmask | TPM_GLOBAL_INT_ENABLE); 789 if (rc < 0) 790 return rc; 791 792 priv->irq_tested = false; 793 794 /* Generate an interrupt by having the core call through to 795 * tpm_tis_send 796 */ 797 rc = tpm_tis_gen_interrupt(chip); 798 if (rc < 0) 799 return rc; 800 801 /* tpm_tis_send will either confirm the interrupt is working or it 802 * will call disable_irq which undoes all of the above. 803 */ 804 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) { 805 rc = tpm_tis_write8(priv, original_int_vec, 806 TPM_INT_VECTOR(priv->locality)); 807 if (rc < 0) 808 return rc; 809 810 return 1; 811 } 812 813 return 0; 814 } 815 816 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that 817 * do not have ACPI/etc. We typically expect the interrupt to be declared if 818 * present. 819 */ 820 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask) 821 { 822 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 823 u8 original_int_vec; 824 int i, rc; 825 826 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality), 827 &original_int_vec); 828 if (rc < 0) 829 return; 830 831 if (!original_int_vec) { 832 if (IS_ENABLED(CONFIG_X86)) 833 for (i = 3; i <= 15; i++) 834 if (!tpm_tis_probe_irq_single(chip, intmask, 0, 835 i)) 836 return; 837 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0, 838 original_int_vec)) 839 return; 840 } 841 842 void tpm_tis_remove(struct tpm_chip *chip) 843 { 844 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 845 u32 reg = TPM_INT_ENABLE(priv->locality); 846 u32 interrupt; 847 int rc; 848 849 tpm_tis_clkrun_enable(chip, true); 850 851 rc = tpm_tis_read32(priv, reg, &interrupt); 852 if (rc < 0) 853 interrupt = 0; 854 855 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt); 856 857 tpm_tis_clkrun_enable(chip, false); 858 859 if (priv->ilb_base_addr) 860 iounmap(priv->ilb_base_addr); 861 } 862 EXPORT_SYMBOL_GPL(tpm_tis_remove); 863 864 /** 865 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration 866 * of a single TPM command 867 * @chip: TPM chip to use 868 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running 869 * 0 - Enable CLKRUN protocol 870 * Call this function directly in tpm_tis_remove() in error or driver removal 871 * path, since the chip->ops is set to NULL in tpm_chip_unregister(). 872 */ 873 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value) 874 { 875 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev); 876 u32 clkrun_val; 877 878 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() || 879 !data->ilb_base_addr) 880 return; 881 882 if (value) { 883 data->clkrun_enabled++; 884 if (data->clkrun_enabled > 1) 885 return; 886 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET); 887 888 /* Disable LPC CLKRUN# */ 889 clkrun_val &= ~LPC_CLKRUN_EN; 890 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET); 891 892 /* 893 * Write any random value on port 0x80 which is on LPC, to make 894 * sure LPC clock is running before sending any TPM command. 895 */ 896 outb(0xCC, 0x80); 897 } else { 898 data->clkrun_enabled--; 899 if (data->clkrun_enabled) 900 return; 901 902 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET); 903 904 /* Enable LPC CLKRUN# */ 905 clkrun_val |= LPC_CLKRUN_EN; 906 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET); 907 908 /* 909 * Write any random value on port 0x80 which is on LPC, to make 910 * sure LPC clock is running before sending any TPM command. 911 */ 912 outb(0xCC, 0x80); 913 } 914 } 915 916 static const struct tpm_class_ops tpm_tis = { 917 .flags = TPM_OPS_AUTO_STARTUP, 918 .status = tpm_tis_status, 919 .recv = tpm_tis_recv, 920 .send = tpm_tis_send, 921 .cancel = tpm_tis_ready, 922 .update_timeouts = tpm_tis_update_timeouts, 923 .update_durations = tpm_tis_update_durations, 924 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 925 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 926 .req_canceled = tpm_tis_req_canceled, 927 .request_locality = request_locality, 928 .relinquish_locality = release_locality, 929 .clk_enable = tpm_tis_clkrun_enable, 930 }; 931 932 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq, 933 const struct tpm_tis_phy_ops *phy_ops, 934 acpi_handle acpi_dev_handle) 935 { 936 u32 vendor; 937 u32 intfcaps; 938 u32 intmask; 939 u32 clkrun_val; 940 u8 rid; 941 int rc, probe; 942 struct tpm_chip *chip; 943 944 chip = tpmm_chip_alloc(dev, &tpm_tis); 945 if (IS_ERR(chip)) 946 return PTR_ERR(chip); 947 948 #ifdef CONFIG_ACPI 949 chip->acpi_dev_handle = acpi_dev_handle; 950 #endif 951 952 chip->hwrng.quality = priv->rng_quality; 953 954 /* Maximum timeouts */ 955 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX); 956 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX); 957 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX); 958 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX); 959 priv->phy_ops = phy_ops; 960 dev_set_drvdata(&chip->dev, priv); 961 962 if (is_bsw()) { 963 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR, 964 ILB_REMAP_SIZE); 965 if (!priv->ilb_base_addr) 966 return -ENOMEM; 967 968 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET); 969 /* Check if CLKRUN# is already not enabled in the LPC bus */ 970 if (!(clkrun_val & LPC_CLKRUN_EN)) { 971 iounmap(priv->ilb_base_addr); 972 priv->ilb_base_addr = NULL; 973 } 974 } 975 976 if (chip->ops->clk_enable != NULL) 977 chip->ops->clk_enable(chip, true); 978 979 if (wait_startup(chip, 0) != 0) { 980 rc = -ENODEV; 981 goto out_err; 982 } 983 984 /* Take control of the TPM's interrupt hardware and shut it off */ 985 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 986 if (rc < 0) 987 goto out_err; 988 989 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT | 990 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT; 991 intmask &= ~TPM_GLOBAL_INT_ENABLE; 992 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 993 994 rc = tpm_chip_start(chip); 995 if (rc) 996 goto out_err; 997 rc = tpm2_probe(chip); 998 tpm_chip_stop(chip); 999 if (rc) 1000 goto out_err; 1001 1002 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor); 1003 if (rc < 0) 1004 goto out_err; 1005 1006 priv->manufacturer_id = vendor; 1007 1008 rc = tpm_tis_read8(priv, TPM_RID(0), &rid); 1009 if (rc < 0) 1010 goto out_err; 1011 1012 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n", 1013 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2", 1014 vendor >> 16, rid); 1015 1016 probe = probe_itpm(chip); 1017 if (probe < 0) { 1018 rc = -ENODEV; 1019 goto out_err; 1020 } 1021 1022 /* Figure out the capabilities */ 1023 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps); 1024 if (rc < 0) 1025 goto out_err; 1026 1027 dev_dbg(dev, "TPM interface capabilities (0x%x):\n", 1028 intfcaps); 1029 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC) 1030 dev_dbg(dev, "\tBurst Count Static\n"); 1031 if (intfcaps & TPM_INTF_CMD_READY_INT) 1032 dev_dbg(dev, "\tCommand Ready Int Support\n"); 1033 if (intfcaps & TPM_INTF_INT_EDGE_FALLING) 1034 dev_dbg(dev, "\tInterrupt Edge Falling\n"); 1035 if (intfcaps & TPM_INTF_INT_EDGE_RISING) 1036 dev_dbg(dev, "\tInterrupt Edge Rising\n"); 1037 if (intfcaps & TPM_INTF_INT_LEVEL_LOW) 1038 dev_dbg(dev, "\tInterrupt Level Low\n"); 1039 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH) 1040 dev_dbg(dev, "\tInterrupt Level High\n"); 1041 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) 1042 dev_dbg(dev, "\tLocality Change Int Support\n"); 1043 if (intfcaps & TPM_INTF_STS_VALID_INT) 1044 dev_dbg(dev, "\tSts Valid Int Support\n"); 1045 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) 1046 dev_dbg(dev, "\tData Avail Int Support\n"); 1047 1048 /* INTERRUPT Setup */ 1049 init_waitqueue_head(&priv->read_queue); 1050 init_waitqueue_head(&priv->int_queue); 1051 if (irq != -1) { 1052 /* Before doing irq testing issue a command to the TPM in polling mode 1053 * to make sure it works. May as well use that command to set the 1054 * proper timeouts for the driver. 1055 */ 1056 if (tpm_get_timeouts(chip)) { 1057 dev_err(dev, "Could not get TPM timeouts and durations\n"); 1058 rc = -ENODEV; 1059 goto out_err; 1060 } 1061 1062 tpm_chip_start(chip); 1063 chip->flags |= TPM_CHIP_FLAG_IRQ; 1064 if (irq) { 1065 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED, 1066 irq); 1067 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) 1068 dev_err(&chip->dev, FW_BUG 1069 "TPM interrupt not working, polling instead\n"); 1070 } else { 1071 tpm_tis_probe_irq(chip, intmask); 1072 } 1073 tpm_chip_stop(chip); 1074 } 1075 1076 rc = tpm_chip_register(chip); 1077 if (rc) 1078 goto out_err; 1079 1080 if (chip->ops->clk_enable != NULL) 1081 chip->ops->clk_enable(chip, false); 1082 1083 return 0; 1084 out_err: 1085 if ((chip->ops != NULL) && (chip->ops->clk_enable != NULL)) 1086 chip->ops->clk_enable(chip, false); 1087 1088 tpm_tis_remove(chip); 1089 1090 return rc; 1091 } 1092 EXPORT_SYMBOL_GPL(tpm_tis_core_init); 1093 1094 #ifdef CONFIG_PM_SLEEP 1095 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip) 1096 { 1097 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 1098 u32 intmask; 1099 int rc; 1100 1101 if (chip->ops->clk_enable != NULL) 1102 chip->ops->clk_enable(chip, true); 1103 1104 /* reenable interrupts that device may have lost or 1105 * BIOS/firmware may have disabled 1106 */ 1107 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq); 1108 if (rc < 0) 1109 goto out; 1110 1111 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 1112 if (rc < 0) 1113 goto out; 1114 1115 intmask |= TPM_INTF_CMD_READY_INT 1116 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT 1117 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE; 1118 1119 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 1120 1121 out: 1122 if (chip->ops->clk_enable != NULL) 1123 chip->ops->clk_enable(chip, false); 1124 1125 return; 1126 } 1127 1128 int tpm_tis_resume(struct device *dev) 1129 { 1130 struct tpm_chip *chip = dev_get_drvdata(dev); 1131 int ret; 1132 1133 if (chip->flags & TPM_CHIP_FLAG_IRQ) 1134 tpm_tis_reenable_interrupts(chip); 1135 1136 ret = tpm_pm_resume(dev); 1137 if (ret) 1138 return ret; 1139 1140 /* TPM 1.2 requires self-test on resume. This function actually returns 1141 * an error code but for unknown reason it isn't handled. 1142 */ 1143 if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) 1144 tpm1_do_selftest(chip); 1145 1146 return 0; 1147 } 1148 EXPORT_SYMBOL_GPL(tpm_tis_resume); 1149 #endif 1150 1151 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); 1152 MODULE_DESCRIPTION("TPM Driver"); 1153 MODULE_VERSION("2.0"); 1154 MODULE_LICENSE("GPL"); 1155