1 /* 2 * Copyright (C) 2005, 2006 IBM Corporation 3 * 4 * Authors: 5 * Leendert van Doorn <leendert@watson.ibm.com> 6 * Kylene Hall <kjhall@us.ibm.com> 7 * 8 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 9 * 10 * Device driver for TCG/TCPA TPM (trusted platform module). 11 * Specifications at www.trustedcomputinggroup.org 12 * 13 * This device driver implements the TPM interface as defined in 14 * the TCG TPM Interface Spec version 1.2, revision 1.0. 15 * 16 * This program is free software; you can redistribute it and/or 17 * modify it under the terms of the GNU General Public License as 18 * published by the Free Software Foundation, version 2 of the 19 * License. 20 */ 21 #include <linux/init.h> 22 #include <linux/module.h> 23 #include <linux/moduleparam.h> 24 #include <linux/pnp.h> 25 #include <linux/slab.h> 26 #include <linux/interrupt.h> 27 #include <linux/wait.h> 28 #include <linux/acpi.h> 29 #include <linux/freezer.h> 30 #include "tpm.h" 31 32 enum tis_access { 33 TPM_ACCESS_VALID = 0x80, 34 TPM_ACCESS_ACTIVE_LOCALITY = 0x20, 35 TPM_ACCESS_REQUEST_PENDING = 0x04, 36 TPM_ACCESS_REQUEST_USE = 0x02, 37 }; 38 39 enum tis_status { 40 TPM_STS_VALID = 0x80, 41 TPM_STS_COMMAND_READY = 0x40, 42 TPM_STS_GO = 0x20, 43 TPM_STS_DATA_AVAIL = 0x10, 44 TPM_STS_DATA_EXPECT = 0x08, 45 }; 46 47 enum tis_int_flags { 48 TPM_GLOBAL_INT_ENABLE = 0x80000000, 49 TPM_INTF_BURST_COUNT_STATIC = 0x100, 50 TPM_INTF_CMD_READY_INT = 0x080, 51 TPM_INTF_INT_EDGE_FALLING = 0x040, 52 TPM_INTF_INT_EDGE_RISING = 0x020, 53 TPM_INTF_INT_LEVEL_LOW = 0x010, 54 TPM_INTF_INT_LEVEL_HIGH = 0x008, 55 TPM_INTF_LOCALITY_CHANGE_INT = 0x004, 56 TPM_INTF_STS_VALID_INT = 0x002, 57 TPM_INTF_DATA_AVAIL_INT = 0x001, 58 }; 59 60 enum tis_defaults { 61 TIS_MEM_BASE = 0xFED40000, 62 TIS_MEM_LEN = 0x5000, 63 TIS_SHORT_TIMEOUT = 750, /* ms */ 64 TIS_LONG_TIMEOUT = 2000, /* 2 sec */ 65 }; 66 67 #define TPM_ACCESS(l) (0x0000 | ((l) << 12)) 68 #define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12)) 69 #define TPM_INT_VECTOR(l) (0x000C | ((l) << 12)) 70 #define TPM_INT_STATUS(l) (0x0010 | ((l) << 12)) 71 #define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12)) 72 #define TPM_STS(l) (0x0018 | ((l) << 12)) 73 #define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12)) 74 75 #define TPM_DID_VID(l) (0x0F00 | ((l) << 12)) 76 #define TPM_RID(l) (0x0F04 | ((l) << 12)) 77 78 static LIST_HEAD(tis_chips); 79 static DEFINE_MUTEX(tis_lock); 80 81 #if defined(CONFIG_PNP) && defined(CONFIG_ACPI) 82 static int is_itpm(struct pnp_dev *dev) 83 { 84 struct acpi_device *acpi = pnp_acpi_device(dev); 85 struct acpi_hardware_id *id; 86 87 if (!acpi) 88 return 0; 89 90 list_for_each_entry(id, &acpi->pnp.ids, list) { 91 if (!strcmp("INTC0102", id->id)) 92 return 1; 93 } 94 95 return 0; 96 } 97 #else 98 static inline int is_itpm(struct pnp_dev *dev) 99 { 100 return 0; 101 } 102 #endif 103 104 /* Before we attempt to access the TPM we must see that the valid bit is set. 105 * The specification says that this bit is 0 at reset and remains 0 until the 106 * 'TPM has gone through its self test and initialization and has established 107 * correct values in the other bits.' */ 108 static int wait_startup(struct tpm_chip *chip, int l) 109 { 110 unsigned long stop = jiffies + chip->vendor.timeout_a; 111 do { 112 if (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & 113 TPM_ACCESS_VALID) 114 return 0; 115 msleep(TPM_TIMEOUT); 116 } while (time_before(jiffies, stop)); 117 return -1; 118 } 119 120 static int check_locality(struct tpm_chip *chip, int l) 121 { 122 if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & 123 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == 124 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) 125 return chip->vendor.locality = l; 126 127 return -1; 128 } 129 130 static void release_locality(struct tpm_chip *chip, int l, int force) 131 { 132 if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & 133 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) == 134 (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) 135 iowrite8(TPM_ACCESS_ACTIVE_LOCALITY, 136 chip->vendor.iobase + TPM_ACCESS(l)); 137 } 138 139 static int request_locality(struct tpm_chip *chip, int l) 140 { 141 unsigned long stop, timeout; 142 long rc; 143 144 if (check_locality(chip, l) >= 0) 145 return l; 146 147 iowrite8(TPM_ACCESS_REQUEST_USE, 148 chip->vendor.iobase + TPM_ACCESS(l)); 149 150 stop = jiffies + chip->vendor.timeout_a; 151 152 if (chip->vendor.irq) { 153 again: 154 timeout = stop - jiffies; 155 if ((long)timeout <= 0) 156 return -1; 157 rc = wait_event_interruptible_timeout(chip->vendor.int_queue, 158 (check_locality 159 (chip, l) >= 0), 160 timeout); 161 if (rc > 0) 162 return l; 163 if (rc == -ERESTARTSYS && freezing(current)) { 164 clear_thread_flag(TIF_SIGPENDING); 165 goto again; 166 } 167 } else { 168 /* wait for burstcount */ 169 do { 170 if (check_locality(chip, l) >= 0) 171 return l; 172 msleep(TPM_TIMEOUT); 173 } 174 while (time_before(jiffies, stop)); 175 } 176 return -1; 177 } 178 179 static u8 tpm_tis_status(struct tpm_chip *chip) 180 { 181 return ioread8(chip->vendor.iobase + 182 TPM_STS(chip->vendor.locality)); 183 } 184 185 static void tpm_tis_ready(struct tpm_chip *chip) 186 { 187 /* this causes the current command to be aborted */ 188 iowrite8(TPM_STS_COMMAND_READY, 189 chip->vendor.iobase + TPM_STS(chip->vendor.locality)); 190 } 191 192 static int get_burstcount(struct tpm_chip *chip) 193 { 194 unsigned long stop; 195 int burstcnt; 196 197 /* wait for burstcount */ 198 /* which timeout value, spec has 2 answers (c & d) */ 199 stop = jiffies + chip->vendor.timeout_d; 200 do { 201 burstcnt = ioread8(chip->vendor.iobase + 202 TPM_STS(chip->vendor.locality) + 1); 203 burstcnt += ioread8(chip->vendor.iobase + 204 TPM_STS(chip->vendor.locality) + 205 2) << 8; 206 if (burstcnt) 207 return burstcnt; 208 msleep(TPM_TIMEOUT); 209 } while (time_before(jiffies, stop)); 210 return -EBUSY; 211 } 212 213 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) 214 { 215 int size = 0, burstcnt; 216 while (size < count && 217 wait_for_tpm_stat(chip, 218 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 219 chip->vendor.timeout_c, 220 &chip->vendor.read_queue, true) 221 == 0) { 222 burstcnt = get_burstcount(chip); 223 for (; burstcnt > 0 && size < count; burstcnt--) 224 buf[size++] = ioread8(chip->vendor.iobase + 225 TPM_DATA_FIFO(chip->vendor. 226 locality)); 227 } 228 return size; 229 } 230 231 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count) 232 { 233 int size = 0; 234 int expected, status; 235 236 if (count < TPM_HEADER_SIZE) { 237 size = -EIO; 238 goto out; 239 } 240 241 /* read first 10 bytes, including tag, paramsize, and result */ 242 if ((size = 243 recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) { 244 dev_err(chip->dev, "Unable to read header\n"); 245 goto out; 246 } 247 248 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 249 if (expected > count) { 250 size = -EIO; 251 goto out; 252 } 253 254 if ((size += 255 recv_data(chip, &buf[TPM_HEADER_SIZE], 256 expected - TPM_HEADER_SIZE)) < expected) { 257 dev_err(chip->dev, "Unable to read remainder of result\n"); 258 size = -ETIME; 259 goto out; 260 } 261 262 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 263 &chip->vendor.int_queue, false); 264 status = tpm_tis_status(chip); 265 if (status & TPM_STS_DATA_AVAIL) { /* retry? */ 266 dev_err(chip->dev, "Error left over data\n"); 267 size = -EIO; 268 goto out; 269 } 270 271 out: 272 tpm_tis_ready(chip); 273 release_locality(chip, chip->vendor.locality, 0); 274 return size; 275 } 276 277 static bool itpm; 278 module_param(itpm, bool, 0444); 279 MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)"); 280 281 /* 282 * If interrupts are used (signaled by an irq set in the vendor structure) 283 * tpm.c can skip polling for the data to be available as the interrupt is 284 * waited for here 285 */ 286 static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len) 287 { 288 int rc, status, burstcnt; 289 size_t count = 0; 290 291 if (request_locality(chip, 0) < 0) 292 return -EBUSY; 293 294 status = tpm_tis_status(chip); 295 if ((status & TPM_STS_COMMAND_READY) == 0) { 296 tpm_tis_ready(chip); 297 if (wait_for_tpm_stat 298 (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b, 299 &chip->vendor.int_queue, false) < 0) { 300 rc = -ETIME; 301 goto out_err; 302 } 303 } 304 305 while (count < len - 1) { 306 burstcnt = get_burstcount(chip); 307 for (; burstcnt > 0 && count < len - 1; burstcnt--) { 308 iowrite8(buf[count], chip->vendor.iobase + 309 TPM_DATA_FIFO(chip->vendor.locality)); 310 count++; 311 } 312 313 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 314 &chip->vendor.int_queue, false); 315 status = tpm_tis_status(chip); 316 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) { 317 rc = -EIO; 318 goto out_err; 319 } 320 } 321 322 /* write last byte */ 323 iowrite8(buf[count], 324 chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality)); 325 wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c, 326 &chip->vendor.int_queue, false); 327 status = tpm_tis_status(chip); 328 if ((status & TPM_STS_DATA_EXPECT) != 0) { 329 rc = -EIO; 330 goto out_err; 331 } 332 333 return 0; 334 335 out_err: 336 tpm_tis_ready(chip); 337 release_locality(chip, chip->vendor.locality, 0); 338 return rc; 339 } 340 341 /* 342 * If interrupts are used (signaled by an irq set in the vendor structure) 343 * tpm.c can skip polling for the data to be available as the interrupt is 344 * waited for here 345 */ 346 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len) 347 { 348 int rc; 349 u32 ordinal; 350 351 rc = tpm_tis_send_data(chip, buf, len); 352 if (rc < 0) 353 return rc; 354 355 /* go and do it */ 356 iowrite8(TPM_STS_GO, 357 chip->vendor.iobase + TPM_STS(chip->vendor.locality)); 358 359 if (chip->vendor.irq) { 360 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 361 if (wait_for_tpm_stat 362 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, 363 tpm_calc_ordinal_duration(chip, ordinal), 364 &chip->vendor.read_queue, false) < 0) { 365 rc = -ETIME; 366 goto out_err; 367 } 368 } 369 return len; 370 out_err: 371 tpm_tis_ready(chip); 372 release_locality(chip, chip->vendor.locality, 0); 373 return rc; 374 } 375 376 /* 377 * Early probing for iTPM with STS_DATA_EXPECT flaw. 378 * Try sending command without itpm flag set and if that 379 * fails, repeat with itpm flag set. 380 */ 381 static int probe_itpm(struct tpm_chip *chip) 382 { 383 int rc = 0; 384 u8 cmd_getticks[] = { 385 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a, 386 0x00, 0x00, 0x00, 0xf1 387 }; 388 size_t len = sizeof(cmd_getticks); 389 bool rem_itpm = itpm; 390 u16 vendor = ioread16(chip->vendor.iobase + TPM_DID_VID(0)); 391 392 /* probe only iTPMS */ 393 if (vendor != TPM_VID_INTEL) 394 return 0; 395 396 itpm = false; 397 398 rc = tpm_tis_send_data(chip, cmd_getticks, len); 399 if (rc == 0) 400 goto out; 401 402 tpm_tis_ready(chip); 403 release_locality(chip, chip->vendor.locality, 0); 404 405 itpm = true; 406 407 rc = tpm_tis_send_data(chip, cmd_getticks, len); 408 if (rc == 0) { 409 dev_info(chip->dev, "Detected an iTPM.\n"); 410 rc = 1; 411 } else 412 rc = -EFAULT; 413 414 out: 415 itpm = rem_itpm; 416 tpm_tis_ready(chip); 417 release_locality(chip, chip->vendor.locality, 0); 418 419 return rc; 420 } 421 422 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status) 423 { 424 switch (chip->vendor.manufacturer_id) { 425 case TPM_VID_WINBOND: 426 return ((status == TPM_STS_VALID) || 427 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY))); 428 case TPM_VID_STM: 429 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)); 430 default: 431 return (status == TPM_STS_COMMAND_READY); 432 } 433 } 434 435 static struct tpm_vendor_specific tpm_tis = { 436 .status = tpm_tis_status, 437 .recv = tpm_tis_recv, 438 .send = tpm_tis_send, 439 .cancel = tpm_tis_ready, 440 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 441 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 442 .req_canceled = tpm_tis_req_canceled, 443 }; 444 445 static irqreturn_t tis_int_probe(int irq, void *dev_id) 446 { 447 struct tpm_chip *chip = dev_id; 448 u32 interrupt; 449 450 interrupt = ioread32(chip->vendor.iobase + 451 TPM_INT_STATUS(chip->vendor.locality)); 452 453 if (interrupt == 0) 454 return IRQ_NONE; 455 456 chip->vendor.probed_irq = irq; 457 458 /* Clear interrupts handled with TPM_EOI */ 459 iowrite32(interrupt, 460 chip->vendor.iobase + 461 TPM_INT_STATUS(chip->vendor.locality)); 462 return IRQ_HANDLED; 463 } 464 465 static irqreturn_t tis_int_handler(int dummy, void *dev_id) 466 { 467 struct tpm_chip *chip = dev_id; 468 u32 interrupt; 469 int i; 470 471 interrupt = ioread32(chip->vendor.iobase + 472 TPM_INT_STATUS(chip->vendor.locality)); 473 474 if (interrupt == 0) 475 return IRQ_NONE; 476 477 if (interrupt & TPM_INTF_DATA_AVAIL_INT) 478 wake_up_interruptible(&chip->vendor.read_queue); 479 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT) 480 for (i = 0; i < 5; i++) 481 if (check_locality(chip, i) >= 0) 482 break; 483 if (interrupt & 484 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT | 485 TPM_INTF_CMD_READY_INT)) 486 wake_up_interruptible(&chip->vendor.int_queue); 487 488 /* Clear interrupts handled with TPM_EOI */ 489 iowrite32(interrupt, 490 chip->vendor.iobase + 491 TPM_INT_STATUS(chip->vendor.locality)); 492 ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality)); 493 return IRQ_HANDLED; 494 } 495 496 static bool interrupts = true; 497 module_param(interrupts, bool, 0444); 498 MODULE_PARM_DESC(interrupts, "Enable interrupts"); 499 500 static int tpm_tis_init(struct device *dev, resource_size_t start, 501 resource_size_t len, unsigned int irq) 502 { 503 u32 vendor, intfcaps, intmask; 504 int rc, i, irq_s, irq_e, probe; 505 struct tpm_chip *chip; 506 507 if (!(chip = tpm_register_hardware(dev, &tpm_tis))) 508 return -ENODEV; 509 510 chip->vendor.iobase = ioremap(start, len); 511 if (!chip->vendor.iobase) { 512 rc = -EIO; 513 goto out_err; 514 } 515 516 /* Default timeouts */ 517 chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT); 518 chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT); 519 chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT); 520 chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT); 521 522 if (wait_startup(chip, 0) != 0) { 523 rc = -ENODEV; 524 goto out_err; 525 } 526 527 if (request_locality(chip, 0) != 0) { 528 rc = -ENODEV; 529 goto out_err; 530 } 531 532 vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0)); 533 chip->vendor.manufacturer_id = vendor; 534 535 dev_info(dev, 536 "1.2 TPM (device-id 0x%X, rev-id %d)\n", 537 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0))); 538 539 if (!itpm) { 540 probe = probe_itpm(chip); 541 if (probe < 0) { 542 rc = -ENODEV; 543 goto out_err; 544 } 545 itpm = !!probe; 546 } 547 548 if (itpm) 549 dev_info(dev, "Intel iTPM workaround enabled\n"); 550 551 552 /* Figure out the capabilities */ 553 intfcaps = 554 ioread32(chip->vendor.iobase + 555 TPM_INTF_CAPS(chip->vendor.locality)); 556 dev_dbg(dev, "TPM interface capabilities (0x%x):\n", 557 intfcaps); 558 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC) 559 dev_dbg(dev, "\tBurst Count Static\n"); 560 if (intfcaps & TPM_INTF_CMD_READY_INT) 561 dev_dbg(dev, "\tCommand Ready Int Support\n"); 562 if (intfcaps & TPM_INTF_INT_EDGE_FALLING) 563 dev_dbg(dev, "\tInterrupt Edge Falling\n"); 564 if (intfcaps & TPM_INTF_INT_EDGE_RISING) 565 dev_dbg(dev, "\tInterrupt Edge Rising\n"); 566 if (intfcaps & TPM_INTF_INT_LEVEL_LOW) 567 dev_dbg(dev, "\tInterrupt Level Low\n"); 568 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH) 569 dev_dbg(dev, "\tInterrupt Level High\n"); 570 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) 571 dev_dbg(dev, "\tLocality Change Int Support\n"); 572 if (intfcaps & TPM_INTF_STS_VALID_INT) 573 dev_dbg(dev, "\tSts Valid Int Support\n"); 574 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) 575 dev_dbg(dev, "\tData Avail Int Support\n"); 576 577 /* get the timeouts before testing for irqs */ 578 if (tpm_get_timeouts(chip)) { 579 dev_err(dev, "Could not get TPM timeouts and durations\n"); 580 rc = -ENODEV; 581 goto out_err; 582 } 583 584 if (tpm_do_selftest(chip)) { 585 dev_err(dev, "TPM self test failed\n"); 586 rc = -ENODEV; 587 goto out_err; 588 } 589 590 /* INTERRUPT Setup */ 591 init_waitqueue_head(&chip->vendor.read_queue); 592 init_waitqueue_head(&chip->vendor.int_queue); 593 594 intmask = 595 ioread32(chip->vendor.iobase + 596 TPM_INT_ENABLE(chip->vendor.locality)); 597 598 intmask |= TPM_INTF_CMD_READY_INT 599 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT 600 | TPM_INTF_STS_VALID_INT; 601 602 iowrite32(intmask, 603 chip->vendor.iobase + 604 TPM_INT_ENABLE(chip->vendor.locality)); 605 if (interrupts) 606 chip->vendor.irq = irq; 607 if (interrupts && !chip->vendor.irq) { 608 irq_s = 609 ioread8(chip->vendor.iobase + 610 TPM_INT_VECTOR(chip->vendor.locality)); 611 if (irq_s) { 612 irq_e = irq_s; 613 } else { 614 irq_s = 3; 615 irq_e = 15; 616 } 617 618 for (i = irq_s; i <= irq_e && chip->vendor.irq == 0; i++) { 619 iowrite8(i, chip->vendor.iobase + 620 TPM_INT_VECTOR(chip->vendor.locality)); 621 if (request_irq 622 (i, tis_int_probe, IRQF_SHARED, 623 chip->vendor.miscdev.name, chip) != 0) { 624 dev_info(chip->dev, 625 "Unable to request irq: %d for probe\n", 626 i); 627 continue; 628 } 629 630 /* Clear all existing */ 631 iowrite32(ioread32 632 (chip->vendor.iobase + 633 TPM_INT_STATUS(chip->vendor.locality)), 634 chip->vendor.iobase + 635 TPM_INT_STATUS(chip->vendor.locality)); 636 637 /* Turn on */ 638 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE, 639 chip->vendor.iobase + 640 TPM_INT_ENABLE(chip->vendor.locality)); 641 642 chip->vendor.probed_irq = 0; 643 644 /* Generate Interrupts */ 645 tpm_gen_interrupt(chip); 646 647 chip->vendor.irq = chip->vendor.probed_irq; 648 649 /* free_irq will call into tis_int_probe; 650 clear all irqs we haven't seen while doing 651 tpm_gen_interrupt */ 652 iowrite32(ioread32 653 (chip->vendor.iobase + 654 TPM_INT_STATUS(chip->vendor.locality)), 655 chip->vendor.iobase + 656 TPM_INT_STATUS(chip->vendor.locality)); 657 658 /* Turn off */ 659 iowrite32(intmask, 660 chip->vendor.iobase + 661 TPM_INT_ENABLE(chip->vendor.locality)); 662 free_irq(i, chip); 663 } 664 } 665 if (chip->vendor.irq) { 666 iowrite8(chip->vendor.irq, 667 chip->vendor.iobase + 668 TPM_INT_VECTOR(chip->vendor.locality)); 669 if (request_irq 670 (chip->vendor.irq, tis_int_handler, IRQF_SHARED, 671 chip->vendor.miscdev.name, chip) != 0) { 672 dev_info(chip->dev, 673 "Unable to request irq: %d for use\n", 674 chip->vendor.irq); 675 chip->vendor.irq = 0; 676 } else { 677 /* Clear all existing */ 678 iowrite32(ioread32 679 (chip->vendor.iobase + 680 TPM_INT_STATUS(chip->vendor.locality)), 681 chip->vendor.iobase + 682 TPM_INT_STATUS(chip->vendor.locality)); 683 684 /* Turn on */ 685 iowrite32(intmask | TPM_GLOBAL_INT_ENABLE, 686 chip->vendor.iobase + 687 TPM_INT_ENABLE(chip->vendor.locality)); 688 } 689 } 690 691 INIT_LIST_HEAD(&chip->vendor.list); 692 mutex_lock(&tis_lock); 693 list_add(&chip->vendor.list, &tis_chips); 694 mutex_unlock(&tis_lock); 695 696 697 return 0; 698 out_err: 699 if (chip->vendor.iobase) 700 iounmap(chip->vendor.iobase); 701 tpm_remove_hardware(chip->dev); 702 return rc; 703 } 704 705 #if defined(CONFIG_PNP) || defined(CONFIG_PM_SLEEP) 706 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip) 707 { 708 u32 intmask; 709 710 /* reenable interrupts that device may have lost or 711 BIOS/firmware may have disabled */ 712 iowrite8(chip->vendor.irq, chip->vendor.iobase + 713 TPM_INT_VECTOR(chip->vendor.locality)); 714 715 intmask = 716 ioread32(chip->vendor.iobase + 717 TPM_INT_ENABLE(chip->vendor.locality)); 718 719 intmask |= TPM_INTF_CMD_READY_INT 720 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT 721 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE; 722 723 iowrite32(intmask, 724 chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality)); 725 } 726 #endif 727 728 #ifdef CONFIG_PM_SLEEP 729 static int tpm_tis_resume(struct device *dev) 730 { 731 struct tpm_chip *chip = dev_get_drvdata(dev); 732 int ret; 733 734 if (chip->vendor.irq) 735 tpm_tis_reenable_interrupts(chip); 736 737 ret = tpm_pm_resume(dev); 738 if (!ret) 739 tpm_do_selftest(chip); 740 741 return ret; 742 } 743 #endif 744 745 static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume); 746 747 #ifdef CONFIG_PNP 748 static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev, 749 const struct pnp_device_id *pnp_id) 750 { 751 resource_size_t start, len; 752 unsigned int irq = 0; 753 754 start = pnp_mem_start(pnp_dev, 0); 755 len = pnp_mem_len(pnp_dev, 0); 756 757 if (pnp_irq_valid(pnp_dev, 0)) 758 irq = pnp_irq(pnp_dev, 0); 759 else 760 interrupts = false; 761 762 if (is_itpm(pnp_dev)) 763 itpm = true; 764 765 return tpm_tis_init(&pnp_dev->dev, start, len, irq); 766 } 767 768 static struct pnp_device_id tpm_pnp_tbl[] = { 769 {"PNP0C31", 0}, /* TPM */ 770 {"ATM1200", 0}, /* Atmel */ 771 {"IFX0102", 0}, /* Infineon */ 772 {"BCM0101", 0}, /* Broadcom */ 773 {"BCM0102", 0}, /* Broadcom */ 774 {"NSC1200", 0}, /* National */ 775 {"ICO0102", 0}, /* Intel */ 776 /* Add new here */ 777 {"", 0}, /* User Specified */ 778 {"", 0} /* Terminator */ 779 }; 780 MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl); 781 782 static void tpm_tis_pnp_remove(struct pnp_dev *dev) 783 { 784 struct tpm_chip *chip = pnp_get_drvdata(dev); 785 786 tpm_dev_vendor_release(chip); 787 788 kfree(chip); 789 } 790 791 792 static struct pnp_driver tis_pnp_driver = { 793 .name = "tpm_tis", 794 .id_table = tpm_pnp_tbl, 795 .probe = tpm_tis_pnp_init, 796 .remove = tpm_tis_pnp_remove, 797 #ifdef CONFIG_PM_SLEEP 798 .driver = { 799 .pm = &tpm_tis_pm, 800 }, 801 #endif 802 }; 803 804 #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2 805 module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id, 806 sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444); 807 MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe"); 808 #endif 809 810 static struct platform_driver tis_drv = { 811 .driver = { 812 .name = "tpm_tis", 813 .owner = THIS_MODULE, 814 .pm = &tpm_tis_pm, 815 }, 816 }; 817 818 static struct platform_device *pdev; 819 820 static bool force; 821 module_param(force, bool, 0444); 822 MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry"); 823 static int __init init_tis(void) 824 { 825 int rc; 826 #ifdef CONFIG_PNP 827 if (!force) 828 return pnp_register_driver(&tis_pnp_driver); 829 #endif 830 831 rc = platform_driver_register(&tis_drv); 832 if (rc < 0) 833 return rc; 834 pdev = platform_device_register_simple("tpm_tis", -1, NULL, 0); 835 if (IS_ERR(pdev)) { 836 rc = PTR_ERR(pdev); 837 goto err_dev; 838 } 839 rc = tpm_tis_init(&pdev->dev, TIS_MEM_BASE, TIS_MEM_LEN, 0); 840 if (rc) 841 goto err_init; 842 return 0; 843 err_init: 844 platform_device_unregister(pdev); 845 err_dev: 846 platform_driver_unregister(&tis_drv); 847 return rc; 848 } 849 850 static void __exit cleanup_tis(void) 851 { 852 struct tpm_vendor_specific *i, *j; 853 struct tpm_chip *chip; 854 mutex_lock(&tis_lock); 855 list_for_each_entry_safe(i, j, &tis_chips, list) { 856 chip = to_tpm_chip(i); 857 tpm_remove_hardware(chip->dev); 858 iowrite32(~TPM_GLOBAL_INT_ENABLE & 859 ioread32(chip->vendor.iobase + 860 TPM_INT_ENABLE(chip->vendor. 861 locality)), 862 chip->vendor.iobase + 863 TPM_INT_ENABLE(chip->vendor.locality)); 864 release_locality(chip, chip->vendor.locality, 1); 865 if (chip->vendor.irq) 866 free_irq(chip->vendor.irq, chip); 867 iounmap(i->iobase); 868 list_del(&i->list); 869 } 870 mutex_unlock(&tis_lock); 871 #ifdef CONFIG_PNP 872 if (!force) { 873 pnp_unregister_driver(&tis_pnp_driver); 874 return; 875 } 876 #endif 877 platform_device_unregister(pdev); 878 platform_driver_unregister(&tis_drv); 879 } 880 881 module_init(init_tis); 882 module_exit(cleanup_tis); 883 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); 884 MODULE_DESCRIPTION("TPM Driver"); 885 MODULE_VERSION("2.0"); 886 MODULE_LICENSE("GPL"); 887