11da177e4SLinus Torvalds /* 21da177e4SLinus Torvalds * Copyright (C) 2004 IBM Corporation 31da177e4SLinus Torvalds * 41da177e4SLinus Torvalds * Authors: 51da177e4SLinus Torvalds * Leendert van Doorn <leendert@watson.ibm.com> 61da177e4SLinus Torvalds * Dave Safford <safford@watson.ibm.com> 71da177e4SLinus Torvalds * Reiner Sailer <sailer@watson.ibm.com> 81da177e4SLinus Torvalds * Kylene Hall <kjhall@us.ibm.com> 91da177e4SLinus Torvalds * 101da177e4SLinus Torvalds * Maintained by: <tpmdd_devel@lists.sourceforge.net> 111da177e4SLinus Torvalds * 121da177e4SLinus Torvalds * Device driver for TCG/TCPA TPM (trusted platform module). 131da177e4SLinus Torvalds * Specifications at www.trustedcomputinggroup.org 141da177e4SLinus Torvalds * 151da177e4SLinus Torvalds * This program is free software; you can redistribute it and/or 161da177e4SLinus Torvalds * modify it under the terms of the GNU General Public License as 171da177e4SLinus Torvalds * published by the Free Software Foundation, version 2 of the 181da177e4SLinus Torvalds * License. 191da177e4SLinus Torvalds * 201da177e4SLinus Torvalds */ 211da177e4SLinus Torvalds 221da177e4SLinus Torvalds #include "tpm.h" 231da177e4SLinus Torvalds 241da177e4SLinus Torvalds /* National definitions */ 253122a88aSKylene Hall enum tpm_nsc_addr{ 26e1a23c66SKylene Hall TPM_NSC_IRQ = 0x07, 27e1a23c66SKylene Hall TPM_NSC_BASE0_HI = 0x60, 28e1a23c66SKylene Hall TPM_NSC_BASE0_LO = 0x61, 29e1a23c66SKylene Hall TPM_NSC_BASE1_HI = 0x62, 30e1a23c66SKylene Hall TPM_NSC_BASE1_LO = 0x63 313122a88aSKylene Hall }; 321da177e4SLinus Torvalds 333122a88aSKylene Hall enum tpm_nsc_index { 343122a88aSKylene Hall NSC_LDN_INDEX = 0x07, 353122a88aSKylene Hall NSC_SID_INDEX = 0x20, 363122a88aSKylene Hall NSC_LDC_INDEX = 0x30, 373122a88aSKylene Hall NSC_DIO_INDEX = 0x60, 383122a88aSKylene Hall NSC_CIO_INDEX = 0x62, 393122a88aSKylene Hall NSC_IRQ_INDEX = 0x70, 403122a88aSKylene Hall NSC_ITS_INDEX = 0x71 413122a88aSKylene Hall }; 421da177e4SLinus Torvalds 433122a88aSKylene Hall enum tpm_nsc_status_loc { 443122a88aSKylene Hall NSC_STATUS = 0x01, 453122a88aSKylene Hall NSC_COMMAND = 0x01, 463122a88aSKylene Hall NSC_DATA = 0x00 473122a88aSKylene Hall }; 481da177e4SLinus Torvalds 491da177e4SLinus Torvalds /* status bits */ 503122a88aSKylene Hall enum tpm_nsc_status { 513122a88aSKylene Hall NSC_STATUS_OBF = 0x01, /* output buffer full */ 523122a88aSKylene Hall NSC_STATUS_IBF = 0x02, /* input buffer full */ 533122a88aSKylene Hall NSC_STATUS_F0 = 0x04, /* F0 */ 543122a88aSKylene Hall NSC_STATUS_A2 = 0x08, /* A2 */ 553122a88aSKylene Hall NSC_STATUS_RDY = 0x10, /* ready to receive command */ 563122a88aSKylene Hall NSC_STATUS_IBR = 0x20 /* ready to receive data */ 573122a88aSKylene Hall }; 58*daacdfa6SKylene Jo Hall 591da177e4SLinus Torvalds /* command bits */ 603122a88aSKylene Hall enum tpm_nsc_cmd_mode { 613122a88aSKylene Hall NSC_COMMAND_NORMAL = 0x01, /* normal mode */ 623122a88aSKylene Hall NSC_COMMAND_EOC = 0x03, 633122a88aSKylene Hall NSC_COMMAND_CANCEL = 0x22 643122a88aSKylene Hall }; 651da177e4SLinus Torvalds /* 661da177e4SLinus Torvalds * Wait for a certain status to appear 671da177e4SLinus Torvalds */ 681da177e4SLinus Torvalds static int wait_for_stat(struct tpm_chip *chip, u8 mask, u8 val, u8 * data) 691da177e4SLinus Torvalds { 70700d8bdcSNishanth Aravamudan unsigned long stop; 711da177e4SLinus Torvalds 721da177e4SLinus Torvalds /* status immediately available check */ 731da177e4SLinus Torvalds *data = inb(chip->vendor->base + NSC_STATUS); 741da177e4SLinus Torvalds if ((*data & mask) == val) 751da177e4SLinus Torvalds return 0; 761da177e4SLinus Torvalds 771da177e4SLinus Torvalds /* wait for status */ 78700d8bdcSNishanth Aravamudan stop = jiffies + 10 * HZ; 791da177e4SLinus Torvalds do { 80700d8bdcSNishanth Aravamudan msleep(TPM_TIMEOUT); 811da177e4SLinus Torvalds *data = inb(chip->vendor->base + 1); 82700d8bdcSNishanth Aravamudan if ((*data & mask) == val) 831da177e4SLinus Torvalds return 0; 841da177e4SLinus Torvalds } 85700d8bdcSNishanth Aravamudan while (time_before(jiffies, stop)); 861da177e4SLinus Torvalds 871da177e4SLinus Torvalds return -EBUSY; 881da177e4SLinus Torvalds } 891da177e4SLinus Torvalds 901da177e4SLinus Torvalds static int nsc_wait_for_ready(struct tpm_chip *chip) 911da177e4SLinus Torvalds { 921da177e4SLinus Torvalds int status; 93700d8bdcSNishanth Aravamudan unsigned long stop; 941da177e4SLinus Torvalds 951da177e4SLinus Torvalds /* status immediately available check */ 961da177e4SLinus Torvalds status = inb(chip->vendor->base + NSC_STATUS); 971da177e4SLinus Torvalds if (status & NSC_STATUS_OBF) 981da177e4SLinus Torvalds status = inb(chip->vendor->base + NSC_DATA); 991da177e4SLinus Torvalds if (status & NSC_STATUS_RDY) 1001da177e4SLinus Torvalds return 0; 1011da177e4SLinus Torvalds 1021da177e4SLinus Torvalds /* wait for status */ 103700d8bdcSNishanth Aravamudan stop = jiffies + 100; 1041da177e4SLinus Torvalds do { 105700d8bdcSNishanth Aravamudan msleep(TPM_TIMEOUT); 1061da177e4SLinus Torvalds status = inb(chip->vendor->base + NSC_STATUS); 1071da177e4SLinus Torvalds if (status & NSC_STATUS_OBF) 1081da177e4SLinus Torvalds status = inb(chip->vendor->base + NSC_DATA); 109700d8bdcSNishanth Aravamudan if (status & NSC_STATUS_RDY) 1101da177e4SLinus Torvalds return 0; 1111da177e4SLinus Torvalds } 112700d8bdcSNishanth Aravamudan while (time_before(jiffies, stop)); 1131da177e4SLinus Torvalds 1141da177e4SLinus Torvalds dev_info(&chip->pci_dev->dev, "wait for ready failed\n"); 1151da177e4SLinus Torvalds return -EBUSY; 1161da177e4SLinus Torvalds } 1171da177e4SLinus Torvalds 1181da177e4SLinus Torvalds 1191da177e4SLinus Torvalds static int tpm_nsc_recv(struct tpm_chip *chip, u8 * buf, size_t count) 1201da177e4SLinus Torvalds { 1211da177e4SLinus Torvalds u8 *buffer = buf; 1221da177e4SLinus Torvalds u8 data, *p; 1231da177e4SLinus Torvalds u32 size; 1241da177e4SLinus Torvalds __be32 *native_size; 1251da177e4SLinus Torvalds 1261da177e4SLinus Torvalds if (count < 6) 1271da177e4SLinus Torvalds return -EIO; 1281da177e4SLinus Torvalds 1291da177e4SLinus Torvalds if (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0) { 1301da177e4SLinus Torvalds dev_err(&chip->pci_dev->dev, "F0 timeout\n"); 1311da177e4SLinus Torvalds return -EIO; 1321da177e4SLinus Torvalds } 1331da177e4SLinus Torvalds if ((data = 1341da177e4SLinus Torvalds inb(chip->vendor->base + NSC_DATA)) != NSC_COMMAND_NORMAL) { 1351da177e4SLinus Torvalds dev_err(&chip->pci_dev->dev, "not in normal mode (0x%x)\n", 1361da177e4SLinus Torvalds data); 1371da177e4SLinus Torvalds return -EIO; 1381da177e4SLinus Torvalds } 1391da177e4SLinus Torvalds 1401da177e4SLinus Torvalds /* read the whole packet */ 1411da177e4SLinus Torvalds for (p = buffer; p < &buffer[count]; p++) { 1421da177e4SLinus Torvalds if (wait_for_stat 1431da177e4SLinus Torvalds (chip, NSC_STATUS_OBF, NSC_STATUS_OBF, &data) < 0) { 1441da177e4SLinus Torvalds dev_err(&chip->pci_dev->dev, 1451da177e4SLinus Torvalds "OBF timeout (while reading data)\n"); 1461da177e4SLinus Torvalds return -EIO; 1471da177e4SLinus Torvalds } 1481da177e4SLinus Torvalds if (data & NSC_STATUS_F0) 1491da177e4SLinus Torvalds break; 1501da177e4SLinus Torvalds *p = inb(chip->vendor->base + NSC_DATA); 1511da177e4SLinus Torvalds } 1521da177e4SLinus Torvalds 153*daacdfa6SKylene Jo Hall if ((data & NSC_STATUS_F0) == 0 && 154*daacdfa6SKylene Jo Hall (wait_for_stat(chip, NSC_STATUS_F0, NSC_STATUS_F0, &data) < 0)) { 1551da177e4SLinus Torvalds dev_err(&chip->pci_dev->dev, "F0 not set\n"); 1561da177e4SLinus Torvalds return -EIO; 1571da177e4SLinus Torvalds } 1581da177e4SLinus Torvalds if ((data = inb(chip->vendor->base + NSC_DATA)) != NSC_COMMAND_EOC) { 1591da177e4SLinus Torvalds dev_err(&chip->pci_dev->dev, 1601da177e4SLinus Torvalds "expected end of command(0x%x)\n", data); 1611da177e4SLinus Torvalds return -EIO; 1621da177e4SLinus Torvalds } 1631da177e4SLinus Torvalds 1641da177e4SLinus Torvalds native_size = (__force __be32 *) (buf + 2); 1651da177e4SLinus Torvalds size = be32_to_cpu(*native_size); 1661da177e4SLinus Torvalds 1671da177e4SLinus Torvalds if (count < size) 1681da177e4SLinus Torvalds return -EIO; 1691da177e4SLinus Torvalds 1701da177e4SLinus Torvalds return size; 1711da177e4SLinus Torvalds } 1721da177e4SLinus Torvalds 1731da177e4SLinus Torvalds static int tpm_nsc_send(struct tpm_chip *chip, u8 * buf, size_t count) 1741da177e4SLinus Torvalds { 1751da177e4SLinus Torvalds u8 data; 1761da177e4SLinus Torvalds int i; 1771da177e4SLinus Torvalds 1781da177e4SLinus Torvalds /* 1791da177e4SLinus Torvalds * If we hit the chip with back to back commands it locks up 1801da177e4SLinus Torvalds * and never set IBF. Hitting it with this "hammer" seems to 1811da177e4SLinus Torvalds * fix it. Not sure why this is needed, we followed the flow 1821da177e4SLinus Torvalds * chart in the manual to the letter. 1831da177e4SLinus Torvalds */ 1841da177e4SLinus Torvalds outb(NSC_COMMAND_CANCEL, chip->vendor->base + NSC_COMMAND); 1851da177e4SLinus Torvalds 1861da177e4SLinus Torvalds if (nsc_wait_for_ready(chip) != 0) 1871da177e4SLinus Torvalds return -EIO; 1881da177e4SLinus Torvalds 1891da177e4SLinus Torvalds if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) { 1901da177e4SLinus Torvalds dev_err(&chip->pci_dev->dev, "IBF timeout\n"); 1911da177e4SLinus Torvalds return -EIO; 1921da177e4SLinus Torvalds } 1931da177e4SLinus Torvalds 1941da177e4SLinus Torvalds outb(NSC_COMMAND_NORMAL, chip->vendor->base + NSC_COMMAND); 1951da177e4SLinus Torvalds if (wait_for_stat(chip, NSC_STATUS_IBR, NSC_STATUS_IBR, &data) < 0) { 1961da177e4SLinus Torvalds dev_err(&chip->pci_dev->dev, "IBR timeout\n"); 1971da177e4SLinus Torvalds return -EIO; 1981da177e4SLinus Torvalds } 1991da177e4SLinus Torvalds 2001da177e4SLinus Torvalds for (i = 0; i < count; i++) { 2011da177e4SLinus Torvalds if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) { 2021da177e4SLinus Torvalds dev_err(&chip->pci_dev->dev, 2031da177e4SLinus Torvalds "IBF timeout (while writing data)\n"); 2041da177e4SLinus Torvalds return -EIO; 2051da177e4SLinus Torvalds } 2061da177e4SLinus Torvalds outb(buf[i], chip->vendor->base + NSC_DATA); 2071da177e4SLinus Torvalds } 2081da177e4SLinus Torvalds 2091da177e4SLinus Torvalds if (wait_for_stat(chip, NSC_STATUS_IBF, 0, &data) < 0) { 2101da177e4SLinus Torvalds dev_err(&chip->pci_dev->dev, "IBF timeout\n"); 2111da177e4SLinus Torvalds return -EIO; 2121da177e4SLinus Torvalds } 2131da177e4SLinus Torvalds outb(NSC_COMMAND_EOC, chip->vendor->base + NSC_COMMAND); 2141da177e4SLinus Torvalds 2151da177e4SLinus Torvalds return count; 2161da177e4SLinus Torvalds } 2171da177e4SLinus Torvalds 2181da177e4SLinus Torvalds static void tpm_nsc_cancel(struct tpm_chip *chip) 2191da177e4SLinus Torvalds { 2201da177e4SLinus Torvalds outb(NSC_COMMAND_CANCEL, chip->vendor->base + NSC_COMMAND); 2211da177e4SLinus Torvalds } 2221da177e4SLinus Torvalds 2231da177e4SLinus Torvalds static struct file_operations nsc_ops = { 2241da177e4SLinus Torvalds .owner = THIS_MODULE, 2251da177e4SLinus Torvalds .llseek = no_llseek, 2261da177e4SLinus Torvalds .open = tpm_open, 2271da177e4SLinus Torvalds .read = tpm_read, 2281da177e4SLinus Torvalds .write = tpm_write, 2291da177e4SLinus Torvalds .release = tpm_release, 2301da177e4SLinus Torvalds }; 2311da177e4SLinus Torvalds 2326659ca2aSKylene Hall static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL); 2336659ca2aSKylene Hall static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL); 2346659ca2aSKylene Hall static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps, NULL); 2356659ca2aSKylene Hall static DEVICE_ATTR(cancel, S_IWUSR|S_IWGRP, NULL, tpm_store_cancel); 2366659ca2aSKylene Hall 2376659ca2aSKylene Hall static struct attribute * nsc_attrs[] = { 2386659ca2aSKylene Hall &dev_attr_pubek.attr, 2396659ca2aSKylene Hall &dev_attr_pcrs.attr, 2406659ca2aSKylene Hall &dev_attr_caps.attr, 2416659ca2aSKylene Hall &dev_attr_cancel.attr, 2426659ca2aSKylene Hall 0, 2436659ca2aSKylene Hall }; 2446659ca2aSKylene Hall 2456659ca2aSKylene Hall static struct attribute_group nsc_attr_grp = { .attrs = nsc_attrs }; 2466659ca2aSKylene Hall 2471da177e4SLinus Torvalds static struct tpm_vendor_specific tpm_nsc = { 2481da177e4SLinus Torvalds .recv = tpm_nsc_recv, 2491da177e4SLinus Torvalds .send = tpm_nsc_send, 2501da177e4SLinus Torvalds .cancel = tpm_nsc_cancel, 2511da177e4SLinus Torvalds .req_complete_mask = NSC_STATUS_OBF, 2521da177e4SLinus Torvalds .req_complete_val = NSC_STATUS_OBF, 253d9e5b6bfSKylene Hall .req_canceled = NSC_STATUS_RDY, 2546659ca2aSKylene Hall .attr_group = &nsc_attr_grp, 2551da177e4SLinus Torvalds .miscdev = { .fops = &nsc_ops, }, 2561da177e4SLinus Torvalds }; 2571da177e4SLinus Torvalds 2581da177e4SLinus Torvalds static int __devinit tpm_nsc_init(struct pci_dev *pci_dev, 2591da177e4SLinus Torvalds const struct pci_device_id *pci_id) 2601da177e4SLinus Torvalds { 2611da177e4SLinus Torvalds int rc = 0; 262e1a23c66SKylene Hall int lo, hi; 263*daacdfa6SKylene Jo Hall int nscAddrBase = TPM_ADDR; 264e1a23c66SKylene Hall 2651da177e4SLinus Torvalds 2661da177e4SLinus Torvalds if (pci_enable_device(pci_dev)) 2671da177e4SLinus Torvalds return -EIO; 2681da177e4SLinus Torvalds 269*daacdfa6SKylene Jo Hall /* select PM channel 1 */ 270*daacdfa6SKylene Jo Hall tpm_write_index(nscAddrBase,NSC_LDN_INDEX, 0x12); 271*daacdfa6SKylene Jo Hall 2721da177e4SLinus Torvalds /* verify that it is a National part (SID) */ 273*daacdfa6SKylene Jo Hall if (tpm_read_index(TPM_ADDR, NSC_SID_INDEX) != 0xEF) { 274*daacdfa6SKylene Jo Hall nscAddrBase = (tpm_read_index(TPM_SUPERIO_ADDR, 0x2C)<<8)| 275*daacdfa6SKylene Jo Hall (tpm_read_index(TPM_SUPERIO_ADDR, 0x2B)&0xFE); 276*daacdfa6SKylene Jo Hall if (tpm_read_index(nscAddrBase, NSC_SID_INDEX) != 0xF6) { 2771da177e4SLinus Torvalds rc = -ENODEV; 2781da177e4SLinus Torvalds goto out_err; 2791da177e4SLinus Torvalds } 280*daacdfa6SKylene Jo Hall } 281*daacdfa6SKylene Jo Hall 282*daacdfa6SKylene Jo Hall hi = tpm_read_index(nscAddrBase, TPM_NSC_BASE0_HI); 283*daacdfa6SKylene Jo Hall lo = tpm_read_index(nscAddrBase, TPM_NSC_BASE0_LO); 284*daacdfa6SKylene Jo Hall tpm_nsc.base = (hi<<8) | lo; 2851da177e4SLinus Torvalds 2861da177e4SLinus Torvalds dev_dbg(&pci_dev->dev, "NSC TPM detected\n"); 2871da177e4SLinus Torvalds dev_dbg(&pci_dev->dev, 2881da177e4SLinus Torvalds "NSC LDN 0x%x, SID 0x%x, SRID 0x%x\n", 289*daacdfa6SKylene Jo Hall tpm_read_index(nscAddrBase,0x07), tpm_read_index(nscAddrBase,0x20), 290*daacdfa6SKylene Jo Hall tpm_read_index(nscAddrBase,0x27)); 2911da177e4SLinus Torvalds dev_dbg(&pci_dev->dev, 2921da177e4SLinus Torvalds "NSC SIOCF1 0x%x SIOCF5 0x%x SIOCF6 0x%x SIOCF8 0x%x\n", 293*daacdfa6SKylene Jo Hall tpm_read_index(nscAddrBase,0x21), tpm_read_index(nscAddrBase,0x25), 294*daacdfa6SKylene Jo Hall tpm_read_index(nscAddrBase,0x26), tpm_read_index(nscAddrBase,0x28)); 2951da177e4SLinus Torvalds dev_dbg(&pci_dev->dev, "NSC IO Base0 0x%x\n", 296*daacdfa6SKylene Jo Hall (tpm_read_index(nscAddrBase,0x60) << 8) | tpm_read_index(nscAddrBase,0x61)); 2971da177e4SLinus Torvalds dev_dbg(&pci_dev->dev, "NSC IO Base1 0x%x\n", 298*daacdfa6SKylene Jo Hall (tpm_read_index(nscAddrBase,0x62) << 8) | tpm_read_index(nscAddrBase,0x63)); 2991da177e4SLinus Torvalds dev_dbg(&pci_dev->dev, "NSC Interrupt number and wakeup 0x%x\n", 300*daacdfa6SKylene Jo Hall tpm_read_index(nscAddrBase,0x70)); 3011da177e4SLinus Torvalds dev_dbg(&pci_dev->dev, "NSC IRQ type select 0x%x\n", 302*daacdfa6SKylene Jo Hall tpm_read_index(nscAddrBase,0x71)); 3031da177e4SLinus Torvalds dev_dbg(&pci_dev->dev, 3041da177e4SLinus Torvalds "NSC DMA channel select0 0x%x, select1 0x%x\n", 305*daacdfa6SKylene Jo Hall tpm_read_index(nscAddrBase,0x74), tpm_read_index(nscAddrBase,0x75)); 3061da177e4SLinus Torvalds dev_dbg(&pci_dev->dev, 3071da177e4SLinus Torvalds "NSC Config " 3081da177e4SLinus Torvalds "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", 309*daacdfa6SKylene Jo Hall tpm_read_index(nscAddrBase,0xF0), tpm_read_index(nscAddrBase,0xF1), 310*daacdfa6SKylene Jo Hall tpm_read_index(nscAddrBase,0xF2), tpm_read_index(nscAddrBase,0xF3), 311*daacdfa6SKylene Jo Hall tpm_read_index(nscAddrBase,0xF4), tpm_read_index(nscAddrBase,0xF5), 312*daacdfa6SKylene Jo Hall tpm_read_index(nscAddrBase,0xF6), tpm_read_index(nscAddrBase,0xF7), 313*daacdfa6SKylene Jo Hall tpm_read_index(nscAddrBase,0xF8), tpm_read_index(nscAddrBase,0xF9)); 3141da177e4SLinus Torvalds 3151da177e4SLinus Torvalds dev_info(&pci_dev->dev, 316*daacdfa6SKylene Jo Hall "NSC TPM revision %d\n", 317*daacdfa6SKylene Jo Hall tpm_read_index(nscAddrBase, 0x27) & 0x1F); 3181da177e4SLinus Torvalds 3191da177e4SLinus Torvalds /* enable the DPM module */ 320*daacdfa6SKylene Jo Hall tpm_write_index(nscAddrBase, NSC_LDC_INDEX, 0x01); 3211da177e4SLinus Torvalds 3221da177e4SLinus Torvalds if ((rc = tpm_register_hardware(pci_dev, &tpm_nsc)) < 0) 3231da177e4SLinus Torvalds goto out_err; 3241da177e4SLinus Torvalds 3251da177e4SLinus Torvalds return 0; 3261da177e4SLinus Torvalds 3271da177e4SLinus Torvalds out_err: 3281da177e4SLinus Torvalds pci_disable_device(pci_dev); 3291da177e4SLinus Torvalds return rc; 3301da177e4SLinus Torvalds } 3311da177e4SLinus Torvalds 3321da177e4SLinus Torvalds static struct pci_device_id tpm_pci_tbl[] __devinitdata = { 3331da177e4SLinus Torvalds {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0)}, 3341da177e4SLinus Torvalds {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12)}, 3351da177e4SLinus Torvalds {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0)}, 3361da177e4SLinus Torvalds {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12)}, 3371da177e4SLinus Torvalds {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0)}, 338*daacdfa6SKylene Jo Hall {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0)}, 339*daacdfa6SKylene Jo Hall {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1)}, 340*daacdfa6SKylene Jo Hall {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0)}, 3411da177e4SLinus Torvalds {PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_LPC)}, 3421da177e4SLinus Torvalds {0,} 3431da177e4SLinus Torvalds }; 3441da177e4SLinus Torvalds 3451da177e4SLinus Torvalds MODULE_DEVICE_TABLE(pci, tpm_pci_tbl); 3461da177e4SLinus Torvalds 3471da177e4SLinus Torvalds static struct pci_driver nsc_pci_driver = { 3481da177e4SLinus Torvalds .name = "tpm_nsc", 3491da177e4SLinus Torvalds .id_table = tpm_pci_tbl, 3501da177e4SLinus Torvalds .probe = tpm_nsc_init, 3511da177e4SLinus Torvalds .remove = __devexit_p(tpm_remove), 3521da177e4SLinus Torvalds .suspend = tpm_pm_suspend, 3531da177e4SLinus Torvalds .resume = tpm_pm_resume, 3541da177e4SLinus Torvalds }; 3551da177e4SLinus Torvalds 3561da177e4SLinus Torvalds static int __init init_nsc(void) 3571da177e4SLinus Torvalds { 3581da177e4SLinus Torvalds return pci_register_driver(&nsc_pci_driver); 3591da177e4SLinus Torvalds } 3601da177e4SLinus Torvalds 3611da177e4SLinus Torvalds static void __exit cleanup_nsc(void) 3621da177e4SLinus Torvalds { 3631da177e4SLinus Torvalds pci_unregister_driver(&nsc_pci_driver); 3641da177e4SLinus Torvalds } 3651da177e4SLinus Torvalds 3661da177e4SLinus Torvalds module_init(init_nsc); 3671da177e4SLinus Torvalds module_exit(cleanup_nsc); 3681da177e4SLinus Torvalds 3691da177e4SLinus Torvalds MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)"); 3701da177e4SLinus Torvalds MODULE_DESCRIPTION("TPM Driver"); 3711da177e4SLinus Torvalds MODULE_VERSION("2.0"); 3721da177e4SLinus Torvalds MODULE_LICENSE("GPL"); 373