1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /****************************************************************************** 3 * Nuvoton TPM I2C Device Driver Interface for WPCT301/NPCT501/NPCT6XX, 4 * based on the TCG TPM Interface Spec version 1.2. 5 * Specifications at www.trustedcomputinggroup.org 6 * 7 * Copyright (C) 2011, Nuvoton Technology Corporation. 8 * Dan Morav <dan.morav@nuvoton.com> 9 * Copyright (C) 2013, Obsidian Research Corp. 10 * Jason Gunthorpe <jgunthorpe@obsidianresearch.com> 11 * 12 * Nuvoton contact information: APC.Support@nuvoton.com 13 *****************************************************************************/ 14 15 #include <linux/init.h> 16 #include <linux/module.h> 17 #include <linux/moduleparam.h> 18 #include <linux/slab.h> 19 #include <linux/interrupt.h> 20 #include <linux/wait.h> 21 #include <linux/i2c.h> 22 #include <linux/of.h> 23 #include <linux/property.h> 24 #include "tpm.h" 25 26 /* I2C interface offsets */ 27 #define TPM_STS 0x00 28 #define TPM_BURST_COUNT 0x01 29 #define TPM_DATA_FIFO_W 0x20 30 #define TPM_DATA_FIFO_R 0x40 31 #define TPM_VID_DID_RID 0x60 32 #define TPM_I2C_RETRIES 5 33 /* 34 * I2C bus device maximum buffer size w/o counting I2C address or command 35 * i.e. max size required for I2C write is 34 = addr, command, 32 bytes data 36 */ 37 #define TPM_I2C_MAX_BUF_SIZE 32 38 #define TPM_I2C_RETRY_COUNT 32 39 #define TPM_I2C_BUS_DELAY 1000 /* usec */ 40 #define TPM_I2C_RETRY_DELAY_SHORT (2 * 1000) /* usec */ 41 #define TPM_I2C_RETRY_DELAY_LONG (10 * 1000) /* usec */ 42 #define TPM_I2C_DELAY_RANGE 300 /* usec */ 43 44 #define OF_IS_TPM2 ((void *)1) 45 #define I2C_IS_TPM2 1 46 47 struct priv_data { 48 int irq; 49 unsigned int intrs; 50 wait_queue_head_t read_queue; 51 }; 52 53 static s32 i2c_nuvoton_read_buf(struct i2c_client *client, u8 offset, u8 size, 54 u8 *data) 55 { 56 s32 status; 57 58 status = i2c_smbus_read_i2c_block_data(client, offset, size, data); 59 dev_dbg(&client->dev, 60 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__, 61 offset, size, (int)size, data, status); 62 return status; 63 } 64 65 static s32 i2c_nuvoton_write_buf(struct i2c_client *client, u8 offset, u8 size, 66 u8 *data) 67 { 68 s32 status; 69 70 status = i2c_smbus_write_i2c_block_data(client, offset, size, data); 71 dev_dbg(&client->dev, 72 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__, 73 offset, size, (int)size, data, status); 74 return status; 75 } 76 77 #define TPM_STS_VALID 0x80 78 #define TPM_STS_COMMAND_READY 0x40 79 #define TPM_STS_GO 0x20 80 #define TPM_STS_DATA_AVAIL 0x10 81 #define TPM_STS_EXPECT 0x08 82 #define TPM_STS_RESPONSE_RETRY 0x02 83 #define TPM_STS_ERR_VAL 0x07 /* bit2...bit0 reads always 0 */ 84 85 #define TPM_I2C_SHORT_TIMEOUT 750 /* ms */ 86 #define TPM_I2C_LONG_TIMEOUT 2000 /* 2 sec */ 87 88 /* read TPM_STS register */ 89 static u8 i2c_nuvoton_read_status(struct tpm_chip *chip) 90 { 91 struct i2c_client *client = to_i2c_client(chip->dev.parent); 92 s32 status; 93 u8 data; 94 95 status = i2c_nuvoton_read_buf(client, TPM_STS, 1, &data); 96 if (status <= 0) { 97 dev_err(&chip->dev, "%s() error return %d\n", __func__, 98 status); 99 data = TPM_STS_ERR_VAL; 100 } 101 102 return data; 103 } 104 105 /* write byte to TPM_STS register */ 106 static s32 i2c_nuvoton_write_status(struct i2c_client *client, u8 data) 107 { 108 s32 status; 109 int i; 110 111 /* this causes the current command to be aborted */ 112 for (i = 0, status = -1; i < TPM_I2C_RETRY_COUNT && status < 0; i++) { 113 status = i2c_nuvoton_write_buf(client, TPM_STS, 1, &data); 114 if (status < 0) 115 usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY 116 + TPM_I2C_DELAY_RANGE); 117 } 118 return status; 119 } 120 121 /* write commandReady to TPM_STS register */ 122 static void i2c_nuvoton_ready(struct tpm_chip *chip) 123 { 124 struct i2c_client *client = to_i2c_client(chip->dev.parent); 125 s32 status; 126 127 /* this causes the current command to be aborted */ 128 status = i2c_nuvoton_write_status(client, TPM_STS_COMMAND_READY); 129 if (status < 0) 130 dev_err(&chip->dev, 131 "%s() fail to write TPM_STS.commandReady\n", __func__); 132 } 133 134 /* read burstCount field from TPM_STS register 135 * return -1 on fail to read */ 136 static int i2c_nuvoton_get_burstcount(struct i2c_client *client, 137 struct tpm_chip *chip) 138 { 139 unsigned long stop = jiffies + chip->timeout_d; 140 s32 status; 141 int burst_count = -1; 142 u8 data; 143 144 /* wait for burstcount to be non-zero */ 145 do { 146 /* in I2C burstCount is 1 byte */ 147 status = i2c_nuvoton_read_buf(client, TPM_BURST_COUNT, 1, 148 &data); 149 if (status > 0 && data > 0) { 150 burst_count = min_t(u8, TPM_I2C_MAX_BUF_SIZE, data); 151 break; 152 } 153 usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY 154 + TPM_I2C_DELAY_RANGE); 155 } while (time_before(jiffies, stop)); 156 157 return burst_count; 158 } 159 160 /* 161 * WPCT301/NPCT501/NPCT6XX SINT# supports only dataAvail 162 * any call to this function which is not waiting for dataAvail will 163 * set queue to NULL to avoid waiting for interrupt 164 */ 165 static bool i2c_nuvoton_check_status(struct tpm_chip *chip, u8 mask, u8 value) 166 { 167 u8 status = i2c_nuvoton_read_status(chip); 168 return (status != TPM_STS_ERR_VAL) && ((status & mask) == value); 169 } 170 171 static int i2c_nuvoton_wait_for_stat(struct tpm_chip *chip, u8 mask, u8 value, 172 u32 timeout, wait_queue_head_t *queue) 173 { 174 if ((chip->flags & TPM_CHIP_FLAG_IRQ) && queue) { 175 s32 rc; 176 struct priv_data *priv = dev_get_drvdata(&chip->dev); 177 unsigned int cur_intrs = priv->intrs; 178 179 enable_irq(priv->irq); 180 rc = wait_event_interruptible_timeout(*queue, 181 cur_intrs != priv->intrs, 182 timeout); 183 if (rc > 0) 184 return 0; 185 /* At this point we know that the SINT pin is asserted, so we 186 * do not need to do i2c_nuvoton_check_status */ 187 } else { 188 unsigned long ten_msec, stop; 189 bool status_valid; 190 191 /* check current status */ 192 status_valid = i2c_nuvoton_check_status(chip, mask, value); 193 if (status_valid) 194 return 0; 195 196 /* use polling to wait for the event */ 197 ten_msec = jiffies + usecs_to_jiffies(TPM_I2C_RETRY_DELAY_LONG); 198 stop = jiffies + timeout; 199 do { 200 if (time_before(jiffies, ten_msec)) 201 usleep_range(TPM_I2C_RETRY_DELAY_SHORT, 202 TPM_I2C_RETRY_DELAY_SHORT 203 + TPM_I2C_DELAY_RANGE); 204 else 205 usleep_range(TPM_I2C_RETRY_DELAY_LONG, 206 TPM_I2C_RETRY_DELAY_LONG 207 + TPM_I2C_DELAY_RANGE); 208 status_valid = i2c_nuvoton_check_status(chip, mask, 209 value); 210 if (status_valid) 211 return 0; 212 } while (time_before(jiffies, stop)); 213 } 214 dev_err(&chip->dev, "%s(%02x, %02x) -> timeout\n", __func__, mask, 215 value); 216 return -ETIMEDOUT; 217 } 218 219 /* wait for dataAvail field to be set in the TPM_STS register */ 220 static int i2c_nuvoton_wait_for_data_avail(struct tpm_chip *chip, u32 timeout, 221 wait_queue_head_t *queue) 222 { 223 return i2c_nuvoton_wait_for_stat(chip, 224 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 225 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 226 timeout, queue); 227 } 228 229 /* Read @count bytes into @buf from TPM_RD_FIFO register */ 230 static int i2c_nuvoton_recv_data(struct i2c_client *client, 231 struct tpm_chip *chip, u8 *buf, size_t count) 232 { 233 struct priv_data *priv = dev_get_drvdata(&chip->dev); 234 s32 rc; 235 int burst_count, bytes2read, size = 0; 236 237 while (size < count && 238 i2c_nuvoton_wait_for_data_avail(chip, 239 chip->timeout_c, 240 &priv->read_queue) == 0) { 241 burst_count = i2c_nuvoton_get_burstcount(client, chip); 242 if (burst_count < 0) { 243 dev_err(&chip->dev, 244 "%s() fail to read burstCount=%d\n", __func__, 245 burst_count); 246 return -EIO; 247 } 248 bytes2read = min_t(size_t, burst_count, count - size); 249 rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_R, 250 bytes2read, &buf[size]); 251 if (rc < 0) { 252 dev_err(&chip->dev, 253 "%s() fail on i2c_nuvoton_read_buf()=%d\n", 254 __func__, rc); 255 return -EIO; 256 } 257 dev_dbg(&chip->dev, "%s(%d):", __func__, bytes2read); 258 size += bytes2read; 259 } 260 261 return size; 262 } 263 264 /* Read TPM command results */ 265 static int i2c_nuvoton_recv(struct tpm_chip *chip, u8 *buf, size_t count) 266 { 267 struct priv_data *priv = dev_get_drvdata(&chip->dev); 268 struct device *dev = chip->dev.parent; 269 struct i2c_client *client = to_i2c_client(dev); 270 s32 rc; 271 int status; 272 int burst_count; 273 int retries; 274 int size = 0; 275 u32 expected; 276 277 if (count < TPM_HEADER_SIZE) { 278 i2c_nuvoton_ready(chip); /* return to idle */ 279 dev_err(dev, "%s() count < header size\n", __func__); 280 return -EIO; 281 } 282 for (retries = 0; retries < TPM_I2C_RETRIES; retries++) { 283 if (retries > 0) { 284 /* if this is not the first trial, set responseRetry */ 285 i2c_nuvoton_write_status(client, 286 TPM_STS_RESPONSE_RETRY); 287 } 288 /* 289 * read first available (> 10 bytes), including: 290 * tag, paramsize, and result 291 */ 292 status = i2c_nuvoton_wait_for_data_avail( 293 chip, chip->timeout_c, &priv->read_queue); 294 if (status != 0) { 295 dev_err(dev, "%s() timeout on dataAvail\n", __func__); 296 size = -ETIMEDOUT; 297 continue; 298 } 299 burst_count = i2c_nuvoton_get_burstcount(client, chip); 300 if (burst_count < 0) { 301 dev_err(dev, "%s() fail to get burstCount\n", __func__); 302 size = -EIO; 303 continue; 304 } 305 size = i2c_nuvoton_recv_data(client, chip, buf, 306 burst_count); 307 if (size < TPM_HEADER_SIZE) { 308 dev_err(dev, "%s() fail to read header\n", __func__); 309 size = -EIO; 310 continue; 311 } 312 /* 313 * convert number of expected bytes field from big endian 32 bit 314 * to machine native 315 */ 316 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 317 if (expected > count || expected < size) { 318 dev_err(dev, "%s() expected > count\n", __func__); 319 size = -EIO; 320 continue; 321 } 322 rc = i2c_nuvoton_recv_data(client, chip, &buf[size], 323 expected - size); 324 size += rc; 325 if (rc < 0 || size < expected) { 326 dev_err(dev, "%s() fail to read remainder of result\n", 327 __func__); 328 size = -EIO; 329 continue; 330 } 331 if (i2c_nuvoton_wait_for_stat( 332 chip, TPM_STS_VALID | TPM_STS_DATA_AVAIL, 333 TPM_STS_VALID, chip->timeout_c, 334 NULL)) { 335 dev_err(dev, "%s() error left over data\n", __func__); 336 size = -ETIMEDOUT; 337 continue; 338 } 339 break; 340 } 341 i2c_nuvoton_ready(chip); 342 dev_dbg(&chip->dev, "%s() -> %d\n", __func__, size); 343 return size; 344 } 345 346 /* 347 * Send TPM command. 348 * 349 * If interrupts are used (signaled by an irq set in the vendor structure) 350 * tpm.c can skip polling for the data to be available as the interrupt is 351 * waited for here 352 */ 353 static int i2c_nuvoton_send(struct tpm_chip *chip, u8 *buf, size_t bufsiz, 354 size_t len) 355 { 356 struct priv_data *priv = dev_get_drvdata(&chip->dev); 357 struct device *dev = chip->dev.parent; 358 struct i2c_client *client = to_i2c_client(dev); 359 u32 ordinal; 360 unsigned long duration; 361 size_t count = 0; 362 int burst_count, bytes2write, retries, rc = -EIO; 363 364 for (retries = 0; retries < TPM_RETRY; retries++) { 365 i2c_nuvoton_ready(chip); 366 if (i2c_nuvoton_wait_for_stat(chip, TPM_STS_COMMAND_READY, 367 TPM_STS_COMMAND_READY, 368 chip->timeout_b, NULL)) { 369 dev_err(dev, "%s() timeout on commandReady\n", 370 __func__); 371 rc = -EIO; 372 continue; 373 } 374 rc = 0; 375 while (count < len - 1) { 376 burst_count = i2c_nuvoton_get_burstcount(client, 377 chip); 378 if (burst_count < 0) { 379 dev_err(dev, "%s() fail get burstCount\n", 380 __func__); 381 rc = -EIO; 382 break; 383 } 384 bytes2write = min_t(size_t, burst_count, 385 len - 1 - count); 386 rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 387 bytes2write, &buf[count]); 388 if (rc < 0) { 389 dev_err(dev, "%s() fail i2cWriteBuf\n", 390 __func__); 391 break; 392 } 393 dev_dbg(dev, "%s(%d):", __func__, bytes2write); 394 count += bytes2write; 395 rc = i2c_nuvoton_wait_for_stat(chip, 396 TPM_STS_VALID | 397 TPM_STS_EXPECT, 398 TPM_STS_VALID | 399 TPM_STS_EXPECT, 400 chip->timeout_c, 401 NULL); 402 if (rc < 0) { 403 dev_err(dev, "%s() timeout on Expect\n", 404 __func__); 405 rc = -ETIMEDOUT; 406 break; 407 } 408 } 409 if (rc < 0) 410 continue; 411 412 /* write last byte */ 413 rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 1, 414 &buf[count]); 415 if (rc < 0) { 416 dev_err(dev, "%s() fail to write last byte\n", 417 __func__); 418 rc = -EIO; 419 continue; 420 } 421 dev_dbg(dev, "%s(last): %02x", __func__, buf[count]); 422 rc = i2c_nuvoton_wait_for_stat(chip, 423 TPM_STS_VALID | TPM_STS_EXPECT, 424 TPM_STS_VALID, 425 chip->timeout_c, NULL); 426 if (rc) { 427 dev_err(dev, "%s() timeout on Expect to clear\n", 428 __func__); 429 rc = -ETIMEDOUT; 430 continue; 431 } 432 break; 433 } 434 if (rc < 0) { 435 /* retries == TPM_RETRY */ 436 i2c_nuvoton_ready(chip); 437 return rc; 438 } 439 /* execute the TPM command */ 440 rc = i2c_nuvoton_write_status(client, TPM_STS_GO); 441 if (rc < 0) { 442 dev_err(dev, "%s() fail to write Go\n", __func__); 443 i2c_nuvoton_ready(chip); 444 return rc; 445 } 446 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 447 duration = tpm_calc_ordinal_duration(chip, ordinal); 448 449 rc = i2c_nuvoton_wait_for_data_avail(chip, duration, &priv->read_queue); 450 if (rc) { 451 dev_err(dev, "%s() timeout command duration %ld\n", 452 __func__, duration); 453 i2c_nuvoton_ready(chip); 454 return rc; 455 } 456 457 dev_dbg(dev, "%s() -> %zd\n", __func__, len); 458 return 0; 459 } 460 461 static bool i2c_nuvoton_req_canceled(struct tpm_chip *chip, u8 status) 462 { 463 return (status == TPM_STS_COMMAND_READY); 464 } 465 466 static const struct tpm_class_ops tpm_i2c = { 467 .flags = TPM_OPS_AUTO_STARTUP, 468 .status = i2c_nuvoton_read_status, 469 .recv = i2c_nuvoton_recv, 470 .send = i2c_nuvoton_send, 471 .cancel = i2c_nuvoton_ready, 472 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 473 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 474 .req_canceled = i2c_nuvoton_req_canceled, 475 }; 476 477 /* The only purpose for the handler is to signal to any waiting threads that 478 * the interrupt is currently being asserted. The driver does not do any 479 * processing triggered by interrupts, and the chip provides no way to mask at 480 * the source (plus that would be slow over I2C). Run the IRQ as a one-shot, 481 * this means it cannot be shared. */ 482 static irqreturn_t i2c_nuvoton_int_handler(int dummy, void *dev_id) 483 { 484 struct tpm_chip *chip = dev_id; 485 struct priv_data *priv = dev_get_drvdata(&chip->dev); 486 487 priv->intrs++; 488 wake_up(&priv->read_queue); 489 disable_irq_nosync(priv->irq); 490 return IRQ_HANDLED; 491 } 492 493 static int get_vid(struct i2c_client *client, u32 *res) 494 { 495 static const u8 vid_did_rid_value[] = { 0x50, 0x10, 0xfe }; 496 u32 temp; 497 s32 rc; 498 499 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 500 return -ENODEV; 501 rc = i2c_nuvoton_read_buf(client, TPM_VID_DID_RID, 4, (u8 *)&temp); 502 if (rc < 0) 503 return rc; 504 505 /* check WPCT301 values - ignore RID */ 506 if (memcmp(&temp, vid_did_rid_value, sizeof(vid_did_rid_value))) { 507 /* 508 * f/w rev 2.81 has an issue where the VID_DID_RID is not 509 * reporting the right value. so give it another chance at 510 * offset 0x20 (FIFO_W). 511 */ 512 rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_W, 4, 513 (u8 *) (&temp)); 514 if (rc < 0) 515 return rc; 516 517 /* check WPCT301 values - ignore RID */ 518 if (memcmp(&temp, vid_did_rid_value, 519 sizeof(vid_did_rid_value))) 520 return -ENODEV; 521 } 522 523 *res = temp; 524 return 0; 525 } 526 527 static int i2c_nuvoton_probe(struct i2c_client *client) 528 { 529 int rc; 530 struct tpm_chip *chip; 531 struct device *dev = &client->dev; 532 struct priv_data *priv; 533 u32 vid = 0; 534 535 rc = get_vid(client, &vid); 536 if (rc) 537 return rc; 538 539 dev_info(dev, "VID: %04X DID: %02X RID: %02X\n", (u16) vid, 540 (u8) (vid >> 16), (u8) (vid >> 24)); 541 542 chip = tpmm_chip_alloc(dev, &tpm_i2c); 543 if (IS_ERR(chip)) 544 return PTR_ERR(chip); 545 546 priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL); 547 if (!priv) 548 return -ENOMEM; 549 550 if (i2c_get_match_data(client)) 551 chip->flags |= TPM_CHIP_FLAG_TPM2; 552 553 init_waitqueue_head(&priv->read_queue); 554 555 /* Default timeouts */ 556 chip->timeout_a = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT); 557 chip->timeout_b = msecs_to_jiffies(TPM_I2C_LONG_TIMEOUT); 558 chip->timeout_c = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT); 559 chip->timeout_d = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT); 560 561 dev_set_drvdata(&chip->dev, priv); 562 563 /* 564 * I2C intfcaps (interrupt capabilitieis) in the chip are hard coded to: 565 * TPM_INTF_INT_LEVEL_LOW | TPM_INTF_DATA_AVAIL_INT 566 * The IRQ should be set in the i2c_board_info (which is done 567 * automatically in of_i2c_register_devices, for device tree users */ 568 priv->irq = client->irq; 569 if (client->irq) { 570 dev_dbg(dev, "%s() priv->irq\n", __func__); 571 rc = devm_request_irq(dev, client->irq, 572 i2c_nuvoton_int_handler, 573 IRQF_TRIGGER_LOW, 574 dev_name(&chip->dev), 575 chip); 576 if (rc) { 577 dev_err(dev, "%s() Unable to request irq: %d for use\n", 578 __func__, priv->irq); 579 priv->irq = 0; 580 } else { 581 chip->flags |= TPM_CHIP_FLAG_IRQ; 582 /* Clear any pending interrupt */ 583 i2c_nuvoton_ready(chip); 584 /* - wait for TPM_STS==0xA0 (stsValid, commandReady) */ 585 rc = i2c_nuvoton_wait_for_stat(chip, 586 TPM_STS_COMMAND_READY, 587 TPM_STS_COMMAND_READY, 588 chip->timeout_b, 589 NULL); 590 if (rc == 0) { 591 /* 592 * TIS is in ready state 593 * write dummy byte to enter reception state 594 * TPM_DATA_FIFO_W <- rc (0) 595 */ 596 rc = i2c_nuvoton_write_buf(client, 597 TPM_DATA_FIFO_W, 598 1, (u8 *) (&rc)); 599 if (rc < 0) 600 return rc; 601 /* TPM_STS <- 0x40 (commandReady) */ 602 i2c_nuvoton_ready(chip); 603 } else { 604 /* 605 * timeout_b reached - command was 606 * aborted. TIS should now be in idle state - 607 * only TPM_STS_VALID should be set 608 */ 609 if (i2c_nuvoton_read_status(chip) != 610 TPM_STS_VALID) 611 return -EIO; 612 } 613 } 614 } 615 616 return tpm_chip_register(chip); 617 } 618 619 static void i2c_nuvoton_remove(struct i2c_client *client) 620 { 621 struct tpm_chip *chip = i2c_get_clientdata(client); 622 623 tpm_chip_unregister(chip); 624 } 625 626 static const struct i2c_device_id i2c_nuvoton_id[] = { 627 {"tpm_i2c_nuvoton"}, 628 {"tpm2_i2c_nuvoton", .driver_data = I2C_IS_TPM2}, 629 {} 630 }; 631 MODULE_DEVICE_TABLE(i2c, i2c_nuvoton_id); 632 633 #ifdef CONFIG_OF 634 static const struct of_device_id i2c_nuvoton_of_match[] = { 635 {.compatible = "nuvoton,npct501"}, 636 {.compatible = "winbond,wpct301"}, 637 {.compatible = "nuvoton,npct601", .data = OF_IS_TPM2}, 638 {}, 639 }; 640 MODULE_DEVICE_TABLE(of, i2c_nuvoton_of_match); 641 #endif 642 643 static SIMPLE_DEV_PM_OPS(i2c_nuvoton_pm_ops, tpm_pm_suspend, tpm_pm_resume); 644 645 static struct i2c_driver i2c_nuvoton_driver = { 646 .id_table = i2c_nuvoton_id, 647 .probe = i2c_nuvoton_probe, 648 .remove = i2c_nuvoton_remove, 649 .driver = { 650 .name = "tpm_i2c_nuvoton", 651 .pm = &i2c_nuvoton_pm_ops, 652 .of_match_table = of_match_ptr(i2c_nuvoton_of_match), 653 }, 654 }; 655 656 module_i2c_driver(i2c_nuvoton_driver); 657 658 MODULE_AUTHOR("Dan Morav <dan.morav@nuvoton.com>"); 659 MODULE_DESCRIPTION("Nuvoton TPM I2C Driver"); 660 MODULE_LICENSE("GPL"); 661