1 /****************************************************************************** 2 * Nuvoton TPM I2C Device Driver Interface for WPCT301/NPCT501/NPCT6XX, 3 * based on the TCG TPM Interface Spec version 1.2. 4 * Specifications at www.trustedcomputinggroup.org 5 * 6 * Copyright (C) 2011, Nuvoton Technology Corporation. 7 * Dan Morav <dan.morav@nuvoton.com> 8 * Copyright (C) 2013, Obsidian Research Corp. 9 * Jason Gunthorpe <jgunthorpe@obsidianresearch.com> 10 * 11 * This program is free software: you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation, either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program. If not, see http://www.gnu.org/licenses/>. 23 * 24 * Nuvoton contact information: APC.Support@nuvoton.com 25 *****************************************************************************/ 26 27 #include <linux/init.h> 28 #include <linux/module.h> 29 #include <linux/moduleparam.h> 30 #include <linux/slab.h> 31 #include <linux/interrupt.h> 32 #include <linux/wait.h> 33 #include <linux/i2c.h> 34 #include <linux/of_device.h> 35 #include "tpm.h" 36 37 /* I2C interface offsets */ 38 #define TPM_STS 0x00 39 #define TPM_BURST_COUNT 0x01 40 #define TPM_DATA_FIFO_W 0x20 41 #define TPM_DATA_FIFO_R 0x40 42 #define TPM_VID_DID_RID 0x60 43 /* TPM command header size */ 44 #define TPM_HEADER_SIZE 10 45 #define TPM_RETRY 5 46 /* 47 * I2C bus device maximum buffer size w/o counting I2C address or command 48 * i.e. max size required for I2C write is 34 = addr, command, 32 bytes data 49 */ 50 #define TPM_I2C_MAX_BUF_SIZE 32 51 #define TPM_I2C_RETRY_COUNT 32 52 #define TPM_I2C_BUS_DELAY 1 /* msec */ 53 #define TPM_I2C_RETRY_DELAY_SHORT 2 /* msec */ 54 #define TPM_I2C_RETRY_DELAY_LONG 10 /* msec */ 55 56 #define OF_IS_TPM2 ((void *)1) 57 #define I2C_IS_TPM2 1 58 59 struct priv_data { 60 int irq; 61 unsigned int intrs; 62 wait_queue_head_t read_queue; 63 }; 64 65 static s32 i2c_nuvoton_read_buf(struct i2c_client *client, u8 offset, u8 size, 66 u8 *data) 67 { 68 s32 status; 69 70 status = i2c_smbus_read_i2c_block_data(client, offset, size, data); 71 dev_dbg(&client->dev, 72 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__, 73 offset, size, (int)size, data, status); 74 return status; 75 } 76 77 static s32 i2c_nuvoton_write_buf(struct i2c_client *client, u8 offset, u8 size, 78 u8 *data) 79 { 80 s32 status; 81 82 status = i2c_smbus_write_i2c_block_data(client, offset, size, data); 83 dev_dbg(&client->dev, 84 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__, 85 offset, size, (int)size, data, status); 86 return status; 87 } 88 89 #define TPM_STS_VALID 0x80 90 #define TPM_STS_COMMAND_READY 0x40 91 #define TPM_STS_GO 0x20 92 #define TPM_STS_DATA_AVAIL 0x10 93 #define TPM_STS_EXPECT 0x08 94 #define TPM_STS_RESPONSE_RETRY 0x02 95 #define TPM_STS_ERR_VAL 0x07 /* bit2...bit0 reads always 0 */ 96 97 #define TPM_I2C_SHORT_TIMEOUT 750 /* ms */ 98 #define TPM_I2C_LONG_TIMEOUT 2000 /* 2 sec */ 99 100 /* read TPM_STS register */ 101 static u8 i2c_nuvoton_read_status(struct tpm_chip *chip) 102 { 103 struct i2c_client *client = to_i2c_client(chip->dev.parent); 104 s32 status; 105 u8 data; 106 107 status = i2c_nuvoton_read_buf(client, TPM_STS, 1, &data); 108 if (status <= 0) { 109 dev_err(&chip->dev, "%s() error return %d\n", __func__, 110 status); 111 data = TPM_STS_ERR_VAL; 112 } 113 114 return data; 115 } 116 117 /* write byte to TPM_STS register */ 118 static s32 i2c_nuvoton_write_status(struct i2c_client *client, u8 data) 119 { 120 s32 status; 121 int i; 122 123 /* this causes the current command to be aborted */ 124 for (i = 0, status = -1; i < TPM_I2C_RETRY_COUNT && status < 0; i++) { 125 status = i2c_nuvoton_write_buf(client, TPM_STS, 1, &data); 126 msleep(TPM_I2C_BUS_DELAY); 127 } 128 return status; 129 } 130 131 /* write commandReady to TPM_STS register */ 132 static void i2c_nuvoton_ready(struct tpm_chip *chip) 133 { 134 struct i2c_client *client = to_i2c_client(chip->dev.parent); 135 s32 status; 136 137 /* this causes the current command to be aborted */ 138 status = i2c_nuvoton_write_status(client, TPM_STS_COMMAND_READY); 139 if (status < 0) 140 dev_err(&chip->dev, 141 "%s() fail to write TPM_STS.commandReady\n", __func__); 142 } 143 144 /* read burstCount field from TPM_STS register 145 * return -1 on fail to read */ 146 static int i2c_nuvoton_get_burstcount(struct i2c_client *client, 147 struct tpm_chip *chip) 148 { 149 unsigned long stop = jiffies + chip->timeout_d; 150 s32 status; 151 int burst_count = -1; 152 u8 data; 153 154 /* wait for burstcount to be non-zero */ 155 do { 156 /* in I2C burstCount is 1 byte */ 157 status = i2c_nuvoton_read_buf(client, TPM_BURST_COUNT, 1, 158 &data); 159 if (status > 0 && data > 0) { 160 burst_count = min_t(u8, TPM_I2C_MAX_BUF_SIZE, data); 161 break; 162 } 163 msleep(TPM_I2C_BUS_DELAY); 164 } while (time_before(jiffies, stop)); 165 166 return burst_count; 167 } 168 169 /* 170 * WPCT301/NPCT501/NPCT6XX SINT# supports only dataAvail 171 * any call to this function which is not waiting for dataAvail will 172 * set queue to NULL to avoid waiting for interrupt 173 */ 174 static bool i2c_nuvoton_check_status(struct tpm_chip *chip, u8 mask, u8 value) 175 { 176 u8 status = i2c_nuvoton_read_status(chip); 177 return (status != TPM_STS_ERR_VAL) && ((status & mask) == value); 178 } 179 180 static int i2c_nuvoton_wait_for_stat(struct tpm_chip *chip, u8 mask, u8 value, 181 u32 timeout, wait_queue_head_t *queue) 182 { 183 if ((chip->flags & TPM_CHIP_FLAG_IRQ) && queue) { 184 s32 rc; 185 struct priv_data *priv = dev_get_drvdata(&chip->dev); 186 unsigned int cur_intrs = priv->intrs; 187 188 enable_irq(priv->irq); 189 rc = wait_event_interruptible_timeout(*queue, 190 cur_intrs != priv->intrs, 191 timeout); 192 if (rc > 0) 193 return 0; 194 /* At this point we know that the SINT pin is asserted, so we 195 * do not need to do i2c_nuvoton_check_status */ 196 } else { 197 unsigned long ten_msec, stop; 198 bool status_valid; 199 200 /* check current status */ 201 status_valid = i2c_nuvoton_check_status(chip, mask, value); 202 if (status_valid) 203 return 0; 204 205 /* use polling to wait for the event */ 206 ten_msec = jiffies + msecs_to_jiffies(TPM_I2C_RETRY_DELAY_LONG); 207 stop = jiffies + timeout; 208 do { 209 if (time_before(jiffies, ten_msec)) 210 msleep(TPM_I2C_RETRY_DELAY_SHORT); 211 else 212 msleep(TPM_I2C_RETRY_DELAY_LONG); 213 status_valid = i2c_nuvoton_check_status(chip, mask, 214 value); 215 if (status_valid) 216 return 0; 217 } while (time_before(jiffies, stop)); 218 } 219 dev_err(&chip->dev, "%s(%02x, %02x) -> timeout\n", __func__, mask, 220 value); 221 return -ETIMEDOUT; 222 } 223 224 /* wait for dataAvail field to be set in the TPM_STS register */ 225 static int i2c_nuvoton_wait_for_data_avail(struct tpm_chip *chip, u32 timeout, 226 wait_queue_head_t *queue) 227 { 228 return i2c_nuvoton_wait_for_stat(chip, 229 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 230 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 231 timeout, queue); 232 } 233 234 /* Read @count bytes into @buf from TPM_RD_FIFO register */ 235 static int i2c_nuvoton_recv_data(struct i2c_client *client, 236 struct tpm_chip *chip, u8 *buf, size_t count) 237 { 238 struct priv_data *priv = dev_get_drvdata(&chip->dev); 239 s32 rc; 240 int burst_count, bytes2read, size = 0; 241 242 while (size < count && 243 i2c_nuvoton_wait_for_data_avail(chip, 244 chip->timeout_c, 245 &priv->read_queue) == 0) { 246 burst_count = i2c_nuvoton_get_burstcount(client, chip); 247 if (burst_count < 0) { 248 dev_err(&chip->dev, 249 "%s() fail to read burstCount=%d\n", __func__, 250 burst_count); 251 return -EIO; 252 } 253 bytes2read = min_t(size_t, burst_count, count - size); 254 rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_R, 255 bytes2read, &buf[size]); 256 if (rc < 0) { 257 dev_err(&chip->dev, 258 "%s() fail on i2c_nuvoton_read_buf()=%d\n", 259 __func__, rc); 260 return -EIO; 261 } 262 dev_dbg(&chip->dev, "%s(%d):", __func__, bytes2read); 263 size += bytes2read; 264 } 265 266 return size; 267 } 268 269 /* Read TPM command results */ 270 static int i2c_nuvoton_recv(struct tpm_chip *chip, u8 *buf, size_t count) 271 { 272 struct priv_data *priv = dev_get_drvdata(&chip->dev); 273 struct device *dev = chip->dev.parent; 274 struct i2c_client *client = to_i2c_client(dev); 275 s32 rc; 276 int expected, status, burst_count, retries, size = 0; 277 278 if (count < TPM_HEADER_SIZE) { 279 i2c_nuvoton_ready(chip); /* return to idle */ 280 dev_err(dev, "%s() count < header size\n", __func__); 281 return -EIO; 282 } 283 for (retries = 0; retries < TPM_RETRY; retries++) { 284 if (retries > 0) { 285 /* if this is not the first trial, set responseRetry */ 286 i2c_nuvoton_write_status(client, 287 TPM_STS_RESPONSE_RETRY); 288 } 289 /* 290 * read first available (> 10 bytes), including: 291 * tag, paramsize, and result 292 */ 293 status = i2c_nuvoton_wait_for_data_avail( 294 chip, chip->timeout_c, &priv->read_queue); 295 if (status != 0) { 296 dev_err(dev, "%s() timeout on dataAvail\n", __func__); 297 size = -ETIMEDOUT; 298 continue; 299 } 300 burst_count = i2c_nuvoton_get_burstcount(client, chip); 301 if (burst_count < 0) { 302 dev_err(dev, "%s() fail to get burstCount\n", __func__); 303 size = -EIO; 304 continue; 305 } 306 size = i2c_nuvoton_recv_data(client, chip, buf, 307 burst_count); 308 if (size < TPM_HEADER_SIZE) { 309 dev_err(dev, "%s() fail to read header\n", __func__); 310 size = -EIO; 311 continue; 312 } 313 /* 314 * convert number of expected bytes field from big endian 32 bit 315 * to machine native 316 */ 317 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 318 if (expected > count) { 319 dev_err(dev, "%s() expected > count\n", __func__); 320 size = -EIO; 321 continue; 322 } 323 rc = i2c_nuvoton_recv_data(client, chip, &buf[size], 324 expected - size); 325 size += rc; 326 if (rc < 0 || size < expected) { 327 dev_err(dev, "%s() fail to read remainder of result\n", 328 __func__); 329 size = -EIO; 330 continue; 331 } 332 if (i2c_nuvoton_wait_for_stat( 333 chip, TPM_STS_VALID | TPM_STS_DATA_AVAIL, 334 TPM_STS_VALID, chip->timeout_c, 335 NULL)) { 336 dev_err(dev, "%s() error left over data\n", __func__); 337 size = -ETIMEDOUT; 338 continue; 339 } 340 break; 341 } 342 i2c_nuvoton_ready(chip); 343 dev_dbg(&chip->dev, "%s() -> %d\n", __func__, size); 344 return size; 345 } 346 347 /* 348 * Send TPM command. 349 * 350 * If interrupts are used (signaled by an irq set in the vendor structure) 351 * tpm.c can skip polling for the data to be available as the interrupt is 352 * waited for here 353 */ 354 static int i2c_nuvoton_send(struct tpm_chip *chip, u8 *buf, size_t len) 355 { 356 struct priv_data *priv = dev_get_drvdata(&chip->dev); 357 struct device *dev = chip->dev.parent; 358 struct i2c_client *client = to_i2c_client(dev); 359 u32 ordinal; 360 size_t count = 0; 361 int burst_count, bytes2write, retries, rc = -EIO; 362 363 for (retries = 0; retries < TPM_RETRY; retries++) { 364 i2c_nuvoton_ready(chip); 365 if (i2c_nuvoton_wait_for_stat(chip, TPM_STS_COMMAND_READY, 366 TPM_STS_COMMAND_READY, 367 chip->timeout_b, NULL)) { 368 dev_err(dev, "%s() timeout on commandReady\n", 369 __func__); 370 rc = -EIO; 371 continue; 372 } 373 rc = 0; 374 while (count < len - 1) { 375 burst_count = i2c_nuvoton_get_burstcount(client, 376 chip); 377 if (burst_count < 0) { 378 dev_err(dev, "%s() fail get burstCount\n", 379 __func__); 380 rc = -EIO; 381 break; 382 } 383 bytes2write = min_t(size_t, burst_count, 384 len - 1 - count); 385 rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 386 bytes2write, &buf[count]); 387 if (rc < 0) { 388 dev_err(dev, "%s() fail i2cWriteBuf\n", 389 __func__); 390 break; 391 } 392 dev_dbg(dev, "%s(%d):", __func__, bytes2write); 393 count += bytes2write; 394 rc = i2c_nuvoton_wait_for_stat(chip, 395 TPM_STS_VALID | 396 TPM_STS_EXPECT, 397 TPM_STS_VALID | 398 TPM_STS_EXPECT, 399 chip->timeout_c, 400 NULL); 401 if (rc < 0) { 402 dev_err(dev, "%s() timeout on Expect\n", 403 __func__); 404 rc = -ETIMEDOUT; 405 break; 406 } 407 } 408 if (rc < 0) 409 continue; 410 411 /* write last byte */ 412 rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 1, 413 &buf[count]); 414 if (rc < 0) { 415 dev_err(dev, "%s() fail to write last byte\n", 416 __func__); 417 rc = -EIO; 418 continue; 419 } 420 dev_dbg(dev, "%s(last): %02x", __func__, buf[count]); 421 rc = i2c_nuvoton_wait_for_stat(chip, 422 TPM_STS_VALID | TPM_STS_EXPECT, 423 TPM_STS_VALID, 424 chip->timeout_c, NULL); 425 if (rc) { 426 dev_err(dev, "%s() timeout on Expect to clear\n", 427 __func__); 428 rc = -ETIMEDOUT; 429 continue; 430 } 431 break; 432 } 433 if (rc < 0) { 434 /* retries == TPM_RETRY */ 435 i2c_nuvoton_ready(chip); 436 return rc; 437 } 438 /* execute the TPM command */ 439 rc = i2c_nuvoton_write_status(client, TPM_STS_GO); 440 if (rc < 0) { 441 dev_err(dev, "%s() fail to write Go\n", __func__); 442 i2c_nuvoton_ready(chip); 443 return rc; 444 } 445 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 446 rc = i2c_nuvoton_wait_for_data_avail(chip, 447 tpm_calc_ordinal_duration(chip, 448 ordinal), 449 &priv->read_queue); 450 if (rc) { 451 dev_err(dev, "%s() timeout command duration\n", __func__); 452 i2c_nuvoton_ready(chip); 453 return rc; 454 } 455 456 dev_dbg(dev, "%s() -> %zd\n", __func__, len); 457 return len; 458 } 459 460 static bool i2c_nuvoton_req_canceled(struct tpm_chip *chip, u8 status) 461 { 462 return (status == TPM_STS_COMMAND_READY); 463 } 464 465 static const struct tpm_class_ops tpm_i2c = { 466 .flags = TPM_OPS_AUTO_STARTUP, 467 .status = i2c_nuvoton_read_status, 468 .recv = i2c_nuvoton_recv, 469 .send = i2c_nuvoton_send, 470 .cancel = i2c_nuvoton_ready, 471 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 472 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 473 .req_canceled = i2c_nuvoton_req_canceled, 474 }; 475 476 /* The only purpose for the handler is to signal to any waiting threads that 477 * the interrupt is currently being asserted. The driver does not do any 478 * processing triggered by interrupts, and the chip provides no way to mask at 479 * the source (plus that would be slow over I2C). Run the IRQ as a one-shot, 480 * this means it cannot be shared. */ 481 static irqreturn_t i2c_nuvoton_int_handler(int dummy, void *dev_id) 482 { 483 struct tpm_chip *chip = dev_id; 484 struct priv_data *priv = dev_get_drvdata(&chip->dev); 485 486 priv->intrs++; 487 wake_up(&priv->read_queue); 488 disable_irq_nosync(priv->irq); 489 return IRQ_HANDLED; 490 } 491 492 static int get_vid(struct i2c_client *client, u32 *res) 493 { 494 static const u8 vid_did_rid_value[] = { 0x50, 0x10, 0xfe }; 495 u32 temp; 496 s32 rc; 497 498 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 499 return -ENODEV; 500 rc = i2c_nuvoton_read_buf(client, TPM_VID_DID_RID, 4, (u8 *)&temp); 501 if (rc < 0) 502 return rc; 503 504 /* check WPCT301 values - ignore RID */ 505 if (memcmp(&temp, vid_did_rid_value, sizeof(vid_did_rid_value))) { 506 /* 507 * f/w rev 2.81 has an issue where the VID_DID_RID is not 508 * reporting the right value. so give it another chance at 509 * offset 0x20 (FIFO_W). 510 */ 511 rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_W, 4, 512 (u8 *) (&temp)); 513 if (rc < 0) 514 return rc; 515 516 /* check WPCT301 values - ignore RID */ 517 if (memcmp(&temp, vid_did_rid_value, 518 sizeof(vid_did_rid_value))) 519 return -ENODEV; 520 } 521 522 *res = temp; 523 return 0; 524 } 525 526 static int i2c_nuvoton_probe(struct i2c_client *client, 527 const struct i2c_device_id *id) 528 { 529 int rc; 530 struct tpm_chip *chip; 531 struct device *dev = &client->dev; 532 struct priv_data *priv; 533 u32 vid = 0; 534 535 rc = get_vid(client, &vid); 536 if (rc) 537 return rc; 538 539 dev_info(dev, "VID: %04X DID: %02X RID: %02X\n", (u16) vid, 540 (u8) (vid >> 16), (u8) (vid >> 24)); 541 542 chip = tpmm_chip_alloc(dev, &tpm_i2c); 543 if (IS_ERR(chip)) 544 return PTR_ERR(chip); 545 546 priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL); 547 if (!priv) 548 return -ENOMEM; 549 550 if (dev->of_node) { 551 const struct of_device_id *of_id; 552 553 of_id = of_match_device(dev->driver->of_match_table, dev); 554 if (of_id && of_id->data == OF_IS_TPM2) 555 chip->flags |= TPM_CHIP_FLAG_TPM2; 556 } else 557 if (id->driver_data == I2C_IS_TPM2) 558 chip->flags |= TPM_CHIP_FLAG_TPM2; 559 560 init_waitqueue_head(&priv->read_queue); 561 562 /* Default timeouts */ 563 chip->timeout_a = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT); 564 chip->timeout_b = msecs_to_jiffies(TPM_I2C_LONG_TIMEOUT); 565 chip->timeout_c = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT); 566 chip->timeout_d = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT); 567 568 dev_set_drvdata(&chip->dev, priv); 569 570 /* 571 * I2C intfcaps (interrupt capabilitieis) in the chip are hard coded to: 572 * TPM_INTF_INT_LEVEL_LOW | TPM_INTF_DATA_AVAIL_INT 573 * The IRQ should be set in the i2c_board_info (which is done 574 * automatically in of_i2c_register_devices, for device tree users */ 575 priv->irq = client->irq; 576 if (client->irq) { 577 dev_dbg(dev, "%s() priv->irq\n", __func__); 578 rc = devm_request_irq(dev, client->irq, 579 i2c_nuvoton_int_handler, 580 IRQF_TRIGGER_LOW, 581 dev_name(&chip->dev), 582 chip); 583 if (rc) { 584 dev_err(dev, "%s() Unable to request irq: %d for use\n", 585 __func__, priv->irq); 586 priv->irq = 0; 587 } else { 588 chip->flags |= TPM_CHIP_FLAG_IRQ; 589 /* Clear any pending interrupt */ 590 i2c_nuvoton_ready(chip); 591 /* - wait for TPM_STS==0xA0 (stsValid, commandReady) */ 592 rc = i2c_nuvoton_wait_for_stat(chip, 593 TPM_STS_COMMAND_READY, 594 TPM_STS_COMMAND_READY, 595 chip->timeout_b, 596 NULL); 597 if (rc == 0) { 598 /* 599 * TIS is in ready state 600 * write dummy byte to enter reception state 601 * TPM_DATA_FIFO_W <- rc (0) 602 */ 603 rc = i2c_nuvoton_write_buf(client, 604 TPM_DATA_FIFO_W, 605 1, (u8 *) (&rc)); 606 if (rc < 0) 607 return rc; 608 /* TPM_STS <- 0x40 (commandReady) */ 609 i2c_nuvoton_ready(chip); 610 } else { 611 /* 612 * timeout_b reached - command was 613 * aborted. TIS should now be in idle state - 614 * only TPM_STS_VALID should be set 615 */ 616 if (i2c_nuvoton_read_status(chip) != 617 TPM_STS_VALID) 618 return -EIO; 619 } 620 } 621 } 622 623 return tpm_chip_register(chip); 624 } 625 626 static int i2c_nuvoton_remove(struct i2c_client *client) 627 { 628 struct tpm_chip *chip = i2c_get_clientdata(client); 629 630 tpm_chip_unregister(chip); 631 return 0; 632 } 633 634 static const struct i2c_device_id i2c_nuvoton_id[] = { 635 {"tpm_i2c_nuvoton"}, 636 {"tpm2_i2c_nuvoton", .driver_data = I2C_IS_TPM2}, 637 {} 638 }; 639 MODULE_DEVICE_TABLE(i2c, i2c_nuvoton_id); 640 641 #ifdef CONFIG_OF 642 static const struct of_device_id i2c_nuvoton_of_match[] = { 643 {.compatible = "nuvoton,npct501"}, 644 {.compatible = "winbond,wpct301"}, 645 {.compatible = "nuvoton,npct601", .data = OF_IS_TPM2}, 646 {}, 647 }; 648 MODULE_DEVICE_TABLE(of, i2c_nuvoton_of_match); 649 #endif 650 651 static SIMPLE_DEV_PM_OPS(i2c_nuvoton_pm_ops, tpm_pm_suspend, tpm_pm_resume); 652 653 static struct i2c_driver i2c_nuvoton_driver = { 654 .id_table = i2c_nuvoton_id, 655 .probe = i2c_nuvoton_probe, 656 .remove = i2c_nuvoton_remove, 657 .driver = { 658 .name = "tpm_i2c_nuvoton", 659 .pm = &i2c_nuvoton_pm_ops, 660 .of_match_table = of_match_ptr(i2c_nuvoton_of_match), 661 }, 662 }; 663 664 module_i2c_driver(i2c_nuvoton_driver); 665 666 MODULE_AUTHOR("Dan Morav (dan.morav@nuvoton.com)"); 667 MODULE_DESCRIPTION("Nuvoton TPM I2C Driver"); 668 MODULE_LICENSE("GPL"); 669