1ad5ea3ccSKylene Jo Hall /* 2ad5ea3ccSKylene Jo Hall * Copyright (C) 2005 IBM Corporation 3ad5ea3ccSKylene Jo Hall * 4ad5ea3ccSKylene Jo Hall * Authors: 5ad5ea3ccSKylene Jo Hall * Kylene Hall <kjhall@us.ibm.com> 6ad5ea3ccSKylene Jo Hall * 7ad5ea3ccSKylene Jo Hall * Maintained by: <tpmdd_devel@lists.sourceforge.net> 8ad5ea3ccSKylene Jo Hall * 9ad5ea3ccSKylene Jo Hall * Device driver for TCG/TCPA TPM (trusted platform module). 10ad5ea3ccSKylene Jo Hall * Specifications at www.trustedcomputinggroup.org 11ad5ea3ccSKylene Jo Hall * 12ad5ea3ccSKylene Jo Hall * This program is free software; you can redistribute it and/or 13ad5ea3ccSKylene Jo Hall * modify it under the terms of the GNU General Public License as 14ad5ea3ccSKylene Jo Hall * published by the Free Software Foundation, version 2 of the 15ad5ea3ccSKylene Jo Hall * License. 16ad5ea3ccSKylene Jo Hall * 17ad5ea3ccSKylene Jo Hall * These difference are required on power because the device must be 18ad5ea3ccSKylene Jo Hall * discovered through the device tree and iomap must be used to get 19ad5ea3ccSKylene Jo Hall * around the need for holes in the io_page_mask. This does not happen 20ad5ea3ccSKylene Jo Hall * automatically because the tpm is not a normal pci device and lives 21ad5ea3ccSKylene Jo Hall * under the root node. 22ad5ea3ccSKylene Jo Hall * 23ad5ea3ccSKylene Jo Hall */ 24ad5ea3ccSKylene Jo Hall 25ad5ea3ccSKylene Jo Hall #ifdef CONFIG_PPC64 26ad5ea3ccSKylene Jo Hall #define atmel_getb(chip, offset) readb(chip->vendor->iobase + offset); 27ad5ea3ccSKylene Jo Hall #define atmel_putb(val, chip, offset) writeb(val, chip->vendor->iobase + offset) 28ad5ea3ccSKylene Jo Hall #define atmel_request_region request_mem_region 29ad5ea3ccSKylene Jo Hall #define atmel_release_region release_mem_region 3090612b30SKylene Jo Hall 31e0dd03caSKylene Jo Hall static inline void atmel_put_base_addr(void __iomem *iobase) 32ad5ea3ccSKylene Jo Hall { 33e0dd03caSKylene Jo Hall iounmap(iobase); 34ad5ea3ccSKylene Jo Hall } 35ad5ea3ccSKylene Jo Hall 36e0dd03caSKylene Jo Hall static void __iomem * atmel_get_base_addr(unsigned long *base, int *region_size) 37ad5ea3ccSKylene Jo Hall { 38ad5ea3ccSKylene Jo Hall struct device_node *dn; 39ad5ea3ccSKylene Jo Hall unsigned long address, size; 405c339e96SJeremy Kerr const unsigned int *reg; 41ad5ea3ccSKylene Jo Hall int reglen; 42ad5ea3ccSKylene Jo Hall int naddrc; 43ad5ea3ccSKylene Jo Hall int nsizec; 44ad5ea3ccSKylene Jo Hall 45ad5ea3ccSKylene Jo Hall dn = of_find_node_by_name(NULL, "tpm"); 46ad5ea3ccSKylene Jo Hall 47ad5ea3ccSKylene Jo Hall if (!dn) 4890612b30SKylene Jo Hall return NULL; 49ad5ea3ccSKylene Jo Hall 50ad5ea3ccSKylene Jo Hall if (!device_is_compatible(dn, "AT97SC3201")) { 51ad5ea3ccSKylene Jo Hall of_node_put(dn); 5290612b30SKylene Jo Hall return NULL; 53ad5ea3ccSKylene Jo Hall } 54ad5ea3ccSKylene Jo Hall 55*40cd3a45SStephen Rothwell reg = of_get_property(dn, "reg", ®len); 56a8bda5ddSStephen Rothwell naddrc = of_n_addr_cells(dn); 579213feeaSStephen Rothwell nsizec = of_n_size_cells(dn); 58ad5ea3ccSKylene Jo Hall 59ad5ea3ccSKylene Jo Hall of_node_put(dn); 60ad5ea3ccSKylene Jo Hall 61ad5ea3ccSKylene Jo Hall 62ad5ea3ccSKylene Jo Hall if (naddrc == 2) 63ad5ea3ccSKylene Jo Hall address = ((unsigned long) reg[0] << 32) | reg[1]; 64ad5ea3ccSKylene Jo Hall else 65ad5ea3ccSKylene Jo Hall address = reg[0]; 66ad5ea3ccSKylene Jo Hall 67ad5ea3ccSKylene Jo Hall if (nsizec == 2) 68ad5ea3ccSKylene Jo Hall size = 69ad5ea3ccSKylene Jo Hall ((unsigned long) reg[naddrc] << 32) | reg[naddrc + 1]; 70ad5ea3ccSKylene Jo Hall else 71ad5ea3ccSKylene Jo Hall size = reg[naddrc]; 72ad5ea3ccSKylene Jo Hall 73e0dd03caSKylene Jo Hall *base = address; 74e0dd03caSKylene Jo Hall *region_size = size; 75e0dd03caSKylene Jo Hall return ioremap(*base, *region_size); 76ad5ea3ccSKylene Jo Hall } 77ad5ea3ccSKylene Jo Hall #else 78ad5ea3ccSKylene Jo Hall #define atmel_getb(chip, offset) inb(chip->vendor->base + offset) 79ad5ea3ccSKylene Jo Hall #define atmel_putb(val, chip, offset) outb(val, chip->vendor->base + offset) 80ad5ea3ccSKylene Jo Hall #define atmel_request_region request_region 81ad5ea3ccSKylene Jo Hall #define atmel_release_region release_region 82ad5ea3ccSKylene Jo Hall /* Atmel definitions */ 83ad5ea3ccSKylene Jo Hall enum tpm_atmel_addr { 84ad5ea3ccSKylene Jo Hall TPM_ATMEL_BASE_ADDR_LO = 0x08, 85ad5ea3ccSKylene Jo Hall TPM_ATMEL_BASE_ADDR_HI = 0x09 86ad5ea3ccSKylene Jo Hall }; 87ad5ea3ccSKylene Jo Hall 88ad5ea3ccSKylene Jo Hall /* Verify this is a 1.1 Atmel TPM */ 89ad5ea3ccSKylene Jo Hall static int atmel_verify_tpm11(void) 90ad5ea3ccSKylene Jo Hall { 91ad5ea3ccSKylene Jo Hall 92ad5ea3ccSKylene Jo Hall /* verify that it is an Atmel part */ 93ad5ea3ccSKylene Jo Hall if (tpm_read_index(TPM_ADDR, 4) != 'A' || 94ad5ea3ccSKylene Jo Hall tpm_read_index(TPM_ADDR, 5) != 'T' || 95ad5ea3ccSKylene Jo Hall tpm_read_index(TPM_ADDR, 6) != 'M' || 96ad5ea3ccSKylene Jo Hall tpm_read_index(TPM_ADDR, 7) != 'L') 97ad5ea3ccSKylene Jo Hall return 1; 98ad5ea3ccSKylene Jo Hall 99ad5ea3ccSKylene Jo Hall /* query chip for its version number */ 100ad5ea3ccSKylene Jo Hall if (tpm_read_index(TPM_ADDR, 0x00) != 1 || 101ad5ea3ccSKylene Jo Hall tpm_read_index(TPM_ADDR, 0x01) != 1) 102ad5ea3ccSKylene Jo Hall return 1; 103ad5ea3ccSKylene Jo Hall 104ad5ea3ccSKylene Jo Hall /* This is an atmel supported part */ 105ad5ea3ccSKylene Jo Hall return 0; 106ad5ea3ccSKylene Jo Hall } 107ad5ea3ccSKylene Jo Hall 108e0dd03caSKylene Jo Hall static inline void atmel_put_base_addr(void __iomem *iobase) 109ad5ea3ccSKylene Jo Hall { 110ad5ea3ccSKylene Jo Hall } 111ad5ea3ccSKylene Jo Hall 112ad5ea3ccSKylene Jo Hall /* Determine where to talk to device */ 113e0dd03caSKylene Jo Hall static void __iomem * atmel_get_base_addr(unsigned long *base, int *region_size) 114ad5ea3ccSKylene Jo Hall { 115ad5ea3ccSKylene Jo Hall int lo, hi; 116ad5ea3ccSKylene Jo Hall 117ad5ea3ccSKylene Jo Hall if (atmel_verify_tpm11() != 0) 11890612b30SKylene Jo Hall return NULL; 119ad5ea3ccSKylene Jo Hall 120ad5ea3ccSKylene Jo Hall lo = tpm_read_index(TPM_ADDR, TPM_ATMEL_BASE_ADDR_LO); 121ad5ea3ccSKylene Jo Hall hi = tpm_read_index(TPM_ADDR, TPM_ATMEL_BASE_ADDR_HI); 122ad5ea3ccSKylene Jo Hall 123e0dd03caSKylene Jo Hall *base = (hi << 8) | lo; 124e0dd03caSKylene Jo Hall *region_size = 2; 125ad5ea3ccSKylene Jo Hall 126e0dd03caSKylene Jo Hall return ioport_map(*base, *region_size); 127ad5ea3ccSKylene Jo Hall } 128ad5ea3ccSKylene Jo Hall #endif 129