1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2014, 2015 Intel Corporation 4 * 5 * Authors: 6 * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> 7 * 8 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 9 * 10 * This file contains TPM2 protocol implementations of the commands 11 * used by the kernel internally. 12 */ 13 14 #include "tpm.h" 15 #include <crypto/hash_info.h> 16 17 static struct tpm2_hash tpm2_hash_map[] = { 18 {HASH_ALGO_SHA1, TPM_ALG_SHA1}, 19 {HASH_ALGO_SHA256, TPM_ALG_SHA256}, 20 {HASH_ALGO_SHA384, TPM_ALG_SHA384}, 21 {HASH_ALGO_SHA512, TPM_ALG_SHA512}, 22 {HASH_ALGO_SM3_256, TPM_ALG_SM3_256}, 23 }; 24 25 int tpm2_get_timeouts(struct tpm_chip *chip) 26 { 27 /* Fixed timeouts for TPM2 */ 28 chip->timeout_a = msecs_to_jiffies(TPM2_TIMEOUT_A); 29 chip->timeout_b = msecs_to_jiffies(TPM2_TIMEOUT_B); 30 chip->timeout_c = msecs_to_jiffies(TPM2_TIMEOUT_C); 31 chip->timeout_d = msecs_to_jiffies(TPM2_TIMEOUT_D); 32 33 /* PTP spec timeouts */ 34 chip->duration[TPM_SHORT] = msecs_to_jiffies(TPM2_DURATION_SHORT); 35 chip->duration[TPM_MEDIUM] = msecs_to_jiffies(TPM2_DURATION_MEDIUM); 36 chip->duration[TPM_LONG] = msecs_to_jiffies(TPM2_DURATION_LONG); 37 38 /* Key creation commands long timeouts */ 39 chip->duration[TPM_LONG_LONG] = 40 msecs_to_jiffies(TPM2_DURATION_LONG_LONG); 41 42 chip->flags |= TPM_CHIP_FLAG_HAVE_TIMEOUTS; 43 44 return 0; 45 } 46 47 /** 48 * tpm2_ordinal_duration_index() - returns an index to the chip duration table 49 * @ordinal: TPM command ordinal. 50 * 51 * The function returns an index to the chip duration table 52 * (enum tpm_duration), that describes the maximum amount of 53 * time the chip could take to return the result for a particular ordinal. 54 * 55 * The values of the MEDIUM, and LONG durations are taken 56 * from the PC Client Profile (PTP) specification (750, 2000 msec) 57 * 58 * LONG_LONG is for commands that generates keys which empirically takes 59 * a longer time on some systems. 60 * 61 * Return: 62 * * TPM_MEDIUM 63 * * TPM_LONG 64 * * TPM_LONG_LONG 65 * * TPM_UNDEFINED 66 */ 67 static u8 tpm2_ordinal_duration_index(u32 ordinal) 68 { 69 switch (ordinal) { 70 /* Startup */ 71 case TPM2_CC_STARTUP: /* 144 */ 72 return TPM_MEDIUM; 73 74 case TPM2_CC_SELF_TEST: /* 143 */ 75 return TPM_LONG; 76 77 case TPM2_CC_GET_RANDOM: /* 17B */ 78 return TPM_LONG; 79 80 case TPM2_CC_SEQUENCE_UPDATE: /* 15C */ 81 return TPM_MEDIUM; 82 case TPM2_CC_SEQUENCE_COMPLETE: /* 13E */ 83 return TPM_MEDIUM; 84 case TPM2_CC_EVENT_SEQUENCE_COMPLETE: /* 185 */ 85 return TPM_MEDIUM; 86 case TPM2_CC_HASH_SEQUENCE_START: /* 186 */ 87 return TPM_MEDIUM; 88 89 case TPM2_CC_VERIFY_SIGNATURE: /* 177 */ 90 return TPM_LONG_LONG; 91 92 case TPM2_CC_PCR_EXTEND: /* 182 */ 93 return TPM_MEDIUM; 94 95 case TPM2_CC_HIERARCHY_CONTROL: /* 121 */ 96 return TPM_LONG; 97 case TPM2_CC_HIERARCHY_CHANGE_AUTH: /* 129 */ 98 return TPM_LONG; 99 100 case TPM2_CC_GET_CAPABILITY: /* 17A */ 101 return TPM_MEDIUM; 102 103 case TPM2_CC_NV_READ: /* 14E */ 104 return TPM_LONG; 105 106 case TPM2_CC_CREATE_PRIMARY: /* 131 */ 107 return TPM_LONG_LONG; 108 case TPM2_CC_CREATE: /* 153 */ 109 return TPM_LONG_LONG; 110 case TPM2_CC_CREATE_LOADED: /* 191 */ 111 return TPM_LONG_LONG; 112 113 default: 114 return TPM_UNDEFINED; 115 } 116 } 117 118 /** 119 * tpm2_calc_ordinal_duration() - calculate the maximum command duration 120 * @chip: TPM chip to use. 121 * @ordinal: TPM command ordinal. 122 * 123 * The function returns the maximum amount of time the chip could take 124 * to return the result for a particular ordinal in jiffies. 125 * 126 * Return: A maximal duration time for an ordinal in jiffies. 127 */ 128 unsigned long tpm2_calc_ordinal_duration(struct tpm_chip *chip, u32 ordinal) 129 { 130 unsigned int index; 131 132 index = tpm2_ordinal_duration_index(ordinal); 133 134 if (index != TPM_UNDEFINED) 135 return chip->duration[index]; 136 else 137 return msecs_to_jiffies(TPM2_DURATION_DEFAULT); 138 } 139 140 141 struct tpm2_pcr_read_out { 142 __be32 update_cnt; 143 __be32 pcr_selects_cnt; 144 __be16 hash_alg; 145 u8 pcr_select_size; 146 u8 pcr_select[TPM2_PCR_SELECT_MIN]; 147 __be32 digests_cnt; 148 __be16 digest_size; 149 u8 digest[]; 150 } __packed; 151 152 /** 153 * tpm2_pcr_read() - read a PCR value 154 * @chip: TPM chip to use. 155 * @pcr_idx: index of the PCR to read. 156 * @digest: PCR bank and buffer current PCR value is written to. 157 * @digest_size_ptr: pointer to variable that stores the digest size. 158 * 159 * Return: Same as with tpm_transmit_cmd. 160 */ 161 int tpm2_pcr_read(struct tpm_chip *chip, u32 pcr_idx, 162 struct tpm_digest *digest, u16 *digest_size_ptr) 163 { 164 int i; 165 int rc; 166 struct tpm_buf buf; 167 struct tpm2_pcr_read_out *out; 168 u8 pcr_select[TPM2_PCR_SELECT_MIN] = {0}; 169 u16 digest_size; 170 u16 expected_digest_size = 0; 171 172 if (pcr_idx >= TPM2_PLATFORM_PCR) 173 return -EINVAL; 174 175 if (!digest_size_ptr) { 176 for (i = 0; i < chip->nr_allocated_banks && 177 chip->allocated_banks[i].alg_id != digest->alg_id; i++) 178 ; 179 180 if (i == chip->nr_allocated_banks) 181 return -EINVAL; 182 183 expected_digest_size = chip->allocated_banks[i].digest_size; 184 } 185 186 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_PCR_READ); 187 if (rc) 188 return rc; 189 190 pcr_select[pcr_idx >> 3] = 1 << (pcr_idx & 0x7); 191 192 tpm_buf_append_u32(&buf, 1); 193 tpm_buf_append_u16(&buf, digest->alg_id); 194 tpm_buf_append_u8(&buf, TPM2_PCR_SELECT_MIN); 195 tpm_buf_append(&buf, (const unsigned char *)pcr_select, 196 sizeof(pcr_select)); 197 198 rc = tpm_transmit_cmd(chip, &buf, 0, "attempting to read a pcr value"); 199 if (rc) 200 goto out; 201 202 out = (struct tpm2_pcr_read_out *)&buf.data[TPM_HEADER_SIZE]; 203 digest_size = be16_to_cpu(out->digest_size); 204 if (digest_size > sizeof(digest->digest) || 205 (!digest_size_ptr && digest_size != expected_digest_size)) { 206 rc = -EINVAL; 207 goto out; 208 } 209 210 if (digest_size_ptr) 211 *digest_size_ptr = digest_size; 212 213 memcpy(digest->digest, out->digest, digest_size); 214 out: 215 tpm_buf_destroy(&buf); 216 return rc; 217 } 218 219 /** 220 * tpm2_pcr_extend() - extend a PCR value 221 * 222 * @chip: TPM chip to use. 223 * @pcr_idx: index of the PCR. 224 * @digests: list of pcr banks and corresponding digest values to extend. 225 * 226 * Return: Same as with tpm_transmit_cmd. 227 */ 228 int tpm2_pcr_extend(struct tpm_chip *chip, u32 pcr_idx, 229 struct tpm_digest *digests) 230 { 231 struct tpm_buf buf; 232 int rc; 233 int i; 234 235 rc = tpm2_start_auth_session(chip); 236 if (rc) 237 return rc; 238 239 rc = tpm_buf_init(&buf, TPM2_ST_SESSIONS, TPM2_CC_PCR_EXTEND); 240 if (rc) { 241 tpm2_end_auth_session(chip); 242 return rc; 243 } 244 245 tpm_buf_append_name(chip, &buf, pcr_idx, NULL); 246 tpm_buf_append_hmac_session(chip, &buf, 0, NULL, 0); 247 248 tpm_buf_append_u32(&buf, chip->nr_allocated_banks); 249 250 for (i = 0; i < chip->nr_allocated_banks; i++) { 251 tpm_buf_append_u16(&buf, digests[i].alg_id); 252 tpm_buf_append(&buf, (const unsigned char *)&digests[i].digest, 253 chip->allocated_banks[i].digest_size); 254 } 255 256 tpm_buf_fill_hmac_session(chip, &buf); 257 rc = tpm_transmit_cmd(chip, &buf, 0, "attempting extend a PCR value"); 258 rc = tpm_buf_check_hmac_response(chip, &buf, rc); 259 260 tpm_buf_destroy(&buf); 261 262 return rc; 263 } 264 265 struct tpm2_get_random_out { 266 __be16 size; 267 u8 buffer[TPM_MAX_RNG_DATA]; 268 } __packed; 269 270 /** 271 * tpm2_get_random() - get random bytes from the TPM RNG 272 * 273 * @chip: a &tpm_chip instance 274 * @dest: destination buffer 275 * @max: the max number of random bytes to pull 276 * 277 * Return: 278 * size of the buffer on success, 279 * -errno otherwise (positive TPM return codes are masked to -EIO) 280 */ 281 int tpm2_get_random(struct tpm_chip *chip, u8 *dest, size_t max) 282 { 283 struct tpm2_get_random_out *out; 284 struct tpm_header *head; 285 struct tpm_buf buf; 286 u32 recd; 287 u32 num_bytes = max; 288 int err; 289 int total = 0; 290 int retries = 5; 291 u8 *dest_ptr = dest; 292 off_t offset; 293 294 if (!num_bytes || max > TPM_MAX_RNG_DATA) 295 return -EINVAL; 296 297 err = tpm2_start_auth_session(chip); 298 if (err) 299 return err; 300 301 err = tpm_buf_init(&buf, 0, 0); 302 if (err) { 303 tpm2_end_auth_session(chip); 304 return err; 305 } 306 307 do { 308 tpm_buf_reset(&buf, TPM2_ST_SESSIONS, TPM2_CC_GET_RANDOM); 309 tpm_buf_append_hmac_session_opt(chip, &buf, TPM2_SA_ENCRYPT 310 | TPM2_SA_CONTINUE_SESSION, 311 NULL, 0); 312 tpm_buf_append_u16(&buf, num_bytes); 313 tpm_buf_fill_hmac_session(chip, &buf); 314 err = tpm_transmit_cmd(chip, &buf, 315 offsetof(struct tpm2_get_random_out, 316 buffer), 317 "attempting get random"); 318 err = tpm_buf_check_hmac_response(chip, &buf, err); 319 if (err) { 320 if (err > 0) 321 err = -EIO; 322 goto out; 323 } 324 325 head = (struct tpm_header *)buf.data; 326 offset = TPM_HEADER_SIZE; 327 /* Skip the parameter size field: */ 328 if (be16_to_cpu(head->tag) == TPM2_ST_SESSIONS) 329 offset += 4; 330 331 out = (struct tpm2_get_random_out *)&buf.data[offset]; 332 recd = min_t(u32, be16_to_cpu(out->size), num_bytes); 333 if (tpm_buf_length(&buf) < 334 TPM_HEADER_SIZE + 335 offsetof(struct tpm2_get_random_out, buffer) + 336 recd) { 337 err = -EFAULT; 338 goto out; 339 } 340 memcpy(dest_ptr, out->buffer, recd); 341 342 dest_ptr += recd; 343 total += recd; 344 num_bytes -= recd; 345 } while (retries-- && total < max); 346 347 tpm_buf_destroy(&buf); 348 tpm2_end_auth_session(chip); 349 350 return total ? total : -EIO; 351 out: 352 tpm_buf_destroy(&buf); 353 tpm2_end_auth_session(chip); 354 return err; 355 } 356 357 /** 358 * tpm2_flush_context() - execute a TPM2_FlushContext command 359 * @chip: TPM chip to use 360 * @handle: context handle 361 */ 362 void tpm2_flush_context(struct tpm_chip *chip, u32 handle) 363 { 364 struct tpm_buf buf; 365 int rc; 366 367 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_FLUSH_CONTEXT); 368 if (rc) { 369 dev_warn(&chip->dev, "0x%08x was not flushed, out of memory\n", 370 handle); 371 return; 372 } 373 374 tpm_buf_append_u32(&buf, handle); 375 376 tpm_transmit_cmd(chip, &buf, 0, "flushing context"); 377 tpm_buf_destroy(&buf); 378 } 379 EXPORT_SYMBOL_GPL(tpm2_flush_context); 380 381 struct tpm2_get_cap_out { 382 u8 more_data; 383 __be32 subcap_id; 384 __be32 property_cnt; 385 __be32 property_id; 386 __be32 value; 387 } __packed; 388 389 /** 390 * tpm2_get_tpm_pt() - get value of a TPM_CAP_TPM_PROPERTIES type property 391 * @chip: a &tpm_chip instance 392 * @property_id: property ID. 393 * @value: output variable. 394 * @desc: passed to tpm_transmit_cmd() 395 * 396 * Return: 397 * 0 on success, 398 * -errno or a TPM return code otherwise 399 */ 400 ssize_t tpm2_get_tpm_pt(struct tpm_chip *chip, u32 property_id, u32 *value, 401 const char *desc) 402 { 403 struct tpm2_get_cap_out *out; 404 struct tpm_buf buf; 405 int rc; 406 407 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY); 408 if (rc) 409 return rc; 410 tpm_buf_append_u32(&buf, TPM2_CAP_TPM_PROPERTIES); 411 tpm_buf_append_u32(&buf, property_id); 412 tpm_buf_append_u32(&buf, 1); 413 rc = tpm_transmit_cmd(chip, &buf, 0, NULL); 414 if (!rc) { 415 out = (struct tpm2_get_cap_out *) 416 &buf.data[TPM_HEADER_SIZE]; 417 /* 418 * To prevent failing boot up of some systems, Infineon TPM2.0 419 * returns SUCCESS on TPM2_Startup in field upgrade mode. Also 420 * the TPM2_Getcapability command returns a zero length list 421 * in field upgrade mode. 422 */ 423 if (be32_to_cpu(out->property_cnt) > 0) 424 *value = be32_to_cpu(out->value); 425 else 426 rc = -ENODATA; 427 } 428 tpm_buf_destroy(&buf); 429 return rc; 430 } 431 EXPORT_SYMBOL_GPL(tpm2_get_tpm_pt); 432 433 /** 434 * tpm2_shutdown() - send a TPM shutdown command 435 * 436 * Sends a TPM shutdown command. The shutdown command is used in call 437 * sites where the system is going down. If it fails, there is not much 438 * that can be done except print an error message. 439 * 440 * @chip: a &tpm_chip instance 441 * @shutdown_type: TPM_SU_CLEAR or TPM_SU_STATE. 442 */ 443 void tpm2_shutdown(struct tpm_chip *chip, u16 shutdown_type) 444 { 445 struct tpm_buf buf; 446 int rc; 447 448 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_SHUTDOWN); 449 if (rc) 450 return; 451 tpm_buf_append_u16(&buf, shutdown_type); 452 tpm_transmit_cmd(chip, &buf, 0, "stopping the TPM"); 453 tpm_buf_destroy(&buf); 454 } 455 456 /** 457 * tpm2_do_selftest() - ensure that all self tests have passed 458 * 459 * @chip: TPM chip to use 460 * 461 * Return: Same as with tpm_transmit_cmd. 462 * 463 * The TPM can either run all self tests synchronously and then return 464 * RC_SUCCESS once all tests were successful. Or it can choose to run the tests 465 * asynchronously and return RC_TESTING immediately while the self tests still 466 * execute in the background. This function handles both cases and waits until 467 * all tests have completed. 468 */ 469 static int tpm2_do_selftest(struct tpm_chip *chip) 470 { 471 struct tpm_buf buf; 472 int full; 473 int rc; 474 475 for (full = 0; full < 2; full++) { 476 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_SELF_TEST); 477 if (rc) 478 return rc; 479 480 tpm_buf_append_u8(&buf, full); 481 rc = tpm_transmit_cmd(chip, &buf, 0, 482 "attempting the self test"); 483 tpm_buf_destroy(&buf); 484 485 if (rc == TPM2_RC_TESTING) 486 rc = TPM2_RC_SUCCESS; 487 if (rc == TPM2_RC_INITIALIZE || rc == TPM2_RC_SUCCESS) 488 return rc; 489 } 490 491 return rc; 492 } 493 494 /** 495 * tpm2_probe() - probe for the TPM 2.0 protocol 496 * @chip: a &tpm_chip instance 497 * 498 * Send an idempotent TPM 2.0 command and see whether there is TPM2 chip in the 499 * other end based on the response tag. The flag TPM_CHIP_FLAG_TPM2 is set by 500 * this function if this is the case. 501 * 502 * Return: 503 * 0 on success, 504 * -errno otherwise 505 */ 506 int tpm2_probe(struct tpm_chip *chip) 507 { 508 struct tpm_header *out; 509 struct tpm_buf buf; 510 int rc; 511 512 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY); 513 if (rc) 514 return rc; 515 tpm_buf_append_u32(&buf, TPM2_CAP_TPM_PROPERTIES); 516 tpm_buf_append_u32(&buf, TPM_PT_TOTAL_COMMANDS); 517 tpm_buf_append_u32(&buf, 1); 518 rc = tpm_transmit_cmd(chip, &buf, 0, NULL); 519 /* We ignore TPM return codes on purpose. */ 520 if (rc >= 0) { 521 out = (struct tpm_header *)buf.data; 522 if (be16_to_cpu(out->tag) == TPM2_ST_NO_SESSIONS) 523 chip->flags |= TPM_CHIP_FLAG_TPM2; 524 } 525 tpm_buf_destroy(&buf); 526 return 0; 527 } 528 EXPORT_SYMBOL_GPL(tpm2_probe); 529 530 static int tpm2_init_bank_info(struct tpm_chip *chip, u32 bank_index) 531 { 532 struct tpm_bank_info *bank = chip->allocated_banks + bank_index; 533 struct tpm_digest digest = { .alg_id = bank->alg_id }; 534 int i; 535 536 /* 537 * Avoid unnecessary PCR read operations to reduce overhead 538 * and obtain identifiers of the crypto subsystem. 539 */ 540 for (i = 0; i < ARRAY_SIZE(tpm2_hash_map); i++) { 541 enum hash_algo crypto_algo = tpm2_hash_map[i].crypto_id; 542 543 if (bank->alg_id != tpm2_hash_map[i].tpm_id) 544 continue; 545 546 bank->digest_size = hash_digest_size[crypto_algo]; 547 bank->crypto_id = crypto_algo; 548 return 0; 549 } 550 551 bank->crypto_id = HASH_ALGO__LAST; 552 553 return tpm2_pcr_read(chip, 0, &digest, &bank->digest_size); 554 } 555 556 struct tpm2_pcr_selection { 557 __be16 hash_alg; 558 u8 size_of_select; 559 u8 pcr_select[3]; 560 } __packed; 561 562 ssize_t tpm2_get_pcr_allocation(struct tpm_chip *chip) 563 { 564 struct tpm2_pcr_selection pcr_selection; 565 struct tpm_buf buf; 566 void *marker; 567 void *end; 568 void *pcr_select_offset; 569 u32 sizeof_pcr_selection; 570 u32 nr_possible_banks; 571 u32 nr_alloc_banks = 0; 572 u16 hash_alg; 573 u32 rsp_len; 574 int rc; 575 int i = 0; 576 577 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY); 578 if (rc) 579 return rc; 580 581 tpm_buf_append_u32(&buf, TPM2_CAP_PCRS); 582 tpm_buf_append_u32(&buf, 0); 583 tpm_buf_append_u32(&buf, 1); 584 585 rc = tpm_transmit_cmd(chip, &buf, 9, "get tpm pcr allocation"); 586 if (rc) 587 goto out; 588 589 nr_possible_banks = be32_to_cpup( 590 (__be32 *)&buf.data[TPM_HEADER_SIZE + 5]); 591 592 chip->allocated_banks = kcalloc(nr_possible_banks, 593 sizeof(*chip->allocated_banks), 594 GFP_KERNEL); 595 if (!chip->allocated_banks) { 596 rc = -ENOMEM; 597 goto out; 598 } 599 600 marker = &buf.data[TPM_HEADER_SIZE + 9]; 601 602 rsp_len = be32_to_cpup((__be32 *)&buf.data[2]); 603 end = &buf.data[rsp_len]; 604 605 for (i = 0; i < nr_possible_banks; i++) { 606 pcr_select_offset = marker + 607 offsetof(struct tpm2_pcr_selection, size_of_select); 608 if (pcr_select_offset >= end) { 609 rc = -EFAULT; 610 break; 611 } 612 613 memcpy(&pcr_selection, marker, sizeof(pcr_selection)); 614 hash_alg = be16_to_cpu(pcr_selection.hash_alg); 615 616 pcr_select_offset = memchr_inv(pcr_selection.pcr_select, 0, 617 pcr_selection.size_of_select); 618 if (pcr_select_offset) { 619 chip->allocated_banks[nr_alloc_banks].alg_id = hash_alg; 620 621 rc = tpm2_init_bank_info(chip, nr_alloc_banks); 622 if (rc < 0) 623 break; 624 625 nr_alloc_banks++; 626 } 627 628 sizeof_pcr_selection = sizeof(pcr_selection.hash_alg) + 629 sizeof(pcr_selection.size_of_select) + 630 pcr_selection.size_of_select; 631 marker = marker + sizeof_pcr_selection; 632 } 633 634 chip->nr_allocated_banks = nr_alloc_banks; 635 out: 636 tpm_buf_destroy(&buf); 637 638 return rc; 639 } 640 641 int tpm2_get_cc_attrs_tbl(struct tpm_chip *chip) 642 { 643 struct tpm_buf buf; 644 u32 nr_commands; 645 __be32 *attrs; 646 u32 cc; 647 int i; 648 int rc; 649 650 rc = tpm2_get_tpm_pt(chip, TPM_PT_TOTAL_COMMANDS, &nr_commands, NULL); 651 if (rc) 652 goto out; 653 654 if (nr_commands > 0xFFFFF) { 655 rc = -EFAULT; 656 goto out; 657 } 658 659 chip->cc_attrs_tbl = devm_kcalloc(&chip->dev, 4, nr_commands, 660 GFP_KERNEL); 661 if (!chip->cc_attrs_tbl) { 662 rc = -ENOMEM; 663 goto out; 664 } 665 666 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY); 667 if (rc) 668 goto out; 669 670 tpm_buf_append_u32(&buf, TPM2_CAP_COMMANDS); 671 tpm_buf_append_u32(&buf, TPM2_CC_FIRST); 672 tpm_buf_append_u32(&buf, nr_commands); 673 674 rc = tpm_transmit_cmd(chip, &buf, 9 + 4 * nr_commands, NULL); 675 if (rc) { 676 tpm_buf_destroy(&buf); 677 goto out; 678 } 679 680 if (nr_commands != 681 be32_to_cpup((__be32 *)&buf.data[TPM_HEADER_SIZE + 5])) { 682 rc = -EFAULT; 683 tpm_buf_destroy(&buf); 684 goto out; 685 } 686 687 chip->nr_commands = nr_commands; 688 689 attrs = (__be32 *)&buf.data[TPM_HEADER_SIZE + 9]; 690 for (i = 0; i < nr_commands; i++, attrs++) { 691 chip->cc_attrs_tbl[i] = be32_to_cpup(attrs); 692 cc = chip->cc_attrs_tbl[i] & 0xFFFF; 693 694 if (cc == TPM2_CC_CONTEXT_SAVE || cc == TPM2_CC_FLUSH_CONTEXT) { 695 chip->cc_attrs_tbl[i] &= 696 ~(GENMASK(2, 0) << TPM2_CC_ATTR_CHANDLES); 697 chip->cc_attrs_tbl[i] |= 1 << TPM2_CC_ATTR_CHANDLES; 698 } 699 } 700 701 tpm_buf_destroy(&buf); 702 703 out: 704 if (rc > 0) 705 rc = -ENODEV; 706 return rc; 707 } 708 EXPORT_SYMBOL_GPL(tpm2_get_cc_attrs_tbl); 709 710 /** 711 * tpm2_startup - turn on the TPM 712 * @chip: TPM chip to use 713 * 714 * Normally the firmware should start the TPM. This function is provided as a 715 * workaround if this does not happen. A legal case for this could be for 716 * example when a TPM emulator is used. 717 * 718 * Return: same as tpm_transmit_cmd() 719 */ 720 721 static int tpm2_startup(struct tpm_chip *chip) 722 { 723 struct tpm_buf buf; 724 int rc; 725 726 dev_info(&chip->dev, "starting up the TPM manually\n"); 727 728 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_STARTUP); 729 if (rc < 0) 730 return rc; 731 732 tpm_buf_append_u16(&buf, TPM2_SU_CLEAR); 733 rc = tpm_transmit_cmd(chip, &buf, 0, "attempting to start the TPM"); 734 tpm_buf_destroy(&buf); 735 736 return rc; 737 } 738 739 /** 740 * tpm2_auto_startup - Perform the standard automatic TPM initialization 741 * sequence 742 * @chip: TPM chip to use 743 * 744 * Returns 0 on success, < 0 in case of fatal error. 745 */ 746 int tpm2_auto_startup(struct tpm_chip *chip) 747 { 748 int rc; 749 750 rc = tpm2_get_timeouts(chip); 751 if (rc) 752 goto out; 753 754 rc = tpm2_do_selftest(chip); 755 if (rc && rc != TPM2_RC_INITIALIZE) 756 goto out; 757 758 if (rc == TPM2_RC_INITIALIZE) { 759 rc = tpm2_startup(chip); 760 if (rc) 761 goto out; 762 763 rc = tpm2_do_selftest(chip); 764 if (rc) 765 goto out; 766 } 767 768 rc = tpm2_get_cc_attrs_tbl(chip); 769 if (rc == TPM2_RC_FAILURE || (rc < 0 && rc != -ENOMEM)) { 770 dev_info(&chip->dev, 771 "TPM in field failure mode, requires firmware upgrade\n"); 772 chip->flags |= TPM_CHIP_FLAG_FIRMWARE_UPGRADE; 773 rc = 0; 774 } 775 776 if (rc) 777 goto out; 778 779 rc = tpm2_sessions_init(chip); 780 781 out: 782 /* 783 * Infineon TPM in field upgrade mode will return no data for the number 784 * of supported commands. 785 */ 786 if (rc == TPM2_RC_UPGRADE || rc == -ENODATA) { 787 dev_info(&chip->dev, "TPM in field upgrade mode, requires firmware upgrade\n"); 788 chip->flags |= TPM_CHIP_FLAG_FIRMWARE_UPGRADE; 789 rc = 0; 790 } 791 792 if (rc > 0) 793 rc = -ENODEV; 794 return rc; 795 } 796 797 int tpm2_find_cc(struct tpm_chip *chip, u32 cc) 798 { 799 u32 cc_mask; 800 int i; 801 802 cc_mask = 1 << TPM2_CC_ATTR_VENDOR | GENMASK(15, 0); 803 for (i = 0; i < chip->nr_commands; i++) 804 if (cc == (chip->cc_attrs_tbl[i] & cc_mask)) 805 return i; 806 807 return -1; 808 } 809