1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2014, 2015 Intel Corporation 4 * 5 * Authors: 6 * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> 7 * 8 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 9 * 10 * This file contains TPM2 protocol implementations of the commands 11 * used by the kernel internally. 12 */ 13 14 #include "tpm.h" 15 #include <crypto/hash_info.h> 16 17 static struct tpm2_hash tpm2_hash_map[] = { 18 {HASH_ALGO_SHA1, TPM_ALG_SHA1}, 19 {HASH_ALGO_SHA256, TPM_ALG_SHA256}, 20 {HASH_ALGO_SHA384, TPM_ALG_SHA384}, 21 {HASH_ALGO_SHA512, TPM_ALG_SHA512}, 22 {HASH_ALGO_SM3_256, TPM_ALG_SM3_256}, 23 }; 24 25 int tpm2_get_timeouts(struct tpm_chip *chip) 26 { 27 /* Fixed timeouts for TPM2 */ 28 chip->timeout_a = msecs_to_jiffies(TPM2_TIMEOUT_A); 29 chip->timeout_b = msecs_to_jiffies(TPM2_TIMEOUT_B); 30 chip->timeout_c = msecs_to_jiffies(TPM2_TIMEOUT_C); 31 chip->timeout_d = msecs_to_jiffies(TPM2_TIMEOUT_D); 32 33 /* PTP spec timeouts */ 34 chip->duration[TPM_SHORT] = msecs_to_jiffies(TPM2_DURATION_SHORT); 35 chip->duration[TPM_MEDIUM] = msecs_to_jiffies(TPM2_DURATION_MEDIUM); 36 chip->duration[TPM_LONG] = msecs_to_jiffies(TPM2_DURATION_LONG); 37 38 /* Key creation commands long timeouts */ 39 chip->duration[TPM_LONG_LONG] = 40 msecs_to_jiffies(TPM2_DURATION_LONG_LONG); 41 42 chip->flags |= TPM_CHIP_FLAG_HAVE_TIMEOUTS; 43 44 return 0; 45 } 46 47 /** 48 * tpm2_ordinal_duration_index() - returns an index to the chip duration table 49 * @ordinal: TPM command ordinal. 50 * 51 * The function returns an index to the chip duration table 52 * (enum tpm_duration), that describes the maximum amount of 53 * time the chip could take to return the result for a particular ordinal. 54 * 55 * The values of the MEDIUM, and LONG durations are taken 56 * from the PC Client Profile (PTP) specification (750, 2000 msec) 57 * 58 * LONG_LONG is for commands that generates keys which empirically takes 59 * a longer time on some systems. 60 * 61 * Return: 62 * * TPM_MEDIUM 63 * * TPM_LONG 64 * * TPM_LONG_LONG 65 * * TPM_UNDEFINED 66 */ 67 static u8 tpm2_ordinal_duration_index(u32 ordinal) 68 { 69 switch (ordinal) { 70 /* Startup */ 71 case TPM2_CC_STARTUP: /* 144 */ 72 return TPM_MEDIUM; 73 74 case TPM2_CC_SELF_TEST: /* 143 */ 75 return TPM_LONG; 76 77 case TPM2_CC_GET_RANDOM: /* 17B */ 78 return TPM_LONG; 79 80 case TPM2_CC_SEQUENCE_UPDATE: /* 15C */ 81 return TPM_MEDIUM; 82 case TPM2_CC_SEQUENCE_COMPLETE: /* 13E */ 83 return TPM_MEDIUM; 84 case TPM2_CC_EVENT_SEQUENCE_COMPLETE: /* 185 */ 85 return TPM_MEDIUM; 86 case TPM2_CC_HASH_SEQUENCE_START: /* 186 */ 87 return TPM_MEDIUM; 88 89 case TPM2_CC_VERIFY_SIGNATURE: /* 177 */ 90 return TPM_LONG_LONG; 91 92 case TPM2_CC_PCR_EXTEND: /* 182 */ 93 return TPM_MEDIUM; 94 95 case TPM2_CC_HIERARCHY_CONTROL: /* 121 */ 96 return TPM_LONG; 97 case TPM2_CC_HIERARCHY_CHANGE_AUTH: /* 129 */ 98 return TPM_LONG; 99 100 case TPM2_CC_GET_CAPABILITY: /* 17A */ 101 return TPM_MEDIUM; 102 103 case TPM2_CC_NV_READ: /* 14E */ 104 return TPM_LONG; 105 106 case TPM2_CC_CREATE_PRIMARY: /* 131 */ 107 return TPM_LONG_LONG; 108 case TPM2_CC_CREATE: /* 153 */ 109 return TPM_LONG_LONG; 110 case TPM2_CC_CREATE_LOADED: /* 191 */ 111 return TPM_LONG_LONG; 112 113 default: 114 return TPM_UNDEFINED; 115 } 116 } 117 118 /** 119 * tpm2_calc_ordinal_duration() - calculate the maximum command duration 120 * @chip: TPM chip to use. 121 * @ordinal: TPM command ordinal. 122 * 123 * The function returns the maximum amount of time the chip could take 124 * to return the result for a particular ordinal in jiffies. 125 * 126 * Return: A maximal duration time for an ordinal in jiffies. 127 */ 128 unsigned long tpm2_calc_ordinal_duration(struct tpm_chip *chip, u32 ordinal) 129 { 130 unsigned int index; 131 132 index = tpm2_ordinal_duration_index(ordinal); 133 134 if (index != TPM_UNDEFINED) 135 return chip->duration[index]; 136 else 137 return msecs_to_jiffies(TPM2_DURATION_DEFAULT); 138 } 139 140 141 struct tpm2_pcr_read_out { 142 __be32 update_cnt; 143 __be32 pcr_selects_cnt; 144 __be16 hash_alg; 145 u8 pcr_select_size; 146 u8 pcr_select[TPM2_PCR_SELECT_MIN]; 147 __be32 digests_cnt; 148 __be16 digest_size; 149 u8 digest[]; 150 } __packed; 151 152 /** 153 * tpm2_pcr_read() - read a PCR value 154 * @chip: TPM chip to use. 155 * @pcr_idx: index of the PCR to read. 156 * @digest: PCR bank and buffer current PCR value is written to. 157 * @digest_size_ptr: pointer to variable that stores the digest size. 158 * 159 * Return: Same as with tpm_transmit_cmd. 160 */ 161 int tpm2_pcr_read(struct tpm_chip *chip, u32 pcr_idx, 162 struct tpm_digest *digest, u16 *digest_size_ptr) 163 { 164 int i; 165 int rc; 166 struct tpm_buf buf; 167 struct tpm2_pcr_read_out *out; 168 u8 pcr_select[TPM2_PCR_SELECT_MIN] = {0}; 169 u16 digest_size; 170 u16 expected_digest_size = 0; 171 172 if (pcr_idx >= TPM2_PLATFORM_PCR) 173 return -EINVAL; 174 175 if (!digest_size_ptr) { 176 for (i = 0; i < chip->nr_allocated_banks && 177 chip->allocated_banks[i].alg_id != digest->alg_id; i++) 178 ; 179 180 if (i == chip->nr_allocated_banks) 181 return -EINVAL; 182 183 expected_digest_size = chip->allocated_banks[i].digest_size; 184 } 185 186 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_PCR_READ); 187 if (rc) 188 return rc; 189 190 pcr_select[pcr_idx >> 3] = 1 << (pcr_idx & 0x7); 191 192 tpm_buf_append_u32(&buf, 1); 193 tpm_buf_append_u16(&buf, digest->alg_id); 194 tpm_buf_append_u8(&buf, TPM2_PCR_SELECT_MIN); 195 tpm_buf_append(&buf, (const unsigned char *)pcr_select, 196 sizeof(pcr_select)); 197 198 rc = tpm_transmit_cmd(chip, &buf, 0, "attempting to read a pcr value"); 199 if (rc) 200 goto out; 201 202 out = (struct tpm2_pcr_read_out *)&buf.data[TPM_HEADER_SIZE]; 203 digest_size = be16_to_cpu(out->digest_size); 204 if (digest_size > sizeof(digest->digest) || 205 (!digest_size_ptr && digest_size != expected_digest_size)) { 206 rc = -EINVAL; 207 goto out; 208 } 209 210 if (digest_size_ptr) 211 *digest_size_ptr = digest_size; 212 213 memcpy(digest->digest, out->digest, digest_size); 214 out: 215 tpm_buf_destroy(&buf); 216 return rc; 217 } 218 219 /** 220 * tpm2_pcr_extend() - extend a PCR value 221 * 222 * @chip: TPM chip to use. 223 * @pcr_idx: index of the PCR. 224 * @digests: list of pcr banks and corresponding digest values to extend. 225 * 226 * Return: Same as with tpm_transmit_cmd. 227 */ 228 int tpm2_pcr_extend(struct tpm_chip *chip, u32 pcr_idx, 229 struct tpm_digest *digests) 230 { 231 struct tpm_buf buf; 232 int rc; 233 int i; 234 235 rc = tpm2_start_auth_session(chip); 236 if (rc) 237 return rc; 238 239 rc = tpm_buf_init(&buf, TPM2_ST_SESSIONS, TPM2_CC_PCR_EXTEND); 240 if (rc) { 241 tpm2_end_auth_session(chip); 242 return rc; 243 } 244 245 tpm_buf_append_name(chip, &buf, pcr_idx, NULL); 246 tpm_buf_append_hmac_session(chip, &buf, 0, NULL, 0); 247 248 tpm_buf_append_u32(&buf, chip->nr_allocated_banks); 249 250 for (i = 0; i < chip->nr_allocated_banks; i++) { 251 tpm_buf_append_u16(&buf, digests[i].alg_id); 252 tpm_buf_append(&buf, (const unsigned char *)&digests[i].digest, 253 chip->allocated_banks[i].digest_size); 254 } 255 256 tpm_buf_fill_hmac_session(chip, &buf); 257 rc = tpm_transmit_cmd(chip, &buf, 0, "attempting extend a PCR value"); 258 rc = tpm_buf_check_hmac_response(chip, &buf, rc); 259 260 tpm_buf_destroy(&buf); 261 262 return rc; 263 } 264 265 struct tpm2_get_random_out { 266 __be16 size; 267 u8 buffer[TPM_MAX_RNG_DATA]; 268 } __packed; 269 270 /** 271 * tpm2_get_random() - get random bytes from the TPM RNG 272 * 273 * @chip: a &tpm_chip instance 274 * @dest: destination buffer 275 * @max: the max number of random bytes to pull 276 * 277 * Return: 278 * size of the buffer on success, 279 * -errno otherwise (positive TPM return codes are masked to -EIO) 280 */ 281 int tpm2_get_random(struct tpm_chip *chip, u8 *dest, size_t max) 282 { 283 struct tpm2_get_random_out *out; 284 struct tpm_buf buf; 285 u32 recd; 286 u32 num_bytes = max; 287 int err; 288 int total = 0; 289 int retries = 5; 290 u8 *dest_ptr = dest; 291 292 if (!num_bytes || max > TPM_MAX_RNG_DATA) 293 return -EINVAL; 294 295 err = tpm2_start_auth_session(chip); 296 if (err) 297 return err; 298 299 err = tpm_buf_init(&buf, 0, 0); 300 if (err) { 301 tpm2_end_auth_session(chip); 302 return err; 303 } 304 305 do { 306 tpm_buf_reset(&buf, TPM2_ST_SESSIONS, TPM2_CC_GET_RANDOM); 307 tpm_buf_append_hmac_session_opt(chip, &buf, TPM2_SA_ENCRYPT 308 | TPM2_SA_CONTINUE_SESSION, 309 NULL, 0); 310 tpm_buf_append_u16(&buf, num_bytes); 311 tpm_buf_fill_hmac_session(chip, &buf); 312 err = tpm_transmit_cmd(chip, &buf, 313 offsetof(struct tpm2_get_random_out, 314 buffer), 315 "attempting get random"); 316 err = tpm_buf_check_hmac_response(chip, &buf, err); 317 if (err) { 318 if (err > 0) 319 err = -EIO; 320 goto out; 321 } 322 323 out = (struct tpm2_get_random_out *)tpm_buf_parameters(&buf); 324 recd = min_t(u32, be16_to_cpu(out->size), num_bytes); 325 if (tpm_buf_length(&buf) < 326 TPM_HEADER_SIZE + 327 offsetof(struct tpm2_get_random_out, buffer) + 328 recd) { 329 err = -EFAULT; 330 goto out; 331 } 332 memcpy(dest_ptr, out->buffer, recd); 333 334 dest_ptr += recd; 335 total += recd; 336 num_bytes -= recd; 337 } while (retries-- && total < max); 338 339 tpm_buf_destroy(&buf); 340 tpm2_end_auth_session(chip); 341 342 return total ? total : -EIO; 343 out: 344 tpm_buf_destroy(&buf); 345 tpm2_end_auth_session(chip); 346 return err; 347 } 348 349 /** 350 * tpm2_flush_context() - execute a TPM2_FlushContext command 351 * @chip: TPM chip to use 352 * @handle: context handle 353 */ 354 void tpm2_flush_context(struct tpm_chip *chip, u32 handle) 355 { 356 struct tpm_buf buf; 357 int rc; 358 359 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_FLUSH_CONTEXT); 360 if (rc) { 361 dev_warn(&chip->dev, "0x%08x was not flushed, out of memory\n", 362 handle); 363 return; 364 } 365 366 tpm_buf_append_u32(&buf, handle); 367 368 tpm_transmit_cmd(chip, &buf, 0, "flushing context"); 369 tpm_buf_destroy(&buf); 370 } 371 EXPORT_SYMBOL_GPL(tpm2_flush_context); 372 373 struct tpm2_get_cap_out { 374 u8 more_data; 375 __be32 subcap_id; 376 __be32 property_cnt; 377 __be32 property_id; 378 __be32 value; 379 } __packed; 380 381 /** 382 * tpm2_get_tpm_pt() - get value of a TPM_CAP_TPM_PROPERTIES type property 383 * @chip: a &tpm_chip instance 384 * @property_id: property ID. 385 * @value: output variable. 386 * @desc: passed to tpm_transmit_cmd() 387 * 388 * Return: 389 * 0 on success, 390 * -errno or a TPM return code otherwise 391 */ 392 ssize_t tpm2_get_tpm_pt(struct tpm_chip *chip, u32 property_id, u32 *value, 393 const char *desc) 394 { 395 struct tpm2_get_cap_out *out; 396 struct tpm_buf buf; 397 int rc; 398 399 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY); 400 if (rc) 401 return rc; 402 tpm_buf_append_u32(&buf, TPM2_CAP_TPM_PROPERTIES); 403 tpm_buf_append_u32(&buf, property_id); 404 tpm_buf_append_u32(&buf, 1); 405 rc = tpm_transmit_cmd(chip, &buf, 0, NULL); 406 if (!rc) { 407 out = (struct tpm2_get_cap_out *) 408 &buf.data[TPM_HEADER_SIZE]; 409 /* 410 * To prevent failing boot up of some systems, Infineon TPM2.0 411 * returns SUCCESS on TPM2_Startup in field upgrade mode. Also 412 * the TPM2_Getcapability command returns a zero length list 413 * in field upgrade mode. 414 */ 415 if (be32_to_cpu(out->property_cnt) > 0) 416 *value = be32_to_cpu(out->value); 417 else 418 rc = -ENODATA; 419 } 420 tpm_buf_destroy(&buf); 421 return rc; 422 } 423 EXPORT_SYMBOL_GPL(tpm2_get_tpm_pt); 424 425 /** 426 * tpm2_shutdown() - send a TPM shutdown command 427 * 428 * Sends a TPM shutdown command. The shutdown command is used in call 429 * sites where the system is going down. If it fails, there is not much 430 * that can be done except print an error message. 431 * 432 * @chip: a &tpm_chip instance 433 * @shutdown_type: TPM_SU_CLEAR or TPM_SU_STATE. 434 */ 435 void tpm2_shutdown(struct tpm_chip *chip, u16 shutdown_type) 436 { 437 struct tpm_buf buf; 438 int rc; 439 440 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_SHUTDOWN); 441 if (rc) 442 return; 443 tpm_buf_append_u16(&buf, shutdown_type); 444 tpm_transmit_cmd(chip, &buf, 0, "stopping the TPM"); 445 tpm_buf_destroy(&buf); 446 } 447 448 /** 449 * tpm2_do_selftest() - ensure that all self tests have passed 450 * 451 * @chip: TPM chip to use 452 * 453 * Return: Same as with tpm_transmit_cmd. 454 * 455 * The TPM can either run all self tests synchronously and then return 456 * RC_SUCCESS once all tests were successful. Or it can choose to run the tests 457 * asynchronously and return RC_TESTING immediately while the self tests still 458 * execute in the background. This function handles both cases and waits until 459 * all tests have completed. 460 */ 461 static int tpm2_do_selftest(struct tpm_chip *chip) 462 { 463 struct tpm_buf buf; 464 int full; 465 int rc; 466 467 for (full = 0; full < 2; full++) { 468 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_SELF_TEST); 469 if (rc) 470 return rc; 471 472 tpm_buf_append_u8(&buf, full); 473 rc = tpm_transmit_cmd(chip, &buf, 0, 474 "attempting the self test"); 475 tpm_buf_destroy(&buf); 476 477 if (rc == TPM2_RC_TESTING) 478 rc = TPM2_RC_SUCCESS; 479 if (rc == TPM2_RC_INITIALIZE || rc == TPM2_RC_SUCCESS) 480 return rc; 481 } 482 483 return rc; 484 } 485 486 /** 487 * tpm2_probe() - probe for the TPM 2.0 protocol 488 * @chip: a &tpm_chip instance 489 * 490 * Send an idempotent TPM 2.0 command and see whether there is TPM2 chip in the 491 * other end based on the response tag. The flag TPM_CHIP_FLAG_TPM2 is set by 492 * this function if this is the case. 493 * 494 * Return: 495 * 0 on success, 496 * -errno otherwise 497 */ 498 int tpm2_probe(struct tpm_chip *chip) 499 { 500 struct tpm_header *out; 501 struct tpm_buf buf; 502 int rc; 503 504 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY); 505 if (rc) 506 return rc; 507 tpm_buf_append_u32(&buf, TPM2_CAP_TPM_PROPERTIES); 508 tpm_buf_append_u32(&buf, TPM_PT_TOTAL_COMMANDS); 509 tpm_buf_append_u32(&buf, 1); 510 rc = tpm_transmit_cmd(chip, &buf, 0, NULL); 511 /* We ignore TPM return codes on purpose. */ 512 if (rc >= 0) { 513 out = (struct tpm_header *)buf.data; 514 if (be16_to_cpu(out->tag) == TPM2_ST_NO_SESSIONS) 515 chip->flags |= TPM_CHIP_FLAG_TPM2; 516 } 517 tpm_buf_destroy(&buf); 518 return 0; 519 } 520 EXPORT_SYMBOL_GPL(tpm2_probe); 521 522 static int tpm2_init_bank_info(struct tpm_chip *chip, u32 bank_index) 523 { 524 struct tpm_bank_info *bank = chip->allocated_banks + bank_index; 525 struct tpm_digest digest = { .alg_id = bank->alg_id }; 526 int i; 527 528 /* 529 * Avoid unnecessary PCR read operations to reduce overhead 530 * and obtain identifiers of the crypto subsystem. 531 */ 532 for (i = 0; i < ARRAY_SIZE(tpm2_hash_map); i++) { 533 enum hash_algo crypto_algo = tpm2_hash_map[i].crypto_id; 534 535 if (bank->alg_id != tpm2_hash_map[i].tpm_id) 536 continue; 537 538 bank->digest_size = hash_digest_size[crypto_algo]; 539 bank->crypto_id = crypto_algo; 540 return 0; 541 } 542 543 bank->crypto_id = HASH_ALGO__LAST; 544 545 return tpm2_pcr_read(chip, 0, &digest, &bank->digest_size); 546 } 547 548 struct tpm2_pcr_selection { 549 __be16 hash_alg; 550 u8 size_of_select; 551 u8 pcr_select[3]; 552 } __packed; 553 554 ssize_t tpm2_get_pcr_allocation(struct tpm_chip *chip) 555 { 556 struct tpm2_pcr_selection pcr_selection; 557 struct tpm_buf buf; 558 void *marker; 559 void *end; 560 void *pcr_select_offset; 561 u32 sizeof_pcr_selection; 562 u32 nr_possible_banks; 563 u32 nr_alloc_banks = 0; 564 u16 hash_alg; 565 u32 rsp_len; 566 int rc; 567 int i = 0; 568 569 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY); 570 if (rc) 571 return rc; 572 573 tpm_buf_append_u32(&buf, TPM2_CAP_PCRS); 574 tpm_buf_append_u32(&buf, 0); 575 tpm_buf_append_u32(&buf, 1); 576 577 rc = tpm_transmit_cmd(chip, &buf, 9, "get tpm pcr allocation"); 578 if (rc) 579 goto out; 580 581 nr_possible_banks = be32_to_cpup( 582 (__be32 *)&buf.data[TPM_HEADER_SIZE + 5]); 583 584 chip->allocated_banks = kcalloc(nr_possible_banks, 585 sizeof(*chip->allocated_banks), 586 GFP_KERNEL); 587 if (!chip->allocated_banks) { 588 rc = -ENOMEM; 589 goto out; 590 } 591 592 marker = &buf.data[TPM_HEADER_SIZE + 9]; 593 594 rsp_len = be32_to_cpup((__be32 *)&buf.data[2]); 595 end = &buf.data[rsp_len]; 596 597 for (i = 0; i < nr_possible_banks; i++) { 598 pcr_select_offset = marker + 599 offsetof(struct tpm2_pcr_selection, size_of_select); 600 if (pcr_select_offset >= end) { 601 rc = -EFAULT; 602 break; 603 } 604 605 memcpy(&pcr_selection, marker, sizeof(pcr_selection)); 606 hash_alg = be16_to_cpu(pcr_selection.hash_alg); 607 608 pcr_select_offset = memchr_inv(pcr_selection.pcr_select, 0, 609 pcr_selection.size_of_select); 610 if (pcr_select_offset) { 611 chip->allocated_banks[nr_alloc_banks].alg_id = hash_alg; 612 613 rc = tpm2_init_bank_info(chip, nr_alloc_banks); 614 if (rc < 0) 615 break; 616 617 nr_alloc_banks++; 618 } 619 620 sizeof_pcr_selection = sizeof(pcr_selection.hash_alg) + 621 sizeof(pcr_selection.size_of_select) + 622 pcr_selection.size_of_select; 623 marker = marker + sizeof_pcr_selection; 624 } 625 626 chip->nr_allocated_banks = nr_alloc_banks; 627 out: 628 tpm_buf_destroy(&buf); 629 630 return rc; 631 } 632 633 int tpm2_get_cc_attrs_tbl(struct tpm_chip *chip) 634 { 635 struct tpm_buf buf; 636 u32 nr_commands; 637 __be32 *attrs; 638 u32 cc; 639 int i; 640 int rc; 641 642 rc = tpm2_get_tpm_pt(chip, TPM_PT_TOTAL_COMMANDS, &nr_commands, NULL); 643 if (rc) 644 goto out; 645 646 if (nr_commands > 0xFFFFF) { 647 rc = -EFAULT; 648 goto out; 649 } 650 651 chip->cc_attrs_tbl = devm_kcalloc(&chip->dev, 4, nr_commands, 652 GFP_KERNEL); 653 if (!chip->cc_attrs_tbl) { 654 rc = -ENOMEM; 655 goto out; 656 } 657 658 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_GET_CAPABILITY); 659 if (rc) 660 goto out; 661 662 tpm_buf_append_u32(&buf, TPM2_CAP_COMMANDS); 663 tpm_buf_append_u32(&buf, TPM2_CC_FIRST); 664 tpm_buf_append_u32(&buf, nr_commands); 665 666 rc = tpm_transmit_cmd(chip, &buf, 9 + 4 * nr_commands, NULL); 667 if (rc) { 668 tpm_buf_destroy(&buf); 669 goto out; 670 } 671 672 if (nr_commands != 673 be32_to_cpup((__be32 *)&buf.data[TPM_HEADER_SIZE + 5])) { 674 rc = -EFAULT; 675 tpm_buf_destroy(&buf); 676 goto out; 677 } 678 679 chip->nr_commands = nr_commands; 680 681 attrs = (__be32 *)&buf.data[TPM_HEADER_SIZE + 9]; 682 for (i = 0; i < nr_commands; i++, attrs++) { 683 chip->cc_attrs_tbl[i] = be32_to_cpup(attrs); 684 cc = chip->cc_attrs_tbl[i] & 0xFFFF; 685 686 if (cc == TPM2_CC_CONTEXT_SAVE || cc == TPM2_CC_FLUSH_CONTEXT) { 687 chip->cc_attrs_tbl[i] &= 688 ~(GENMASK(2, 0) << TPM2_CC_ATTR_CHANDLES); 689 chip->cc_attrs_tbl[i] |= 1 << TPM2_CC_ATTR_CHANDLES; 690 } 691 } 692 693 tpm_buf_destroy(&buf); 694 695 out: 696 if (rc > 0) 697 rc = -ENODEV; 698 return rc; 699 } 700 EXPORT_SYMBOL_GPL(tpm2_get_cc_attrs_tbl); 701 702 /** 703 * tpm2_startup - turn on the TPM 704 * @chip: TPM chip to use 705 * 706 * Normally the firmware should start the TPM. This function is provided as a 707 * workaround if this does not happen. A legal case for this could be for 708 * example when a TPM emulator is used. 709 * 710 * Return: same as tpm_transmit_cmd() 711 */ 712 713 static int tpm2_startup(struct tpm_chip *chip) 714 { 715 struct tpm_buf buf; 716 int rc; 717 718 dev_info(&chip->dev, "starting up the TPM manually\n"); 719 720 rc = tpm_buf_init(&buf, TPM2_ST_NO_SESSIONS, TPM2_CC_STARTUP); 721 if (rc < 0) 722 return rc; 723 724 tpm_buf_append_u16(&buf, TPM2_SU_CLEAR); 725 rc = tpm_transmit_cmd(chip, &buf, 0, "attempting to start the TPM"); 726 tpm_buf_destroy(&buf); 727 728 return rc; 729 } 730 731 /** 732 * tpm2_auto_startup - Perform the standard automatic TPM initialization 733 * sequence 734 * @chip: TPM chip to use 735 * 736 * Returns 0 on success, < 0 in case of fatal error. 737 */ 738 int tpm2_auto_startup(struct tpm_chip *chip) 739 { 740 int rc; 741 742 rc = tpm2_get_timeouts(chip); 743 if (rc) 744 goto out; 745 746 rc = tpm2_do_selftest(chip); 747 if (rc && rc != TPM2_RC_INITIALIZE) 748 goto out; 749 750 if (rc == TPM2_RC_INITIALIZE) { 751 rc = tpm2_startup(chip); 752 if (rc) 753 goto out; 754 755 rc = tpm2_do_selftest(chip); 756 if (rc) 757 goto out; 758 } 759 760 rc = tpm2_get_cc_attrs_tbl(chip); 761 if (rc == TPM2_RC_FAILURE || (rc < 0 && rc != -ENOMEM)) { 762 dev_info(&chip->dev, 763 "TPM in field failure mode, requires firmware upgrade\n"); 764 chip->flags |= TPM_CHIP_FLAG_FIRMWARE_UPGRADE; 765 rc = 0; 766 } 767 768 if (rc) 769 goto out; 770 771 rc = tpm2_sessions_init(chip); 772 773 out: 774 /* 775 * Infineon TPM in field upgrade mode will return no data for the number 776 * of supported commands. 777 */ 778 if (rc == TPM2_RC_UPGRADE || rc == -ENODATA) { 779 dev_info(&chip->dev, "TPM in field upgrade mode, requires firmware upgrade\n"); 780 chip->flags |= TPM_CHIP_FLAG_FIRMWARE_UPGRADE; 781 rc = 0; 782 } 783 784 if (rc > 0) 785 rc = -ENODEV; 786 return rc; 787 } 788 789 int tpm2_find_cc(struct tpm_chip *chip, u32 cc) 790 { 791 u32 cc_mask; 792 int i; 793 794 cc_mask = 1 << TPM2_CC_ATTR_VENDOR | GENMASK(15, 0); 795 for (i = 0; i < chip->nr_commands; i++) 796 if (cc == (chip->cc_attrs_tbl[i] & cc_mask)) 797 return i; 798 799 return -1; 800 } 801