1 /* 2 * RNG driver for VIA RNGs 3 * 4 * Copyright 2005 (c) MontaVista Software, Inc. 5 * 6 * with the majority of the code coming from: 7 * 8 * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG) 9 * (c) Copyright 2003 Red Hat Inc <jgarzik@redhat.com> 10 * 11 * derived from 12 * 13 * Hardware driver for the AMD 768 Random Number Generator (RNG) 14 * (c) Copyright 2001 Red Hat Inc <alan@redhat.com> 15 * 16 * derived from 17 * 18 * Hardware driver for Intel i810 Random Number Generator (RNG) 19 * Copyright 2000,2001 Jeff Garzik <jgarzik@pobox.com> 20 * Copyright 2000,2001 Philipp Rumpf <prumpf@mandrakesoft.com> 21 * 22 * This file is licensed under the terms of the GNU General Public 23 * License version 2. This program is licensed "as is" without any 24 * warranty of any kind, whether express or implied. 25 */ 26 27 #include <linux/module.h> 28 #include <linux/kernel.h> 29 #include <linux/hw_random.h> 30 #include <linux/delay.h> 31 #include <asm/io.h> 32 #include <asm/msr.h> 33 #include <asm/cpufeature.h> 34 35 36 #define PFX KBUILD_MODNAME ": " 37 38 39 enum { 40 VIA_STRFILT_CNT_SHIFT = 16, 41 VIA_STRFILT_FAIL = (1 << 15), 42 VIA_STRFILT_ENABLE = (1 << 14), 43 VIA_RAWBITS_ENABLE = (1 << 13), 44 VIA_RNG_ENABLE = (1 << 6), 45 VIA_XSTORE_CNT_MASK = 0x0F, 46 47 VIA_RNG_CHUNK_8 = 0x00, /* 64 rand bits, 64 stored bits */ 48 VIA_RNG_CHUNK_4 = 0x01, /* 32 rand bits, 32 stored bits */ 49 VIA_RNG_CHUNK_4_MASK = 0xFFFFFFFF, 50 VIA_RNG_CHUNK_2 = 0x02, /* 16 rand bits, 32 stored bits */ 51 VIA_RNG_CHUNK_2_MASK = 0xFFFF, 52 VIA_RNG_CHUNK_1 = 0x03, /* 8 rand bits, 32 stored bits */ 53 VIA_RNG_CHUNK_1_MASK = 0xFF, 54 }; 55 56 /* 57 * Investigate using the 'rep' prefix to obtain 32 bits of random data 58 * in one insn. The upside is potentially better performance. The 59 * downside is that the instruction becomes no longer atomic. Due to 60 * this, just like familiar issues with /dev/random itself, the worst 61 * case of a 'rep xstore' could potentially pause a cpu for an 62 * unreasonably long time. In practice, this condition would likely 63 * only occur when the hardware is failing. (or so we hope :)) 64 * 65 * Another possible performance boost may come from simply buffering 66 * until we have 4 bytes, thus returning a u32 at a time, 67 * instead of the current u8-at-a-time. 68 */ 69 70 static inline u32 xstore(u32 *addr, u32 edx_in) 71 { 72 u32 eax_out; 73 74 asm(".byte 0x0F,0xA7,0xC0 /* xstore %%edi (addr=%0) */" 75 :"=m"(*addr), "=a"(eax_out) 76 :"D"(addr), "d"(edx_in)); 77 78 return eax_out; 79 } 80 81 static int via_rng_data_present(struct hwrng *rng, int wait) 82 { 83 u32 bytes_out; 84 u32 *via_rng_datum = (u32 *)(&rng->priv); 85 int i; 86 87 /* We choose the recommended 1-byte-per-instruction RNG rate, 88 * for greater randomness at the expense of speed. Larger 89 * values 2, 4, or 8 bytes-per-instruction yield greater 90 * speed at lesser randomness. 91 * 92 * If you change this to another VIA_CHUNK_n, you must also 93 * change the ->n_bytes values in rng_vendor_ops[] tables. 94 * VIA_CHUNK_8 requires further code changes. 95 * 96 * A copy of MSR_VIA_RNG is placed in eax_out when xstore 97 * completes. 98 */ 99 100 for (i = 0; i < 20; i++) { 101 *via_rng_datum = 0; /* paranoia, not really necessary */ 102 bytes_out = xstore(via_rng_datum, VIA_RNG_CHUNK_1); 103 bytes_out &= VIA_XSTORE_CNT_MASK; 104 if (bytes_out || !wait) 105 break; 106 udelay(10); 107 } 108 return bytes_out ? 1 : 0; 109 } 110 111 static int via_rng_data_read(struct hwrng *rng, u32 *data) 112 { 113 u32 via_rng_datum = (u32)rng->priv; 114 115 *data = via_rng_datum; 116 117 return 1; 118 } 119 120 static int via_rng_init(struct hwrng *rng) 121 { 122 u32 lo, hi, old_lo; 123 124 /* Control the RNG via MSR. Tread lightly and pay very close 125 * close attention to values written, as the reserved fields 126 * are documented to be "undefined and unpredictable"; but it 127 * does not say to write them as zero, so I make a guess that 128 * we restore the values we find in the register. 129 */ 130 rdmsr(MSR_VIA_RNG, lo, hi); 131 132 old_lo = lo; 133 lo &= ~(0x7f << VIA_STRFILT_CNT_SHIFT); 134 lo &= ~VIA_XSTORE_CNT_MASK; 135 lo &= ~(VIA_STRFILT_ENABLE | VIA_STRFILT_FAIL | VIA_RAWBITS_ENABLE); 136 lo |= VIA_RNG_ENABLE; 137 138 if (lo != old_lo) 139 wrmsr(MSR_VIA_RNG, lo, hi); 140 141 /* perhaps-unnecessary sanity check; remove after testing if 142 unneeded */ 143 rdmsr(MSR_VIA_RNG, lo, hi); 144 if ((lo & VIA_RNG_ENABLE) == 0) { 145 printk(KERN_ERR PFX "cannot enable VIA C3 RNG, aborting\n"); 146 return -ENODEV; 147 } 148 149 return 0; 150 } 151 152 153 static struct hwrng via_rng = { 154 .name = "via", 155 .init = via_rng_init, 156 .data_present = via_rng_data_present, 157 .data_read = via_rng_data_read, 158 }; 159 160 161 static int __init mod_init(void) 162 { 163 int err; 164 165 if (!cpu_has_xstore) 166 return -ENODEV; 167 printk(KERN_INFO "VIA RNG detected\n"); 168 err = hwrng_register(&via_rng); 169 if (err) { 170 printk(KERN_ERR PFX "RNG registering failed (%d)\n", 171 err); 172 goto out; 173 } 174 out: 175 return err; 176 } 177 178 static void __exit mod_exit(void) 179 { 180 hwrng_unregister(&via_rng); 181 } 182 183 module_init(mod_init); 184 module_exit(mod_exit); 185 186 MODULE_DESCRIPTION("H/W RNG driver for VIA chipsets"); 187 MODULE_LICENSE("GPL"); 188