xref: /linux/drivers/char/hw_random/npcm-rng.c (revision 9cbd5a8abca904441e36861e3a92961bec41d13f)
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2019 Nuvoton Technology corporation.
3 
4 #include <linux/kernel.h>
5 #include <linux/module.h>
6 #include <linux/io.h>
7 #include <linux/iopoll.h>
8 #include <linux/init.h>
9 #include <linux/random.h>
10 #include <linux/err.h>
11 #include <linux/platform_device.h>
12 #include <linux/hw_random.h>
13 #include <linux/delay.h>
14 #include <linux/of_irq.h>
15 #include <linux/pm_runtime.h>
16 #include <linux/of_device.h>
17 
18 #define NPCM_RNGCS_REG		0x00	/* Control and status register */
19 #define NPCM_RNGD_REG		0x04	/* Data register */
20 #define NPCM_RNGMODE_REG	0x08	/* Mode register */
21 
22 #define NPCM_RNG_CLK_SET_62_5MHZ	BIT(2) /* 60-80 MHz */
23 #define NPCM_RNG_CLK_SET_25MHZ	GENMASK(4, 3) /* 20-25 MHz */
24 #define NPCM_RNG_DATA_VALID	BIT(1)
25 #define NPCM_RNG_ENABLE		BIT(0)
26 #define NPCM_RNG_M1ROSEL	BIT(1)
27 
28 #define NPCM_RNG_TIMEOUT_USEC	20000
29 #define NPCM_RNG_POLL_USEC	1000
30 
31 #define to_npcm_rng(p)	container_of(p, struct npcm_rng, rng)
32 
33 struct npcm_rng {
34 	void __iomem *base;
35 	struct hwrng rng;
36 	u32 clkp;
37 };
38 
39 static int npcm_rng_init(struct hwrng *rng)
40 {
41 	struct npcm_rng *priv = to_npcm_rng(rng);
42 
43 	writel(priv->clkp | NPCM_RNG_ENABLE, priv->base + NPCM_RNGCS_REG);
44 
45 	return 0;
46 }
47 
48 static void npcm_rng_cleanup(struct hwrng *rng)
49 {
50 	struct npcm_rng *priv = to_npcm_rng(rng);
51 
52 	writel(priv->clkp, priv->base + NPCM_RNGCS_REG);
53 }
54 
55 static int npcm_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
56 {
57 	struct npcm_rng *priv = to_npcm_rng(rng);
58 	int retval = 0;
59 	int ready;
60 
61 	pm_runtime_get_sync((struct device *)priv->rng.priv);
62 
63 	while (max) {
64 		if (wait) {
65 			if (readb_poll_timeout(priv->base + NPCM_RNGCS_REG,
66 					       ready,
67 					       ready & NPCM_RNG_DATA_VALID,
68 					       NPCM_RNG_POLL_USEC,
69 					       NPCM_RNG_TIMEOUT_USEC))
70 				break;
71 		} else {
72 			if ((readb(priv->base + NPCM_RNGCS_REG) &
73 			    NPCM_RNG_DATA_VALID) == 0)
74 				break;
75 		}
76 
77 		*(u8 *)buf = readb(priv->base + NPCM_RNGD_REG);
78 		retval++;
79 		buf++;
80 		max--;
81 	}
82 
83 	pm_runtime_mark_last_busy((struct device *)priv->rng.priv);
84 	pm_runtime_put_sync_autosuspend((struct device *)priv->rng.priv);
85 
86 	return retval || !wait ? retval : -EIO;
87 }
88 
89 static int npcm_rng_probe(struct platform_device *pdev)
90 {
91 	struct npcm_rng *priv;
92 	int ret;
93 
94 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
95 	if (!priv)
96 		return -ENOMEM;
97 
98 	priv->base = devm_platform_ioremap_resource(pdev, 0);
99 	if (IS_ERR(priv->base))
100 		return PTR_ERR(priv->base);
101 
102 	dev_set_drvdata(&pdev->dev, priv);
103 	pm_runtime_set_autosuspend_delay(&pdev->dev, 100);
104 	pm_runtime_use_autosuspend(&pdev->dev);
105 	pm_runtime_enable(&pdev->dev);
106 
107 #ifndef CONFIG_PM
108 	priv->rng.init = npcm_rng_init;
109 	priv->rng.cleanup = npcm_rng_cleanup;
110 #endif
111 	priv->rng.name = pdev->name;
112 	priv->rng.read = npcm_rng_read;
113 	priv->rng.priv = (unsigned long)&pdev->dev;
114 	priv->clkp = (u32)(uintptr_t)of_device_get_match_data(&pdev->dev);
115 
116 	writel(NPCM_RNG_M1ROSEL, priv->base + NPCM_RNGMODE_REG);
117 
118 	ret = devm_hwrng_register(&pdev->dev, &priv->rng);
119 	if (ret) {
120 		dev_err(&pdev->dev, "Failed to register rng device: %d\n",
121 			ret);
122 		pm_runtime_disable(&pdev->dev);
123 		pm_runtime_set_suspended(&pdev->dev);
124 		return ret;
125 	}
126 
127 	return 0;
128 }
129 
130 static int npcm_rng_remove(struct platform_device *pdev)
131 {
132 	struct npcm_rng *priv = platform_get_drvdata(pdev);
133 
134 	devm_hwrng_unregister(&pdev->dev, &priv->rng);
135 	pm_runtime_disable(&pdev->dev);
136 	pm_runtime_set_suspended(&pdev->dev);
137 
138 	return 0;
139 }
140 
141 #ifdef CONFIG_PM
142 static int npcm_rng_runtime_suspend(struct device *dev)
143 {
144 	struct npcm_rng *priv = dev_get_drvdata(dev);
145 
146 	npcm_rng_cleanup(&priv->rng);
147 
148 	return 0;
149 }
150 
151 static int npcm_rng_runtime_resume(struct device *dev)
152 {
153 	struct npcm_rng *priv = dev_get_drvdata(dev);
154 
155 	return npcm_rng_init(&priv->rng);
156 }
157 #endif
158 
159 static const struct dev_pm_ops npcm_rng_pm_ops = {
160 	SET_RUNTIME_PM_OPS(npcm_rng_runtime_suspend,
161 			   npcm_rng_runtime_resume, NULL)
162 	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
163 				pm_runtime_force_resume)
164 };
165 
166 static const struct of_device_id rng_dt_id[] __maybe_unused = {
167 	{ .compatible = "nuvoton,npcm750-rng",
168 		.data = (void *)NPCM_RNG_CLK_SET_25MHZ },
169 	{ .compatible = "nuvoton,npcm845-rng",
170 		.data = (void *)NPCM_RNG_CLK_SET_62_5MHZ },
171 	{},
172 };
173 MODULE_DEVICE_TABLE(of, rng_dt_id);
174 
175 static struct platform_driver npcm_rng_driver = {
176 	.driver = {
177 		.name		= "npcm-rng",
178 		.pm		= &npcm_rng_pm_ops,
179 		.of_match_table = of_match_ptr(rng_dt_id),
180 	},
181 	.probe		= npcm_rng_probe,
182 	.remove		= npcm_rng_remove,
183 };
184 
185 module_platform_driver(npcm_rng_driver);
186 
187 MODULE_DESCRIPTION("Nuvoton NPCM Random Number Generator Driver");
188 MODULE_AUTHOR("Tomer Maimon <tomer.maimon@nuvoton.com>");
189 MODULE_LICENSE("GPL v2");
190