xref: /linux/drivers/char/hw_random/iproc-rng200.c (revision a266ef69b890f099069cf51bb40572611c435a54)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2015 Broadcom Corporation
4 *
5 */
6 /*
7  * DESCRIPTION: The Broadcom iProc RNG200 Driver
8  */
9 
10 #include <linux/hw_random.h>
11 #include <linux/init.h>
12 #include <linux/io.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/of_address.h>
16 #include <linux/of_platform.h>
17 #include <linux/platform_device.h>
18 #include <linux/delay.h>
19 
20 /* Registers */
21 #define RNG_CTRL_OFFSET					0x00
22 #define RNG_CTRL_RNG_RBGEN_MASK				0x00001FFF
23 #define RNG_CTRL_RNG_RBGEN_ENABLE			0x00000001
24 
25 #define RNG_SOFT_RESET_OFFSET				0x04
26 #define RNG_SOFT_RESET					0x00000001
27 
28 #define RBG_SOFT_RESET_OFFSET				0x08
29 #define RBG_SOFT_RESET					0x00000001
30 
31 #define RNG_INT_STATUS_OFFSET				0x18
32 #define RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK	0x80000000
33 #define RNG_INT_STATUS_STARTUP_TRANSITIONS_MET_IRQ_MASK	0x00020000
34 #define RNG_INT_STATUS_NIST_FAIL_IRQ_MASK		0x00000020
35 #define RNG_INT_STATUS_TOTAL_BITS_COUNT_IRQ_MASK	0x00000001
36 
37 #define RNG_FIFO_DATA_OFFSET				0x20
38 
39 #define RNG_FIFO_COUNT_OFFSET				0x24
40 #define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK		0x000000FF
41 
42 struct iproc_rng200_dev {
43 	struct hwrng rng;
44 	void __iomem *base;
45 };
46 
47 #define to_rng_priv(rng)	container_of(rng, struct iproc_rng200_dev, rng)
48 
49 static void iproc_rng200_enable_set(void __iomem *rng_base, bool enable)
50 {
51 	u32 val;
52 
53 	val = ioread32(rng_base + RNG_CTRL_OFFSET);
54 	val &= ~RNG_CTRL_RNG_RBGEN_MASK;
55 
56 	if (enable)
57 		val |= RNG_CTRL_RNG_RBGEN_ENABLE;
58 
59 	iowrite32(val, rng_base + RNG_CTRL_OFFSET);
60 }
61 
62 static void iproc_rng200_restart(void __iomem *rng_base)
63 {
64 	uint32_t val;
65 
66 	iproc_rng200_enable_set(rng_base, false);
67 
68 	/* Clear all interrupt status */
69 	iowrite32(0xFFFFFFFFUL, rng_base + RNG_INT_STATUS_OFFSET);
70 
71 	/* Reset RNG and RBG */
72 	val = ioread32(rng_base + RBG_SOFT_RESET_OFFSET);
73 	val |= RBG_SOFT_RESET;
74 	iowrite32(val, rng_base + RBG_SOFT_RESET_OFFSET);
75 
76 	val = ioread32(rng_base + RNG_SOFT_RESET_OFFSET);
77 	val |= RNG_SOFT_RESET;
78 	iowrite32(val, rng_base + RNG_SOFT_RESET_OFFSET);
79 
80 	val = ioread32(rng_base + RNG_SOFT_RESET_OFFSET);
81 	val &= ~RNG_SOFT_RESET;
82 	iowrite32(val, rng_base + RNG_SOFT_RESET_OFFSET);
83 
84 	val = ioread32(rng_base + RBG_SOFT_RESET_OFFSET);
85 	val &= ~RBG_SOFT_RESET;
86 	iowrite32(val, rng_base + RBG_SOFT_RESET_OFFSET);
87 
88 	iproc_rng200_enable_set(rng_base, true);
89 }
90 
91 static int iproc_rng200_read(struct hwrng *rng, void *buf, size_t max,
92 			     bool wait)
93 {
94 	struct iproc_rng200_dev *priv = to_rng_priv(rng);
95 	uint32_t num_remaining = max;
96 	uint32_t status;
97 
98 	#define MAX_RESETS_PER_READ	1
99 	uint32_t num_resets = 0;
100 
101 	#define MAX_IDLE_TIME	(1 * HZ)
102 	unsigned long idle_endtime = jiffies + MAX_IDLE_TIME;
103 
104 	while ((num_remaining > 0) && time_before(jiffies, idle_endtime)) {
105 
106 		/* Is RNG sane? If not, reset it. */
107 		status = ioread32(priv->base + RNG_INT_STATUS_OFFSET);
108 		if ((status & (RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK |
109 			RNG_INT_STATUS_NIST_FAIL_IRQ_MASK)) != 0) {
110 
111 			if (num_resets >= MAX_RESETS_PER_READ)
112 				return max - num_remaining;
113 
114 			iproc_rng200_restart(priv->base);
115 			num_resets++;
116 		}
117 
118 		/* Are there any random numbers available? */
119 		if ((ioread32(priv->base + RNG_FIFO_COUNT_OFFSET) &
120 				RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK) > 0) {
121 
122 			if (num_remaining >= sizeof(uint32_t)) {
123 				/* Buffer has room to store entire word */
124 				*(uint32_t *)buf = ioread32(priv->base +
125 							RNG_FIFO_DATA_OFFSET);
126 				buf += sizeof(uint32_t);
127 				num_remaining -= sizeof(uint32_t);
128 			} else {
129 				/* Buffer can only store partial word */
130 				uint32_t rnd_number = ioread32(priv->base +
131 							RNG_FIFO_DATA_OFFSET);
132 				memcpy(buf, &rnd_number, num_remaining);
133 				buf += num_remaining;
134 				num_remaining = 0;
135 			}
136 
137 			/* Reset the IDLE timeout */
138 			idle_endtime = jiffies + MAX_IDLE_TIME;
139 		} else {
140 			if (!wait)
141 				/* Cannot wait, return immediately */
142 				return max - num_remaining;
143 
144 			/* Can wait, give others chance to run */
145 			usleep_range(min(num_remaining * 10, 500U), 500);
146 		}
147 	}
148 
149 	return max - num_remaining;
150 }
151 
152 static int iproc_rng200_init(struct hwrng *rng)
153 {
154 	struct iproc_rng200_dev *priv = to_rng_priv(rng);
155 
156 	iproc_rng200_enable_set(priv->base, true);
157 
158 	return 0;
159 }
160 
161 static void iproc_rng200_cleanup(struct hwrng *rng)
162 {
163 	struct iproc_rng200_dev *priv = to_rng_priv(rng);
164 
165 	iproc_rng200_enable_set(priv->base, false);
166 }
167 
168 static int iproc_rng200_probe(struct platform_device *pdev)
169 {
170 	struct iproc_rng200_dev *priv;
171 	struct device *dev = &pdev->dev;
172 	int ret;
173 
174 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
175 	if (!priv)
176 		return -ENOMEM;
177 
178 	/* Map peripheral */
179 	priv->base = devm_platform_ioremap_resource(pdev, 0);
180 	if (IS_ERR(priv->base)) {
181 		dev_err(dev, "failed to remap rng regs\n");
182 		return PTR_ERR(priv->base);
183 	}
184 
185 	priv->rng.name = "iproc-rng200";
186 	priv->rng.read = iproc_rng200_read;
187 	priv->rng.init = iproc_rng200_init;
188 	priv->rng.cleanup = iproc_rng200_cleanup;
189 
190 	/* Register driver */
191 	ret = devm_hwrng_register(dev, &priv->rng);
192 	if (ret) {
193 		dev_err(dev, "hwrng registration failed\n");
194 		return ret;
195 	}
196 
197 	dev_info(dev, "hwrng registered\n");
198 
199 	return 0;
200 }
201 
202 static const struct of_device_id iproc_rng200_of_match[] = {
203 	{ .compatible = "brcm,bcm2711-rng200", },
204 	{ .compatible = "brcm,bcm7211-rng200", },
205 	{ .compatible = "brcm,bcm7278-rng200", },
206 	{ .compatible = "brcm,iproc-rng200", },
207 	{},
208 };
209 MODULE_DEVICE_TABLE(of, iproc_rng200_of_match);
210 
211 static struct platform_driver iproc_rng200_driver = {
212 	.driver = {
213 		.name		= "iproc-rng200",
214 		.of_match_table = iproc_rng200_of_match,
215 	},
216 	.probe		= iproc_rng200_probe,
217 };
218 module_platform_driver(iproc_rng200_driver);
219 
220 MODULE_AUTHOR("Broadcom");
221 MODULE_DESCRIPTION("iProc RNG200 Random Number Generator driver");
222 MODULE_LICENSE("GPL v2");
223