1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Intel & MS High Precision Event Timer Implementation. 4 * 5 * Copyright (C) 2003 Intel Corporation 6 * Venki Pallipadi 7 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P. 8 * Bob Picco <robert.picco@hp.com> 9 */ 10 11 #include <linux/interrupt.h> 12 #include <linux/kernel.h> 13 #include <linux/types.h> 14 #include <linux/miscdevice.h> 15 #include <linux/major.h> 16 #include <linux/ioport.h> 17 #include <linux/fcntl.h> 18 #include <linux/init.h> 19 #include <linux/io-64-nonatomic-lo-hi.h> 20 #include <linux/poll.h> 21 #include <linux/mm.h> 22 #include <linux/proc_fs.h> 23 #include <linux/spinlock.h> 24 #include <linux/sysctl.h> 25 #include <linux/wait.h> 26 #include <linux/sched/signal.h> 27 #include <linux/bcd.h> 28 #include <linux/seq_file.h> 29 #include <linux/bitops.h> 30 #include <linux/compat.h> 31 #include <linux/clocksource.h> 32 #include <linux/uaccess.h> 33 #include <linux/slab.h> 34 #include <linux/io.h> 35 #include <linux/acpi.h> 36 #include <linux/hpet.h> 37 #include <asm/current.h> 38 #include <asm/irq.h> 39 #include <asm/div64.h> 40 41 /* 42 * The High Precision Event Timer driver. 43 * This driver is closely modelled after the rtc.c driver. 44 * See HPET spec revision 1. 45 */ 46 #define HPET_USER_FREQ (64) 47 #define HPET_DRIFT (500) 48 49 #define HPET_RANGE_SIZE 1024 /* from HPET spec */ 50 51 52 /* WARNING -- don't get confused. These macros are never used 53 * to write the (single) counter, and rarely to read it. 54 * They're badly named; to fix, someday. 55 */ 56 #if BITS_PER_LONG == 64 57 #define write_counter(V, MC) writeq(V, MC) 58 #define read_counter(MC) readq(MC) 59 #else 60 #define write_counter(V, MC) writel(V, MC) 61 #define read_counter(MC) readl(MC) 62 #endif 63 64 static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */ 65 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ; 66 67 /* A lock for concurrent access by app and isr hpet activity. */ 68 static DEFINE_SPINLOCK(hpet_lock); 69 70 #define HPET_DEV_NAME (7) 71 72 struct hpet_dev { 73 struct hpets *hd_hpets; 74 struct hpet __iomem *hd_hpet; 75 struct hpet_timer __iomem *hd_timer; 76 unsigned long hd_ireqfreq; 77 unsigned long hd_irqdata; 78 wait_queue_head_t hd_waitqueue; 79 struct fasync_struct *hd_async_queue; 80 unsigned int hd_flags; 81 unsigned int hd_irq; 82 unsigned int hd_hdwirq; 83 char hd_name[HPET_DEV_NAME]; 84 }; 85 86 struct hpets { 87 struct hpets *hp_next; 88 struct hpet __iomem *hp_hpet; 89 unsigned long hp_hpet_phys; 90 unsigned long long hp_tick_freq; 91 unsigned long hp_delta; 92 unsigned int hp_ntimer; 93 unsigned int hp_which; 94 struct hpet_dev hp_dev[] __counted_by(hp_ntimer); 95 }; 96 97 static struct hpets *hpets; 98 99 #define HPET_OPEN 0x0001 100 #define HPET_IE 0x0002 /* interrupt enabled */ 101 #define HPET_PERIODIC 0x0004 102 #define HPET_SHARED_IRQ 0x0008 103 104 static irqreturn_t hpet_interrupt(int irq, void *data) 105 { 106 struct hpet_dev *devp; 107 unsigned long isr; 108 109 devp = data; 110 isr = 1 << (devp - devp->hd_hpets->hp_dev); 111 112 if ((devp->hd_flags & HPET_SHARED_IRQ) && 113 !(isr & readl(&devp->hd_hpet->hpet_isr))) 114 return IRQ_NONE; 115 116 spin_lock(&hpet_lock); 117 devp->hd_irqdata++; 118 119 /* 120 * For non-periodic timers, increment the accumulator. 121 * This has the effect of treating non-periodic like periodic. 122 */ 123 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) { 124 unsigned long t, mc, base, k; 125 struct hpet __iomem *hpet = devp->hd_hpet; 126 struct hpets *hpetp = devp->hd_hpets; 127 128 t = devp->hd_ireqfreq; 129 read_counter(&devp->hd_timer->hpet_compare); 130 mc = read_counter(&hpet->hpet_mc); 131 /* The time for the next interrupt would logically be t + m, 132 * however, if we are very unlucky and the interrupt is delayed 133 * for longer than t then we will completely miss the next 134 * interrupt if we set t + m and an application will hang. 135 * Therefore we need to make a more complex computation assuming 136 * that there exists a k for which the following is true: 137 * k * t + base < mc + delta 138 * (k + 1) * t + base > mc + delta 139 * where t is the interval in hpet ticks for the given freq, 140 * base is the theoretical start value 0 < base < t, 141 * mc is the main counter value at the time of the interrupt, 142 * delta is the time it takes to write the a value to the 143 * comparator. 144 * k may then be computed as (mc - base + delta) / t . 145 */ 146 base = mc % t; 147 k = (mc - base + hpetp->hp_delta) / t; 148 write_counter(t * (k + 1) + base, 149 &devp->hd_timer->hpet_compare); 150 } 151 152 if (devp->hd_flags & HPET_SHARED_IRQ) 153 writel(isr, &devp->hd_hpet->hpet_isr); 154 spin_unlock(&hpet_lock); 155 156 wake_up_interruptible(&devp->hd_waitqueue); 157 158 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN); 159 160 return IRQ_HANDLED; 161 } 162 163 static void hpet_timer_set_irq(struct hpet_dev *devp) 164 { 165 unsigned long v; 166 int irq, gsi; 167 struct hpet_timer __iomem *timer; 168 169 spin_lock_irq(&hpet_lock); 170 if (devp->hd_hdwirq) { 171 spin_unlock_irq(&hpet_lock); 172 return; 173 } 174 175 timer = devp->hd_timer; 176 177 /* we prefer level triggered mode */ 178 v = readl(&timer->hpet_config); 179 if (!(v & Tn_INT_TYPE_CNF_MASK)) { 180 v |= Tn_INT_TYPE_CNF_MASK; 181 writel(v, &timer->hpet_config); 182 } 183 spin_unlock_irq(&hpet_lock); 184 185 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> 186 Tn_INT_ROUTE_CAP_SHIFT; 187 188 /* 189 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by 190 * legacy device. In IO APIC mode, we skip all the legacy IRQS. 191 */ 192 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) 193 v &= ~0xf3df; 194 else 195 v &= ~0xffff; 196 197 for_each_set_bit(irq, &v, HPET_MAX_IRQ) { 198 if (irq >= nr_irqs) { 199 irq = HPET_MAX_IRQ; 200 break; 201 } 202 203 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE, 204 ACPI_ACTIVE_LOW); 205 if (gsi > 0) 206 break; 207 208 /* FIXME: Setup interrupt source table */ 209 } 210 211 if (irq < HPET_MAX_IRQ) { 212 spin_lock_irq(&hpet_lock); 213 v = readl(&timer->hpet_config); 214 v |= irq << Tn_INT_ROUTE_CNF_SHIFT; 215 writel(v, &timer->hpet_config); 216 devp->hd_hdwirq = gsi; 217 spin_unlock_irq(&hpet_lock); 218 } 219 return; 220 } 221 222 static int hpet_open(struct inode *inode, struct file *file) 223 { 224 struct hpet_dev *devp; 225 struct hpets *hpetp; 226 int i; 227 228 if (file->f_mode & FMODE_WRITE) 229 return -EINVAL; 230 231 mutex_lock(&hpet_mutex); 232 spin_lock_irq(&hpet_lock); 233 234 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next) 235 for (i = 0; i < hpetp->hp_ntimer; i++) 236 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) { 237 continue; 238 } else { 239 devp = &hpetp->hp_dev[i]; 240 break; 241 } 242 243 if (!devp) { 244 spin_unlock_irq(&hpet_lock); 245 mutex_unlock(&hpet_mutex); 246 return -EBUSY; 247 } 248 249 file->private_data = devp; 250 devp->hd_irqdata = 0; 251 devp->hd_flags |= HPET_OPEN; 252 spin_unlock_irq(&hpet_lock); 253 mutex_unlock(&hpet_mutex); 254 255 hpet_timer_set_irq(devp); 256 257 return 0; 258 } 259 260 static ssize_t 261 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) 262 { 263 DECLARE_WAITQUEUE(wait, current); 264 unsigned long data; 265 ssize_t retval; 266 struct hpet_dev *devp; 267 268 devp = file->private_data; 269 if (!devp->hd_ireqfreq) 270 return -EIO; 271 272 if (in_compat_syscall()) { 273 if (count < sizeof(compat_ulong_t)) 274 return -EINVAL; 275 } else { 276 if (count < sizeof(unsigned long)) 277 return -EINVAL; 278 } 279 280 add_wait_queue(&devp->hd_waitqueue, &wait); 281 282 for ( ; ; ) { 283 set_current_state(TASK_INTERRUPTIBLE); 284 285 spin_lock_irq(&hpet_lock); 286 data = devp->hd_irqdata; 287 devp->hd_irqdata = 0; 288 spin_unlock_irq(&hpet_lock); 289 290 if (data) { 291 break; 292 } else if (file->f_flags & O_NONBLOCK) { 293 retval = -EAGAIN; 294 goto out; 295 } else if (signal_pending(current)) { 296 retval = -ERESTARTSYS; 297 goto out; 298 } 299 schedule(); 300 } 301 302 if (in_compat_syscall()) { 303 retval = put_user(data, (compat_ulong_t __user *)buf); 304 if (!retval) 305 retval = sizeof(compat_ulong_t); 306 } else { 307 retval = put_user(data, (unsigned long __user *)buf); 308 if (!retval) 309 retval = sizeof(unsigned long); 310 } 311 312 out: 313 __set_current_state(TASK_RUNNING); 314 remove_wait_queue(&devp->hd_waitqueue, &wait); 315 316 return retval; 317 } 318 319 static __poll_t hpet_poll(struct file *file, poll_table * wait) 320 { 321 unsigned long v; 322 struct hpet_dev *devp; 323 324 devp = file->private_data; 325 326 if (!devp->hd_ireqfreq) 327 return 0; 328 329 poll_wait(file, &devp->hd_waitqueue, wait); 330 331 spin_lock_irq(&hpet_lock); 332 v = devp->hd_irqdata; 333 spin_unlock_irq(&hpet_lock); 334 335 if (v != 0) 336 return EPOLLIN | EPOLLRDNORM; 337 338 return 0; 339 } 340 341 #ifdef CONFIG_HPET_MMAP 342 #ifdef CONFIG_HPET_MMAP_DEFAULT 343 static int hpet_mmap_enabled = 1; 344 #else 345 static int hpet_mmap_enabled = 0; 346 #endif 347 348 static __init int hpet_mmap_enable(char *str) 349 { 350 get_option(&str, &hpet_mmap_enabled); 351 pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled"); 352 return 1; 353 } 354 __setup("hpet_mmap=", hpet_mmap_enable); 355 356 static int hpet_mmap(struct file *file, struct vm_area_struct *vma) 357 { 358 struct hpet_dev *devp; 359 unsigned long addr; 360 361 if (!hpet_mmap_enabled) 362 return -EACCES; 363 364 devp = file->private_data; 365 addr = devp->hd_hpets->hp_hpet_phys; 366 367 if (addr & (PAGE_SIZE - 1)) 368 return -ENOSYS; 369 370 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 371 return vm_iomap_memory(vma, addr, PAGE_SIZE); 372 } 373 #else 374 static int hpet_mmap(struct file *file, struct vm_area_struct *vma) 375 { 376 return -ENOSYS; 377 } 378 #endif 379 380 static int hpet_fasync(int fd, struct file *file, int on) 381 { 382 struct hpet_dev *devp; 383 384 devp = file->private_data; 385 386 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0) 387 return 0; 388 else 389 return -EIO; 390 } 391 392 static int hpet_release(struct inode *inode, struct file *file) 393 { 394 struct hpet_dev *devp; 395 struct hpet_timer __iomem *timer; 396 int irq = 0; 397 398 devp = file->private_data; 399 timer = devp->hd_timer; 400 401 spin_lock_irq(&hpet_lock); 402 403 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), 404 &timer->hpet_config); 405 406 irq = devp->hd_irq; 407 devp->hd_irq = 0; 408 409 devp->hd_ireqfreq = 0; 410 411 if (devp->hd_flags & HPET_PERIODIC 412 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { 413 unsigned long v; 414 415 v = readq(&timer->hpet_config); 416 v ^= Tn_TYPE_CNF_MASK; 417 writeq(v, &timer->hpet_config); 418 } 419 420 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC); 421 spin_unlock_irq(&hpet_lock); 422 423 if (irq) 424 free_irq(irq, devp); 425 426 file->private_data = NULL; 427 return 0; 428 } 429 430 static int hpet_ioctl_ieon(struct hpet_dev *devp) 431 { 432 struct hpet_timer __iomem *timer; 433 struct hpet __iomem *hpet; 434 struct hpets *hpetp; 435 int irq; 436 unsigned long g, v, t, m; 437 unsigned long flags, isr; 438 439 timer = devp->hd_timer; 440 hpet = devp->hd_hpet; 441 hpetp = devp->hd_hpets; 442 443 if (!devp->hd_ireqfreq) 444 return -EIO; 445 446 spin_lock_irq(&hpet_lock); 447 448 if (devp->hd_flags & HPET_IE) { 449 spin_unlock_irq(&hpet_lock); 450 return -EBUSY; 451 } 452 453 devp->hd_flags |= HPET_IE; 454 455 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK) 456 devp->hd_flags |= HPET_SHARED_IRQ; 457 spin_unlock_irq(&hpet_lock); 458 459 irq = devp->hd_hdwirq; 460 461 if (irq) { 462 unsigned long irq_flags; 463 464 if (devp->hd_flags & HPET_SHARED_IRQ) { 465 /* 466 * To prevent the interrupt handler from seeing an 467 * unwanted interrupt status bit, program the timer 468 * so that it will not fire in the near future ... 469 */ 470 writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK, 471 &timer->hpet_config); 472 write_counter(read_counter(&hpet->hpet_mc), 473 &timer->hpet_compare); 474 /* ... and clear any left-over status. */ 475 isr = 1 << (devp - devp->hd_hpets->hp_dev); 476 writel(isr, &hpet->hpet_isr); 477 } 478 479 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev)); 480 irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0; 481 if (request_irq(irq, hpet_interrupt, irq_flags, 482 devp->hd_name, (void *)devp)) { 483 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq); 484 irq = 0; 485 } 486 } 487 488 if (irq == 0) { 489 spin_lock_irq(&hpet_lock); 490 devp->hd_flags ^= HPET_IE; 491 spin_unlock_irq(&hpet_lock); 492 return -EIO; 493 } 494 495 devp->hd_irq = irq; 496 t = devp->hd_ireqfreq; 497 v = readq(&timer->hpet_config); 498 499 /* 64-bit comparators are not yet supported through the ioctls, 500 * so force this into 32-bit mode if it supports both modes 501 */ 502 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK; 503 504 if (devp->hd_flags & HPET_PERIODIC) { 505 g |= Tn_TYPE_CNF_MASK; 506 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK; 507 writeq(v, &timer->hpet_config); 508 local_irq_save(flags); 509 510 /* 511 * NOTE: First we modify the hidden accumulator 512 * register supported by periodic-capable comparators. 513 * We never want to modify the (single) counter; that 514 * would affect all the comparators. The value written 515 * is the counter value when the first interrupt is due. 516 */ 517 m = read_counter(&hpet->hpet_mc); 518 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 519 /* 520 * Then we modify the comparator, indicating the period 521 * for subsequent interrupt. 522 */ 523 write_counter(t, &timer->hpet_compare); 524 } else { 525 local_irq_save(flags); 526 m = read_counter(&hpet->hpet_mc); 527 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 528 } 529 530 if (devp->hd_flags & HPET_SHARED_IRQ) { 531 isr = 1 << (devp - devp->hd_hpets->hp_dev); 532 writel(isr, &hpet->hpet_isr); 533 } 534 writeq(g, &timer->hpet_config); 535 local_irq_restore(flags); 536 537 return 0; 538 } 539 540 /* converts Hz to number of timer ticks */ 541 static inline unsigned long hpet_time_div(struct hpets *hpets, 542 unsigned long dis) 543 { 544 unsigned long long m; 545 546 m = hpets->hp_tick_freq + (dis >> 1); 547 return div64_ul(m, dis); 548 } 549 550 static int 551 hpet_ioctl_common(struct hpet_dev *devp, unsigned int cmd, unsigned long arg, 552 struct hpet_info *info) 553 { 554 struct hpet_timer __iomem *timer; 555 struct hpets *hpetp; 556 int err; 557 unsigned long v; 558 559 switch (cmd) { 560 case HPET_IE_OFF: 561 case HPET_INFO: 562 case HPET_EPI: 563 case HPET_DPI: 564 case HPET_IRQFREQ: 565 timer = devp->hd_timer; 566 hpetp = devp->hd_hpets; 567 break; 568 case HPET_IE_ON: 569 return hpet_ioctl_ieon(devp); 570 default: 571 return -EINVAL; 572 } 573 574 err = 0; 575 576 switch (cmd) { 577 case HPET_IE_OFF: 578 if ((devp->hd_flags & HPET_IE) == 0) 579 break; 580 v = readq(&timer->hpet_config); 581 v &= ~Tn_INT_ENB_CNF_MASK; 582 writeq(v, &timer->hpet_config); 583 if (devp->hd_irq) { 584 free_irq(devp->hd_irq, devp); 585 devp->hd_irq = 0; 586 } 587 devp->hd_flags ^= HPET_IE; 588 break; 589 case HPET_INFO: 590 { 591 memset(info, 0, sizeof(*info)); 592 if (devp->hd_ireqfreq) 593 info->hi_ireqfreq = 594 hpet_time_div(hpetp, devp->hd_ireqfreq); 595 info->hi_flags = 596 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; 597 info->hi_hpet = hpetp->hp_which; 598 info->hi_timer = devp - hpetp->hp_dev; 599 break; 600 } 601 case HPET_EPI: 602 v = readq(&timer->hpet_config); 603 if ((v & Tn_PER_INT_CAP_MASK) == 0) { 604 err = -ENXIO; 605 break; 606 } 607 devp->hd_flags |= HPET_PERIODIC; 608 break; 609 case HPET_DPI: 610 v = readq(&timer->hpet_config); 611 if ((v & Tn_PER_INT_CAP_MASK) == 0) { 612 err = -ENXIO; 613 break; 614 } 615 if (devp->hd_flags & HPET_PERIODIC && 616 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { 617 v = readq(&timer->hpet_config); 618 v ^= Tn_TYPE_CNF_MASK; 619 writeq(v, &timer->hpet_config); 620 } 621 devp->hd_flags &= ~HPET_PERIODIC; 622 break; 623 case HPET_IRQFREQ: 624 if ((arg > hpet_max_freq) && 625 !capable(CAP_SYS_RESOURCE)) { 626 err = -EACCES; 627 break; 628 } 629 630 if (!arg) { 631 err = -EINVAL; 632 break; 633 } 634 635 devp->hd_ireqfreq = hpet_time_div(hpetp, arg); 636 } 637 638 return err; 639 } 640 641 static long 642 hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 643 { 644 struct hpet_info info; 645 int err; 646 647 mutex_lock(&hpet_mutex); 648 err = hpet_ioctl_common(file->private_data, cmd, arg, &info); 649 mutex_unlock(&hpet_mutex); 650 651 if ((cmd == HPET_INFO) && !err && 652 (copy_to_user((void __user *)arg, &info, sizeof(info)))) 653 err = -EFAULT; 654 655 return err; 656 } 657 658 #ifdef CONFIG_COMPAT 659 struct compat_hpet_info { 660 compat_ulong_t hi_ireqfreq; /* Hz */ 661 compat_ulong_t hi_flags; /* information */ 662 unsigned short hi_hpet; 663 unsigned short hi_timer; 664 }; 665 666 /* 32-bit types would lead to different command codes which should be 667 * translated into 64-bit ones before passed to hpet_ioctl_common 668 */ 669 #define COMPAT_HPET_INFO _IOR('h', 0x03, struct compat_hpet_info) 670 #define COMPAT_HPET_IRQFREQ _IOW('h', 0x6, compat_ulong_t) 671 672 static long 673 hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 674 { 675 struct hpet_info info; 676 int err; 677 678 if (cmd == COMPAT_HPET_INFO) 679 cmd = HPET_INFO; 680 681 if (cmd == COMPAT_HPET_IRQFREQ) 682 cmd = HPET_IRQFREQ; 683 684 mutex_lock(&hpet_mutex); 685 err = hpet_ioctl_common(file->private_data, cmd, arg, &info); 686 mutex_unlock(&hpet_mutex); 687 688 if ((cmd == HPET_INFO) && !err) { 689 struct compat_hpet_info __user *u = compat_ptr(arg); 690 if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) || 691 put_user(info.hi_flags, &u->hi_flags) || 692 put_user(info.hi_hpet, &u->hi_hpet) || 693 put_user(info.hi_timer, &u->hi_timer)) 694 err = -EFAULT; 695 } 696 697 return err; 698 } 699 #endif 700 701 static const struct file_operations hpet_fops = { 702 .owner = THIS_MODULE, 703 .read = hpet_read, 704 .poll = hpet_poll, 705 .unlocked_ioctl = hpet_ioctl, 706 #ifdef CONFIG_COMPAT 707 .compat_ioctl = hpet_compat_ioctl, 708 #endif 709 .open = hpet_open, 710 .release = hpet_release, 711 .fasync = hpet_fasync, 712 .mmap = hpet_mmap, 713 }; 714 715 static int hpet_is_known(struct hpet_data *hdp) 716 { 717 struct hpets *hpetp; 718 719 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next) 720 if (hpetp->hp_hpet_phys == hdp->hd_phys_address) 721 return 1; 722 723 return 0; 724 } 725 726 static struct ctl_table hpet_table[] = { 727 { 728 .procname = "max-user-freq", 729 .data = &hpet_max_freq, 730 .maxlen = sizeof(int), 731 .mode = 0644, 732 .proc_handler = proc_dointvec, 733 }, 734 }; 735 736 static struct ctl_table_header *sysctl_header; 737 738 /* 739 * Adjustment for when arming the timer with 740 * initial conditions. That is, main counter 741 * ticks expired before interrupts are enabled. 742 */ 743 #define TICK_CALIBRATE (1000UL) 744 745 static unsigned long __hpet_calibrate(struct hpets *hpetp) 746 { 747 struct hpet_timer __iomem *timer = NULL; 748 unsigned long t, m, count, i, flags, start; 749 struct hpet_dev *devp; 750 int j; 751 struct hpet __iomem *hpet; 752 753 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++) 754 if ((devp->hd_flags & HPET_OPEN) == 0) { 755 timer = devp->hd_timer; 756 break; 757 } 758 759 if (!timer) 760 return 0; 761 762 hpet = hpetp->hp_hpet; 763 t = read_counter(&timer->hpet_compare); 764 765 i = 0; 766 count = hpet_time_div(hpetp, TICK_CALIBRATE); 767 768 local_irq_save(flags); 769 770 start = read_counter(&hpet->hpet_mc); 771 772 do { 773 m = read_counter(&hpet->hpet_mc); 774 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 775 } while (i++, (m - start) < count); 776 777 local_irq_restore(flags); 778 779 return (m - start) / i; 780 } 781 782 static unsigned long hpet_calibrate(struct hpets *hpetp) 783 { 784 unsigned long ret = ~0UL; 785 unsigned long tmp; 786 787 /* 788 * Try to calibrate until return value becomes stable small value. 789 * If SMI interruption occurs in calibration loop, the return value 790 * will be big. This avoids its impact. 791 */ 792 for ( ; ; ) { 793 tmp = __hpet_calibrate(hpetp); 794 if (ret <= tmp) 795 break; 796 ret = tmp; 797 } 798 799 return ret; 800 } 801 802 int hpet_alloc(struct hpet_data *hdp) 803 { 804 u64 cap, mcfg; 805 struct hpet_dev *devp; 806 u32 i, ntimer; 807 struct hpets *hpetp; 808 struct hpet __iomem *hpet; 809 static struct hpets *last; 810 u32 period; 811 unsigned long long temp; 812 u32 remainder; 813 814 /* 815 * hpet_alloc can be called by platform dependent code. 816 * If platform dependent code has allocated the hpet that 817 * ACPI has also reported, then we catch it here. 818 */ 819 if (hpet_is_known(hdp)) { 820 printk(KERN_DEBUG "%s: duplicate HPET ignored\n", 821 __func__); 822 return 0; 823 } 824 825 hpetp = kzalloc(struct_size(hpetp, hp_dev, hdp->hd_nirqs), 826 GFP_KERNEL); 827 828 if (!hpetp) 829 return -ENOMEM; 830 831 hpetp->hp_which = hpet_nhpet++; 832 hpetp->hp_hpet = hdp->hd_address; 833 hpetp->hp_hpet_phys = hdp->hd_phys_address; 834 835 hpetp->hp_ntimer = hdp->hd_nirqs; 836 837 for (i = 0; i < hdp->hd_nirqs; i++) 838 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i]; 839 840 hpet = hpetp->hp_hpet; 841 842 cap = readq(&hpet->hpet_cap); 843 844 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1; 845 846 if (hpetp->hp_ntimer != ntimer) { 847 printk(KERN_WARNING "hpet: number irqs doesn't agree" 848 " with number of timers\n"); 849 kfree(hpetp); 850 return -ENODEV; 851 } 852 853 if (last) 854 last->hp_next = hpetp; 855 else 856 hpets = hpetp; 857 858 last = hpetp; 859 860 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >> 861 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */ 862 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */ 863 temp += period >> 1; /* round */ 864 do_div(temp, period); 865 hpetp->hp_tick_freq = temp; /* ticks per second */ 866 867 printk(KERN_INFO "hpet%u: at MMIO 0x%lx, IRQ%s", 868 hpetp->hp_which, hdp->hd_phys_address, 869 hpetp->hp_ntimer > 1 ? "s" : ""); 870 for (i = 0; i < hpetp->hp_ntimer; i++) 871 printk(KERN_CONT "%s %u", i > 0 ? "," : "", hdp->hd_irq[i]); 872 printk(KERN_CONT "\n"); 873 874 temp = hpetp->hp_tick_freq; 875 remainder = do_div(temp, 1000000); 876 printk(KERN_INFO 877 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n", 878 hpetp->hp_which, hpetp->hp_ntimer, 879 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, 880 (unsigned) temp, remainder); 881 882 mcfg = readq(&hpet->hpet_config); 883 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) { 884 write_counter(0L, &hpet->hpet_mc); 885 mcfg |= HPET_ENABLE_CNF_MASK; 886 writeq(mcfg, &hpet->hpet_config); 887 } 888 889 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) { 890 struct hpet_timer __iomem *timer; 891 892 timer = &hpet->hpet_timers[devp - hpetp->hp_dev]; 893 894 devp->hd_hpets = hpetp; 895 devp->hd_hpet = hpet; 896 devp->hd_timer = timer; 897 898 /* 899 * If the timer was reserved by platform code, 900 * then make timer unavailable for opens. 901 */ 902 if (hdp->hd_state & (1 << i)) { 903 devp->hd_flags = HPET_OPEN; 904 continue; 905 } 906 907 init_waitqueue_head(&devp->hd_waitqueue); 908 } 909 910 hpetp->hp_delta = hpet_calibrate(hpetp); 911 912 return 0; 913 } 914 915 static acpi_status hpet_resources(struct acpi_resource *res, void *data) 916 { 917 struct hpet_data *hdp; 918 acpi_status status; 919 struct acpi_resource_address64 addr; 920 921 hdp = data; 922 923 status = acpi_resource_to_address64(res, &addr); 924 925 if (ACPI_SUCCESS(status)) { 926 hdp->hd_phys_address = addr.address.minimum; 927 hdp->hd_address = ioremap(addr.address.minimum, addr.address.address_length); 928 if (!hdp->hd_address) 929 return AE_ERROR; 930 931 if (hpet_is_known(hdp)) { 932 iounmap(hdp->hd_address); 933 return AE_ALREADY_EXISTS; 934 } 935 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) { 936 struct acpi_resource_fixed_memory32 *fixmem32; 937 938 fixmem32 = &res->data.fixed_memory32; 939 940 hdp->hd_phys_address = fixmem32->address; 941 hdp->hd_address = ioremap(fixmem32->address, 942 HPET_RANGE_SIZE); 943 if (!hdp->hd_address) 944 return AE_ERROR; 945 946 if (hpet_is_known(hdp)) { 947 iounmap(hdp->hd_address); 948 return AE_ALREADY_EXISTS; 949 } 950 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) { 951 struct acpi_resource_extended_irq *irqp; 952 int i, irq; 953 954 irqp = &res->data.extended_irq; 955 956 for (i = 0; i < irqp->interrupt_count; i++) { 957 if (hdp->hd_nirqs >= HPET_MAX_TIMERS) 958 break; 959 960 irq = acpi_register_gsi(NULL, irqp->interrupts[i], 961 irqp->triggering, 962 irqp->polarity); 963 if (irq < 0) 964 return AE_ERROR; 965 966 hdp->hd_irq[hdp->hd_nirqs] = irq; 967 hdp->hd_nirqs++; 968 } 969 } 970 971 return AE_OK; 972 } 973 974 static int hpet_acpi_add(struct acpi_device *device) 975 { 976 acpi_status result; 977 struct hpet_data data; 978 979 memset(&data, 0, sizeof(data)); 980 981 result = 982 acpi_walk_resources(device->handle, METHOD_NAME__CRS, 983 hpet_resources, &data); 984 985 if (ACPI_FAILURE(result)) 986 return -ENODEV; 987 988 if (!data.hd_address || !data.hd_nirqs) { 989 if (data.hd_address) 990 iounmap(data.hd_address); 991 printk("%s: no address or irqs in _CRS\n", __func__); 992 return -ENODEV; 993 } 994 995 return hpet_alloc(&data); 996 } 997 998 static const struct acpi_device_id hpet_device_ids[] = { 999 {"PNP0103", 0}, 1000 {"", 0}, 1001 }; 1002 1003 static struct acpi_driver hpet_acpi_driver = { 1004 .name = "hpet", 1005 .ids = hpet_device_ids, 1006 .ops = { 1007 .add = hpet_acpi_add, 1008 }, 1009 }; 1010 1011 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops }; 1012 1013 static int __init hpet_init(void) 1014 { 1015 int result; 1016 1017 result = misc_register(&hpet_misc); 1018 if (result < 0) 1019 return -ENODEV; 1020 1021 sysctl_header = register_sysctl("dev/hpet", hpet_table); 1022 1023 result = acpi_bus_register_driver(&hpet_acpi_driver); 1024 if (result < 0) { 1025 if (sysctl_header) 1026 unregister_sysctl_table(sysctl_header); 1027 misc_deregister(&hpet_misc); 1028 return result; 1029 } 1030 1031 return 0; 1032 } 1033 device_initcall(hpet_init); 1034 1035 /* 1036 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>"); 1037 MODULE_LICENSE("GPL"); 1038 */ 1039