1 /* 2 * Intel & MS High Precision Event Timer Implementation. 3 * 4 * Copyright (C) 2003 Intel Corporation 5 * Venki Pallipadi 6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P. 7 * Bob Picco <robert.picco@hp.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/interrupt.h> 15 #include <linux/module.h> 16 #include <linux/kernel.h> 17 #include <linux/smp_lock.h> 18 #include <linux/types.h> 19 #include <linux/miscdevice.h> 20 #include <linux/major.h> 21 #include <linux/ioport.h> 22 #include <linux/fcntl.h> 23 #include <linux/init.h> 24 #include <linux/poll.h> 25 #include <linux/mm.h> 26 #include <linux/proc_fs.h> 27 #include <linux/spinlock.h> 28 #include <linux/sysctl.h> 29 #include <linux/wait.h> 30 #include <linux/bcd.h> 31 #include <linux/seq_file.h> 32 #include <linux/bitops.h> 33 #include <linux/clocksource.h> 34 #include <linux/slab.h> 35 36 #include <asm/current.h> 37 #include <asm/uaccess.h> 38 #include <asm/system.h> 39 #include <asm/io.h> 40 #include <asm/irq.h> 41 #include <asm/div64.h> 42 43 #include <linux/acpi.h> 44 #include <acpi/acpi_bus.h> 45 #include <linux/hpet.h> 46 47 /* 48 * The High Precision Event Timer driver. 49 * This driver is closely modelled after the rtc.c driver. 50 * http://www.intel.com/hardwaredesign/hpetspec_1.pdf 51 */ 52 #define HPET_USER_FREQ (64) 53 #define HPET_DRIFT (500) 54 55 #define HPET_RANGE_SIZE 1024 /* from HPET spec */ 56 57 58 /* WARNING -- don't get confused. These macros are never used 59 * to write the (single) counter, and rarely to read it. 60 * They're badly named; to fix, someday. 61 */ 62 #if BITS_PER_LONG == 64 63 #define write_counter(V, MC) writeq(V, MC) 64 #define read_counter(MC) readq(MC) 65 #else 66 #define write_counter(V, MC) writel(V, MC) 67 #define read_counter(MC) readl(MC) 68 #endif 69 70 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ; 71 72 /* This clocksource driver currently only works on ia64 */ 73 #ifdef CONFIG_IA64 74 static void __iomem *hpet_mctr; 75 76 static cycle_t read_hpet(struct clocksource *cs) 77 { 78 return (cycle_t)read_counter((void __iomem *)hpet_mctr); 79 } 80 81 static struct clocksource clocksource_hpet = { 82 .name = "hpet", 83 .rating = 250, 84 .read = read_hpet, 85 .mask = CLOCKSOURCE_MASK(64), 86 .mult = 0, /* to be calculated */ 87 .shift = 10, 88 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 89 }; 90 static struct clocksource *hpet_clocksource; 91 #endif 92 93 /* A lock for concurrent access by app and isr hpet activity. */ 94 static DEFINE_SPINLOCK(hpet_lock); 95 96 #define HPET_DEV_NAME (7) 97 98 struct hpet_dev { 99 struct hpets *hd_hpets; 100 struct hpet __iomem *hd_hpet; 101 struct hpet_timer __iomem *hd_timer; 102 unsigned long hd_ireqfreq; 103 unsigned long hd_irqdata; 104 wait_queue_head_t hd_waitqueue; 105 struct fasync_struct *hd_async_queue; 106 unsigned int hd_flags; 107 unsigned int hd_irq; 108 unsigned int hd_hdwirq; 109 char hd_name[HPET_DEV_NAME]; 110 }; 111 112 struct hpets { 113 struct hpets *hp_next; 114 struct hpet __iomem *hp_hpet; 115 unsigned long hp_hpet_phys; 116 struct clocksource *hp_clocksource; 117 unsigned long long hp_tick_freq; 118 unsigned long hp_delta; 119 unsigned int hp_ntimer; 120 unsigned int hp_which; 121 struct hpet_dev hp_dev[1]; 122 }; 123 124 static struct hpets *hpets; 125 126 #define HPET_OPEN 0x0001 127 #define HPET_IE 0x0002 /* interrupt enabled */ 128 #define HPET_PERIODIC 0x0004 129 #define HPET_SHARED_IRQ 0x0008 130 131 132 #ifndef readq 133 static inline unsigned long long readq(void __iomem *addr) 134 { 135 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL); 136 } 137 #endif 138 139 #ifndef writeq 140 static inline void writeq(unsigned long long v, void __iomem *addr) 141 { 142 writel(v & 0xffffffff, addr); 143 writel(v >> 32, addr + 4); 144 } 145 #endif 146 147 static irqreturn_t hpet_interrupt(int irq, void *data) 148 { 149 struct hpet_dev *devp; 150 unsigned long isr; 151 152 devp = data; 153 isr = 1 << (devp - devp->hd_hpets->hp_dev); 154 155 if ((devp->hd_flags & HPET_SHARED_IRQ) && 156 !(isr & readl(&devp->hd_hpet->hpet_isr))) 157 return IRQ_NONE; 158 159 spin_lock(&hpet_lock); 160 devp->hd_irqdata++; 161 162 /* 163 * For non-periodic timers, increment the accumulator. 164 * This has the effect of treating non-periodic like periodic. 165 */ 166 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) { 167 unsigned long m, t; 168 169 t = devp->hd_ireqfreq; 170 m = read_counter(&devp->hd_timer->hpet_compare); 171 write_counter(t + m, &devp->hd_timer->hpet_compare); 172 } 173 174 if (devp->hd_flags & HPET_SHARED_IRQ) 175 writel(isr, &devp->hd_hpet->hpet_isr); 176 spin_unlock(&hpet_lock); 177 178 wake_up_interruptible(&devp->hd_waitqueue); 179 180 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN); 181 182 return IRQ_HANDLED; 183 } 184 185 static void hpet_timer_set_irq(struct hpet_dev *devp) 186 { 187 unsigned long v; 188 int irq, gsi; 189 struct hpet_timer __iomem *timer; 190 191 spin_lock_irq(&hpet_lock); 192 if (devp->hd_hdwirq) { 193 spin_unlock_irq(&hpet_lock); 194 return; 195 } 196 197 timer = devp->hd_timer; 198 199 /* we prefer level triggered mode */ 200 v = readl(&timer->hpet_config); 201 if (!(v & Tn_INT_TYPE_CNF_MASK)) { 202 v |= Tn_INT_TYPE_CNF_MASK; 203 writel(v, &timer->hpet_config); 204 } 205 spin_unlock_irq(&hpet_lock); 206 207 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> 208 Tn_INT_ROUTE_CAP_SHIFT; 209 210 /* 211 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by 212 * legacy device. In IO APIC mode, we skip all the legacy IRQS. 213 */ 214 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) 215 v &= ~0xf3df; 216 else 217 v &= ~0xffff; 218 219 for_each_set_bit(irq, &v, HPET_MAX_IRQ) { 220 if (irq >= nr_irqs) { 221 irq = HPET_MAX_IRQ; 222 break; 223 } 224 225 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE, 226 ACPI_ACTIVE_LOW); 227 if (gsi > 0) 228 break; 229 230 /* FIXME: Setup interrupt source table */ 231 } 232 233 if (irq < HPET_MAX_IRQ) { 234 spin_lock_irq(&hpet_lock); 235 v = readl(&timer->hpet_config); 236 v |= irq << Tn_INT_ROUTE_CNF_SHIFT; 237 writel(v, &timer->hpet_config); 238 devp->hd_hdwirq = gsi; 239 spin_unlock_irq(&hpet_lock); 240 } 241 return; 242 } 243 244 static int hpet_open(struct inode *inode, struct file *file) 245 { 246 struct hpet_dev *devp; 247 struct hpets *hpetp; 248 int i; 249 250 if (file->f_mode & FMODE_WRITE) 251 return -EINVAL; 252 253 lock_kernel(); 254 spin_lock_irq(&hpet_lock); 255 256 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next) 257 for (i = 0; i < hpetp->hp_ntimer; i++) 258 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) 259 continue; 260 else { 261 devp = &hpetp->hp_dev[i]; 262 break; 263 } 264 265 if (!devp) { 266 spin_unlock_irq(&hpet_lock); 267 unlock_kernel(); 268 return -EBUSY; 269 } 270 271 file->private_data = devp; 272 devp->hd_irqdata = 0; 273 devp->hd_flags |= HPET_OPEN; 274 spin_unlock_irq(&hpet_lock); 275 unlock_kernel(); 276 277 hpet_timer_set_irq(devp); 278 279 return 0; 280 } 281 282 static ssize_t 283 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) 284 { 285 DECLARE_WAITQUEUE(wait, current); 286 unsigned long data; 287 ssize_t retval; 288 struct hpet_dev *devp; 289 290 devp = file->private_data; 291 if (!devp->hd_ireqfreq) 292 return -EIO; 293 294 if (count < sizeof(unsigned long)) 295 return -EINVAL; 296 297 add_wait_queue(&devp->hd_waitqueue, &wait); 298 299 for ( ; ; ) { 300 set_current_state(TASK_INTERRUPTIBLE); 301 302 spin_lock_irq(&hpet_lock); 303 data = devp->hd_irqdata; 304 devp->hd_irqdata = 0; 305 spin_unlock_irq(&hpet_lock); 306 307 if (data) 308 break; 309 else if (file->f_flags & O_NONBLOCK) { 310 retval = -EAGAIN; 311 goto out; 312 } else if (signal_pending(current)) { 313 retval = -ERESTARTSYS; 314 goto out; 315 } 316 schedule(); 317 } 318 319 retval = put_user(data, (unsigned long __user *)buf); 320 if (!retval) 321 retval = sizeof(unsigned long); 322 out: 323 __set_current_state(TASK_RUNNING); 324 remove_wait_queue(&devp->hd_waitqueue, &wait); 325 326 return retval; 327 } 328 329 static unsigned int hpet_poll(struct file *file, poll_table * wait) 330 { 331 unsigned long v; 332 struct hpet_dev *devp; 333 334 devp = file->private_data; 335 336 if (!devp->hd_ireqfreq) 337 return 0; 338 339 poll_wait(file, &devp->hd_waitqueue, wait); 340 341 spin_lock_irq(&hpet_lock); 342 v = devp->hd_irqdata; 343 spin_unlock_irq(&hpet_lock); 344 345 if (v != 0) 346 return POLLIN | POLLRDNORM; 347 348 return 0; 349 } 350 351 static int hpet_mmap(struct file *file, struct vm_area_struct *vma) 352 { 353 #ifdef CONFIG_HPET_MMAP 354 struct hpet_dev *devp; 355 unsigned long addr; 356 357 if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff) 358 return -EINVAL; 359 360 devp = file->private_data; 361 addr = devp->hd_hpets->hp_hpet_phys; 362 363 if (addr & (PAGE_SIZE - 1)) 364 return -ENOSYS; 365 366 vma->vm_flags |= VM_IO; 367 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 368 369 if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT, 370 PAGE_SIZE, vma->vm_page_prot)) { 371 printk(KERN_ERR "%s: io_remap_pfn_range failed\n", 372 __func__); 373 return -EAGAIN; 374 } 375 376 return 0; 377 #else 378 return -ENOSYS; 379 #endif 380 } 381 382 static int hpet_fasync(int fd, struct file *file, int on) 383 { 384 struct hpet_dev *devp; 385 386 devp = file->private_data; 387 388 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0) 389 return 0; 390 else 391 return -EIO; 392 } 393 394 static int hpet_release(struct inode *inode, struct file *file) 395 { 396 struct hpet_dev *devp; 397 struct hpet_timer __iomem *timer; 398 int irq = 0; 399 400 devp = file->private_data; 401 timer = devp->hd_timer; 402 403 spin_lock_irq(&hpet_lock); 404 405 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), 406 &timer->hpet_config); 407 408 irq = devp->hd_irq; 409 devp->hd_irq = 0; 410 411 devp->hd_ireqfreq = 0; 412 413 if (devp->hd_flags & HPET_PERIODIC 414 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { 415 unsigned long v; 416 417 v = readq(&timer->hpet_config); 418 v ^= Tn_TYPE_CNF_MASK; 419 writeq(v, &timer->hpet_config); 420 } 421 422 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC); 423 spin_unlock_irq(&hpet_lock); 424 425 if (irq) 426 free_irq(irq, devp); 427 428 file->private_data = NULL; 429 return 0; 430 } 431 432 static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int); 433 434 static int 435 hpet_ioctl(struct inode *inode, struct file *file, unsigned int cmd, 436 unsigned long arg) 437 { 438 struct hpet_dev *devp; 439 440 devp = file->private_data; 441 return hpet_ioctl_common(devp, cmd, arg, 0); 442 } 443 444 static int hpet_ioctl_ieon(struct hpet_dev *devp) 445 { 446 struct hpet_timer __iomem *timer; 447 struct hpet __iomem *hpet; 448 struct hpets *hpetp; 449 int irq; 450 unsigned long g, v, t, m; 451 unsigned long flags, isr; 452 453 timer = devp->hd_timer; 454 hpet = devp->hd_hpet; 455 hpetp = devp->hd_hpets; 456 457 if (!devp->hd_ireqfreq) 458 return -EIO; 459 460 spin_lock_irq(&hpet_lock); 461 462 if (devp->hd_flags & HPET_IE) { 463 spin_unlock_irq(&hpet_lock); 464 return -EBUSY; 465 } 466 467 devp->hd_flags |= HPET_IE; 468 469 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK) 470 devp->hd_flags |= HPET_SHARED_IRQ; 471 spin_unlock_irq(&hpet_lock); 472 473 irq = devp->hd_hdwirq; 474 475 if (irq) { 476 unsigned long irq_flags; 477 478 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev)); 479 irq_flags = devp->hd_flags & HPET_SHARED_IRQ 480 ? IRQF_SHARED : IRQF_DISABLED; 481 if (request_irq(irq, hpet_interrupt, irq_flags, 482 devp->hd_name, (void *)devp)) { 483 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq); 484 irq = 0; 485 } 486 } 487 488 if (irq == 0) { 489 spin_lock_irq(&hpet_lock); 490 devp->hd_flags ^= HPET_IE; 491 spin_unlock_irq(&hpet_lock); 492 return -EIO; 493 } 494 495 devp->hd_irq = irq; 496 t = devp->hd_ireqfreq; 497 v = readq(&timer->hpet_config); 498 499 /* 64-bit comparators are not yet supported through the ioctls, 500 * so force this into 32-bit mode if it supports both modes 501 */ 502 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK; 503 504 if (devp->hd_flags & HPET_PERIODIC) { 505 g |= Tn_TYPE_CNF_MASK; 506 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK; 507 writeq(v, &timer->hpet_config); 508 local_irq_save(flags); 509 510 /* 511 * NOTE: First we modify the hidden accumulator 512 * register supported by periodic-capable comparators. 513 * We never want to modify the (single) counter; that 514 * would affect all the comparators. The value written 515 * is the counter value when the first interrupt is due. 516 */ 517 m = read_counter(&hpet->hpet_mc); 518 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 519 /* 520 * Then we modify the comparator, indicating the period 521 * for subsequent interrupt. 522 */ 523 write_counter(t, &timer->hpet_compare); 524 } else { 525 local_irq_save(flags); 526 m = read_counter(&hpet->hpet_mc); 527 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 528 } 529 530 if (devp->hd_flags & HPET_SHARED_IRQ) { 531 isr = 1 << (devp - devp->hd_hpets->hp_dev); 532 writel(isr, &hpet->hpet_isr); 533 } 534 writeq(g, &timer->hpet_config); 535 local_irq_restore(flags); 536 537 return 0; 538 } 539 540 /* converts Hz to number of timer ticks */ 541 static inline unsigned long hpet_time_div(struct hpets *hpets, 542 unsigned long dis) 543 { 544 unsigned long long m; 545 546 m = hpets->hp_tick_freq + (dis >> 1); 547 do_div(m, dis); 548 return (unsigned long)m; 549 } 550 551 static int 552 hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel) 553 { 554 struct hpet_timer __iomem *timer; 555 struct hpet __iomem *hpet; 556 struct hpets *hpetp; 557 int err; 558 unsigned long v; 559 560 switch (cmd) { 561 case HPET_IE_OFF: 562 case HPET_INFO: 563 case HPET_EPI: 564 case HPET_DPI: 565 case HPET_IRQFREQ: 566 timer = devp->hd_timer; 567 hpet = devp->hd_hpet; 568 hpetp = devp->hd_hpets; 569 break; 570 case HPET_IE_ON: 571 return hpet_ioctl_ieon(devp); 572 default: 573 return -EINVAL; 574 } 575 576 err = 0; 577 578 switch (cmd) { 579 case HPET_IE_OFF: 580 if ((devp->hd_flags & HPET_IE) == 0) 581 break; 582 v = readq(&timer->hpet_config); 583 v &= ~Tn_INT_ENB_CNF_MASK; 584 writeq(v, &timer->hpet_config); 585 if (devp->hd_irq) { 586 free_irq(devp->hd_irq, devp); 587 devp->hd_irq = 0; 588 } 589 devp->hd_flags ^= HPET_IE; 590 break; 591 case HPET_INFO: 592 { 593 struct hpet_info info; 594 595 if (devp->hd_ireqfreq) 596 info.hi_ireqfreq = 597 hpet_time_div(hpetp, devp->hd_ireqfreq); 598 else 599 info.hi_ireqfreq = 0; 600 info.hi_flags = 601 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; 602 info.hi_hpet = hpetp->hp_which; 603 info.hi_timer = devp - hpetp->hp_dev; 604 if (kernel) 605 memcpy((void *)arg, &info, sizeof(info)); 606 else 607 if (copy_to_user((void __user *)arg, &info, 608 sizeof(info))) 609 err = -EFAULT; 610 break; 611 } 612 case HPET_EPI: 613 v = readq(&timer->hpet_config); 614 if ((v & Tn_PER_INT_CAP_MASK) == 0) { 615 err = -ENXIO; 616 break; 617 } 618 devp->hd_flags |= HPET_PERIODIC; 619 break; 620 case HPET_DPI: 621 v = readq(&timer->hpet_config); 622 if ((v & Tn_PER_INT_CAP_MASK) == 0) { 623 err = -ENXIO; 624 break; 625 } 626 if (devp->hd_flags & HPET_PERIODIC && 627 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { 628 v = readq(&timer->hpet_config); 629 v ^= Tn_TYPE_CNF_MASK; 630 writeq(v, &timer->hpet_config); 631 } 632 devp->hd_flags &= ~HPET_PERIODIC; 633 break; 634 case HPET_IRQFREQ: 635 if (!kernel && (arg > hpet_max_freq) && 636 !capable(CAP_SYS_RESOURCE)) { 637 err = -EACCES; 638 break; 639 } 640 641 if (!arg) { 642 err = -EINVAL; 643 break; 644 } 645 646 devp->hd_ireqfreq = hpet_time_div(hpetp, arg); 647 } 648 649 return err; 650 } 651 652 static const struct file_operations hpet_fops = { 653 .owner = THIS_MODULE, 654 .llseek = no_llseek, 655 .read = hpet_read, 656 .poll = hpet_poll, 657 .ioctl = hpet_ioctl, 658 .open = hpet_open, 659 .release = hpet_release, 660 .fasync = hpet_fasync, 661 .mmap = hpet_mmap, 662 }; 663 664 static int hpet_is_known(struct hpet_data *hdp) 665 { 666 struct hpets *hpetp; 667 668 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next) 669 if (hpetp->hp_hpet_phys == hdp->hd_phys_address) 670 return 1; 671 672 return 0; 673 } 674 675 static ctl_table hpet_table[] = { 676 { 677 .procname = "max-user-freq", 678 .data = &hpet_max_freq, 679 .maxlen = sizeof(int), 680 .mode = 0644, 681 .proc_handler = proc_dointvec, 682 }, 683 {} 684 }; 685 686 static ctl_table hpet_root[] = { 687 { 688 .procname = "hpet", 689 .maxlen = 0, 690 .mode = 0555, 691 .child = hpet_table, 692 }, 693 {} 694 }; 695 696 static ctl_table dev_root[] = { 697 { 698 .procname = "dev", 699 .maxlen = 0, 700 .mode = 0555, 701 .child = hpet_root, 702 }, 703 {} 704 }; 705 706 static struct ctl_table_header *sysctl_header; 707 708 /* 709 * Adjustment for when arming the timer with 710 * initial conditions. That is, main counter 711 * ticks expired before interrupts are enabled. 712 */ 713 #define TICK_CALIBRATE (1000UL) 714 715 static unsigned long __hpet_calibrate(struct hpets *hpetp) 716 { 717 struct hpet_timer __iomem *timer = NULL; 718 unsigned long t, m, count, i, flags, start; 719 struct hpet_dev *devp; 720 int j; 721 struct hpet __iomem *hpet; 722 723 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++) 724 if ((devp->hd_flags & HPET_OPEN) == 0) { 725 timer = devp->hd_timer; 726 break; 727 } 728 729 if (!timer) 730 return 0; 731 732 hpet = hpetp->hp_hpet; 733 t = read_counter(&timer->hpet_compare); 734 735 i = 0; 736 count = hpet_time_div(hpetp, TICK_CALIBRATE); 737 738 local_irq_save(flags); 739 740 start = read_counter(&hpet->hpet_mc); 741 742 do { 743 m = read_counter(&hpet->hpet_mc); 744 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 745 } while (i++, (m - start) < count); 746 747 local_irq_restore(flags); 748 749 return (m - start) / i; 750 } 751 752 static unsigned long hpet_calibrate(struct hpets *hpetp) 753 { 754 unsigned long ret = -1; 755 unsigned long tmp; 756 757 /* 758 * Try to calibrate until return value becomes stable small value. 759 * If SMI interruption occurs in calibration loop, the return value 760 * will be big. This avoids its impact. 761 */ 762 for ( ; ; ) { 763 tmp = __hpet_calibrate(hpetp); 764 if (ret <= tmp) 765 break; 766 ret = tmp; 767 } 768 769 return ret; 770 } 771 772 int hpet_alloc(struct hpet_data *hdp) 773 { 774 u64 cap, mcfg; 775 struct hpet_dev *devp; 776 u32 i, ntimer; 777 struct hpets *hpetp; 778 size_t siz; 779 struct hpet __iomem *hpet; 780 static struct hpets *last = NULL; 781 unsigned long period; 782 unsigned long long temp; 783 u32 remainder; 784 785 /* 786 * hpet_alloc can be called by platform dependent code. 787 * If platform dependent code has allocated the hpet that 788 * ACPI has also reported, then we catch it here. 789 */ 790 if (hpet_is_known(hdp)) { 791 printk(KERN_DEBUG "%s: duplicate HPET ignored\n", 792 __func__); 793 return 0; 794 } 795 796 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) * 797 sizeof(struct hpet_dev)); 798 799 hpetp = kzalloc(siz, GFP_KERNEL); 800 801 if (!hpetp) 802 return -ENOMEM; 803 804 hpetp->hp_which = hpet_nhpet++; 805 hpetp->hp_hpet = hdp->hd_address; 806 hpetp->hp_hpet_phys = hdp->hd_phys_address; 807 808 hpetp->hp_ntimer = hdp->hd_nirqs; 809 810 for (i = 0; i < hdp->hd_nirqs; i++) 811 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i]; 812 813 hpet = hpetp->hp_hpet; 814 815 cap = readq(&hpet->hpet_cap); 816 817 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1; 818 819 if (hpetp->hp_ntimer != ntimer) { 820 printk(KERN_WARNING "hpet: number irqs doesn't agree" 821 " with number of timers\n"); 822 kfree(hpetp); 823 return -ENODEV; 824 } 825 826 if (last) 827 last->hp_next = hpetp; 828 else 829 hpets = hpetp; 830 831 last = hpetp; 832 833 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >> 834 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */ 835 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */ 836 temp += period >> 1; /* round */ 837 do_div(temp, period); 838 hpetp->hp_tick_freq = temp; /* ticks per second */ 839 840 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s", 841 hpetp->hp_which, hdp->hd_phys_address, 842 hpetp->hp_ntimer > 1 ? "s" : ""); 843 for (i = 0; i < hpetp->hp_ntimer; i++) 844 printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]); 845 printk("\n"); 846 847 temp = hpetp->hp_tick_freq; 848 remainder = do_div(temp, 1000000); 849 printk(KERN_INFO 850 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n", 851 hpetp->hp_which, hpetp->hp_ntimer, 852 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, 853 (unsigned) temp, remainder); 854 855 mcfg = readq(&hpet->hpet_config); 856 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) { 857 write_counter(0L, &hpet->hpet_mc); 858 mcfg |= HPET_ENABLE_CNF_MASK; 859 writeq(mcfg, &hpet->hpet_config); 860 } 861 862 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) { 863 struct hpet_timer __iomem *timer; 864 865 timer = &hpet->hpet_timers[devp - hpetp->hp_dev]; 866 867 devp->hd_hpets = hpetp; 868 devp->hd_hpet = hpet; 869 devp->hd_timer = timer; 870 871 /* 872 * If the timer was reserved by platform code, 873 * then make timer unavailable for opens. 874 */ 875 if (hdp->hd_state & (1 << i)) { 876 devp->hd_flags = HPET_OPEN; 877 continue; 878 } 879 880 init_waitqueue_head(&devp->hd_waitqueue); 881 } 882 883 hpetp->hp_delta = hpet_calibrate(hpetp); 884 885 /* This clocksource driver currently only works on ia64 */ 886 #ifdef CONFIG_IA64 887 if (!hpet_clocksource) { 888 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc; 889 CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr); 890 clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq, 891 clocksource_hpet.shift); 892 clocksource_register(&clocksource_hpet); 893 hpetp->hp_clocksource = &clocksource_hpet; 894 hpet_clocksource = &clocksource_hpet; 895 } 896 #endif 897 898 return 0; 899 } 900 901 static acpi_status hpet_resources(struct acpi_resource *res, void *data) 902 { 903 struct hpet_data *hdp; 904 acpi_status status; 905 struct acpi_resource_address64 addr; 906 907 hdp = data; 908 909 status = acpi_resource_to_address64(res, &addr); 910 911 if (ACPI_SUCCESS(status)) { 912 hdp->hd_phys_address = addr.minimum; 913 hdp->hd_address = ioremap(addr.minimum, addr.address_length); 914 915 if (hpet_is_known(hdp)) { 916 iounmap(hdp->hd_address); 917 return AE_ALREADY_EXISTS; 918 } 919 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) { 920 struct acpi_resource_fixed_memory32 *fixmem32; 921 922 fixmem32 = &res->data.fixed_memory32; 923 if (!fixmem32) 924 return AE_NO_MEMORY; 925 926 hdp->hd_phys_address = fixmem32->address; 927 hdp->hd_address = ioremap(fixmem32->address, 928 HPET_RANGE_SIZE); 929 930 if (hpet_is_known(hdp)) { 931 iounmap(hdp->hd_address); 932 return AE_ALREADY_EXISTS; 933 } 934 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) { 935 struct acpi_resource_extended_irq *irqp; 936 int i, irq; 937 938 irqp = &res->data.extended_irq; 939 940 for (i = 0; i < irqp->interrupt_count; i++) { 941 irq = acpi_register_gsi(NULL, irqp->interrupts[i], 942 irqp->triggering, irqp->polarity); 943 if (irq < 0) 944 return AE_ERROR; 945 946 hdp->hd_irq[hdp->hd_nirqs] = irq; 947 hdp->hd_nirqs++; 948 } 949 } 950 951 return AE_OK; 952 } 953 954 static int hpet_acpi_add(struct acpi_device *device) 955 { 956 acpi_status result; 957 struct hpet_data data; 958 959 memset(&data, 0, sizeof(data)); 960 961 result = 962 acpi_walk_resources(device->handle, METHOD_NAME__CRS, 963 hpet_resources, &data); 964 965 if (ACPI_FAILURE(result)) 966 return -ENODEV; 967 968 if (!data.hd_address || !data.hd_nirqs) { 969 printk("%s: no address or irqs in _CRS\n", __func__); 970 return -ENODEV; 971 } 972 973 return hpet_alloc(&data); 974 } 975 976 static int hpet_acpi_remove(struct acpi_device *device, int type) 977 { 978 /* XXX need to unregister clocksource, dealloc mem, etc */ 979 return -EINVAL; 980 } 981 982 static const struct acpi_device_id hpet_device_ids[] = { 983 {"PNP0103", 0}, 984 {"", 0}, 985 }; 986 MODULE_DEVICE_TABLE(acpi, hpet_device_ids); 987 988 static struct acpi_driver hpet_acpi_driver = { 989 .name = "hpet", 990 .ids = hpet_device_ids, 991 .ops = { 992 .add = hpet_acpi_add, 993 .remove = hpet_acpi_remove, 994 }, 995 }; 996 997 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops }; 998 999 static int __init hpet_init(void) 1000 { 1001 int result; 1002 1003 result = misc_register(&hpet_misc); 1004 if (result < 0) 1005 return -ENODEV; 1006 1007 sysctl_header = register_sysctl_table(dev_root); 1008 1009 result = acpi_bus_register_driver(&hpet_acpi_driver); 1010 if (result < 0) { 1011 if (sysctl_header) 1012 unregister_sysctl_table(sysctl_header); 1013 misc_deregister(&hpet_misc); 1014 return result; 1015 } 1016 1017 return 0; 1018 } 1019 1020 static void __exit hpet_exit(void) 1021 { 1022 acpi_bus_unregister_driver(&hpet_acpi_driver); 1023 1024 if (sysctl_header) 1025 unregister_sysctl_table(sysctl_header); 1026 misc_deregister(&hpet_misc); 1027 1028 return; 1029 } 1030 1031 module_init(hpet_init); 1032 module_exit(hpet_exit); 1033 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>"); 1034 MODULE_LICENSE("GPL"); 1035