1 /* 2 * Intel & MS High Precision Event Timer Implementation. 3 * 4 * Copyright (C) 2003 Intel Corporation 5 * Venki Pallipadi 6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P. 7 * Bob Picco <robert.picco@hp.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/interrupt.h> 15 #include <linux/module.h> 16 #include <linux/kernel.h> 17 #include <linux/smp_lock.h> 18 #include <linux/types.h> 19 #include <linux/miscdevice.h> 20 #include <linux/major.h> 21 #include <linux/ioport.h> 22 #include <linux/fcntl.h> 23 #include <linux/init.h> 24 #include <linux/poll.h> 25 #include <linux/mm.h> 26 #include <linux/proc_fs.h> 27 #include <linux/spinlock.h> 28 #include <linux/sysctl.h> 29 #include <linux/wait.h> 30 #include <linux/bcd.h> 31 #include <linux/seq_file.h> 32 #include <linux/bitops.h> 33 #include <linux/clocksource.h> 34 35 #include <asm/current.h> 36 #include <asm/uaccess.h> 37 #include <asm/system.h> 38 #include <asm/io.h> 39 #include <asm/irq.h> 40 #include <asm/div64.h> 41 42 #include <linux/acpi.h> 43 #include <acpi/acpi_bus.h> 44 #include <linux/hpet.h> 45 46 /* 47 * The High Precision Event Timer driver. 48 * This driver is closely modelled after the rtc.c driver. 49 * http://www.intel.com/hardwaredesign/hpetspec.htm 50 */ 51 #define HPET_USER_FREQ (64) 52 #define HPET_DRIFT (500) 53 54 #define HPET_RANGE_SIZE 1024 /* from HPET spec */ 55 56 57 /* WARNING -- don't get confused. These macros are never used 58 * to write the (single) counter, and rarely to read it. 59 * They're badly named; to fix, someday. 60 */ 61 #if BITS_PER_LONG == 64 62 #define write_counter(V, MC) writeq(V, MC) 63 #define read_counter(MC) readq(MC) 64 #else 65 #define write_counter(V, MC) writel(V, MC) 66 #define read_counter(MC) readl(MC) 67 #endif 68 69 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ; 70 71 /* This clocksource driver currently only works on ia64 */ 72 #ifdef CONFIG_IA64 73 static void __iomem *hpet_mctr; 74 75 static cycle_t read_hpet(void) 76 { 77 return (cycle_t)read_counter((void __iomem *)hpet_mctr); 78 } 79 80 static struct clocksource clocksource_hpet = { 81 .name = "hpet", 82 .rating = 250, 83 .read = read_hpet, 84 .mask = CLOCKSOURCE_MASK(64), 85 .mult = 0, /* to be calculated */ 86 .shift = 10, 87 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 88 }; 89 static struct clocksource *hpet_clocksource; 90 #endif 91 92 /* A lock for concurrent access by app and isr hpet activity. */ 93 static DEFINE_SPINLOCK(hpet_lock); 94 95 #define HPET_DEV_NAME (7) 96 97 struct hpet_dev { 98 struct hpets *hd_hpets; 99 struct hpet __iomem *hd_hpet; 100 struct hpet_timer __iomem *hd_timer; 101 unsigned long hd_ireqfreq; 102 unsigned long hd_irqdata; 103 wait_queue_head_t hd_waitqueue; 104 struct fasync_struct *hd_async_queue; 105 unsigned int hd_flags; 106 unsigned int hd_irq; 107 unsigned int hd_hdwirq; 108 char hd_name[HPET_DEV_NAME]; 109 }; 110 111 struct hpets { 112 struct hpets *hp_next; 113 struct hpet __iomem *hp_hpet; 114 unsigned long hp_hpet_phys; 115 struct clocksource *hp_clocksource; 116 unsigned long long hp_tick_freq; 117 unsigned long hp_delta; 118 unsigned int hp_ntimer; 119 unsigned int hp_which; 120 struct hpet_dev hp_dev[1]; 121 }; 122 123 static struct hpets *hpets; 124 125 #define HPET_OPEN 0x0001 126 #define HPET_IE 0x0002 /* interrupt enabled */ 127 #define HPET_PERIODIC 0x0004 128 #define HPET_SHARED_IRQ 0x0008 129 130 131 #ifndef readq 132 static inline unsigned long long readq(void __iomem *addr) 133 { 134 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL); 135 } 136 #endif 137 138 #ifndef writeq 139 static inline void writeq(unsigned long long v, void __iomem *addr) 140 { 141 writel(v & 0xffffffff, addr); 142 writel(v >> 32, addr + 4); 143 } 144 #endif 145 146 static irqreturn_t hpet_interrupt(int irq, void *data) 147 { 148 struct hpet_dev *devp; 149 unsigned long isr; 150 151 devp = data; 152 isr = 1 << (devp - devp->hd_hpets->hp_dev); 153 154 if ((devp->hd_flags & HPET_SHARED_IRQ) && 155 !(isr & readl(&devp->hd_hpet->hpet_isr))) 156 return IRQ_NONE; 157 158 spin_lock(&hpet_lock); 159 devp->hd_irqdata++; 160 161 /* 162 * For non-periodic timers, increment the accumulator. 163 * This has the effect of treating non-periodic like periodic. 164 */ 165 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) { 166 unsigned long m, t; 167 168 t = devp->hd_ireqfreq; 169 m = read_counter(&devp->hd_hpet->hpet_mc); 170 write_counter(t + m + devp->hd_hpets->hp_delta, 171 &devp->hd_timer->hpet_compare); 172 } 173 174 if (devp->hd_flags & HPET_SHARED_IRQ) 175 writel(isr, &devp->hd_hpet->hpet_isr); 176 spin_unlock(&hpet_lock); 177 178 wake_up_interruptible(&devp->hd_waitqueue); 179 180 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN); 181 182 return IRQ_HANDLED; 183 } 184 185 static void hpet_timer_set_irq(struct hpet_dev *devp) 186 { 187 unsigned long v; 188 int irq, gsi; 189 struct hpet_timer __iomem *timer; 190 191 spin_lock_irq(&hpet_lock); 192 if (devp->hd_hdwirq) { 193 spin_unlock_irq(&hpet_lock); 194 return; 195 } 196 197 timer = devp->hd_timer; 198 199 /* we prefer level triggered mode */ 200 v = readl(&timer->hpet_config); 201 if (!(v & Tn_INT_TYPE_CNF_MASK)) { 202 v |= Tn_INT_TYPE_CNF_MASK; 203 writel(v, &timer->hpet_config); 204 } 205 spin_unlock_irq(&hpet_lock); 206 207 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> 208 Tn_INT_ROUTE_CAP_SHIFT; 209 210 /* 211 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by 212 * legacy device. In IO APIC mode, we skip all the legacy IRQS. 213 */ 214 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) 215 v &= ~0xf3df; 216 else 217 v &= ~0xffff; 218 219 for (irq = find_first_bit(&v, HPET_MAX_IRQ); irq < HPET_MAX_IRQ; 220 irq = find_next_bit(&v, HPET_MAX_IRQ, 1 + irq)) { 221 222 if (irq >= nr_irqs) { 223 irq = HPET_MAX_IRQ; 224 break; 225 } 226 227 gsi = acpi_register_gsi(irq, ACPI_LEVEL_SENSITIVE, 228 ACPI_ACTIVE_LOW); 229 if (gsi > 0) 230 break; 231 232 /* FIXME: Setup interrupt source table */ 233 } 234 235 if (irq < HPET_MAX_IRQ) { 236 spin_lock_irq(&hpet_lock); 237 v = readl(&timer->hpet_config); 238 v |= irq << Tn_INT_ROUTE_CNF_SHIFT; 239 writel(v, &timer->hpet_config); 240 devp->hd_hdwirq = gsi; 241 spin_unlock_irq(&hpet_lock); 242 } 243 return; 244 } 245 246 static int hpet_open(struct inode *inode, struct file *file) 247 { 248 struct hpet_dev *devp; 249 struct hpets *hpetp; 250 int i; 251 252 if (file->f_mode & FMODE_WRITE) 253 return -EINVAL; 254 255 lock_kernel(); 256 spin_lock_irq(&hpet_lock); 257 258 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next) 259 for (i = 0; i < hpetp->hp_ntimer; i++) 260 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) 261 continue; 262 else { 263 devp = &hpetp->hp_dev[i]; 264 break; 265 } 266 267 if (!devp) { 268 spin_unlock_irq(&hpet_lock); 269 unlock_kernel(); 270 return -EBUSY; 271 } 272 273 file->private_data = devp; 274 devp->hd_irqdata = 0; 275 devp->hd_flags |= HPET_OPEN; 276 spin_unlock_irq(&hpet_lock); 277 unlock_kernel(); 278 279 hpet_timer_set_irq(devp); 280 281 return 0; 282 } 283 284 static ssize_t 285 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) 286 { 287 DECLARE_WAITQUEUE(wait, current); 288 unsigned long data; 289 ssize_t retval; 290 struct hpet_dev *devp; 291 292 devp = file->private_data; 293 if (!devp->hd_ireqfreq) 294 return -EIO; 295 296 if (count < sizeof(unsigned long)) 297 return -EINVAL; 298 299 add_wait_queue(&devp->hd_waitqueue, &wait); 300 301 for ( ; ; ) { 302 set_current_state(TASK_INTERRUPTIBLE); 303 304 spin_lock_irq(&hpet_lock); 305 data = devp->hd_irqdata; 306 devp->hd_irqdata = 0; 307 spin_unlock_irq(&hpet_lock); 308 309 if (data) 310 break; 311 else if (file->f_flags & O_NONBLOCK) { 312 retval = -EAGAIN; 313 goto out; 314 } else if (signal_pending(current)) { 315 retval = -ERESTARTSYS; 316 goto out; 317 } 318 schedule(); 319 } 320 321 retval = put_user(data, (unsigned long __user *)buf); 322 if (!retval) 323 retval = sizeof(unsigned long); 324 out: 325 __set_current_state(TASK_RUNNING); 326 remove_wait_queue(&devp->hd_waitqueue, &wait); 327 328 return retval; 329 } 330 331 static unsigned int hpet_poll(struct file *file, poll_table * wait) 332 { 333 unsigned long v; 334 struct hpet_dev *devp; 335 336 devp = file->private_data; 337 338 if (!devp->hd_ireqfreq) 339 return 0; 340 341 poll_wait(file, &devp->hd_waitqueue, wait); 342 343 spin_lock_irq(&hpet_lock); 344 v = devp->hd_irqdata; 345 spin_unlock_irq(&hpet_lock); 346 347 if (v != 0) 348 return POLLIN | POLLRDNORM; 349 350 return 0; 351 } 352 353 static int hpet_mmap(struct file *file, struct vm_area_struct *vma) 354 { 355 #ifdef CONFIG_HPET_MMAP 356 struct hpet_dev *devp; 357 unsigned long addr; 358 359 if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff) 360 return -EINVAL; 361 362 devp = file->private_data; 363 addr = devp->hd_hpets->hp_hpet_phys; 364 365 if (addr & (PAGE_SIZE - 1)) 366 return -ENOSYS; 367 368 vma->vm_flags |= VM_IO; 369 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 370 371 if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT, 372 PAGE_SIZE, vma->vm_page_prot)) { 373 printk(KERN_ERR "%s: io_remap_pfn_range failed\n", 374 __func__); 375 return -EAGAIN; 376 } 377 378 return 0; 379 #else 380 return -ENOSYS; 381 #endif 382 } 383 384 static int hpet_fasync(int fd, struct file *file, int on) 385 { 386 struct hpet_dev *devp; 387 388 devp = file->private_data; 389 390 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0) 391 return 0; 392 else 393 return -EIO; 394 } 395 396 static int hpet_release(struct inode *inode, struct file *file) 397 { 398 struct hpet_dev *devp; 399 struct hpet_timer __iomem *timer; 400 int irq = 0; 401 402 devp = file->private_data; 403 timer = devp->hd_timer; 404 405 spin_lock_irq(&hpet_lock); 406 407 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), 408 &timer->hpet_config); 409 410 irq = devp->hd_irq; 411 devp->hd_irq = 0; 412 413 devp->hd_ireqfreq = 0; 414 415 if (devp->hd_flags & HPET_PERIODIC 416 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { 417 unsigned long v; 418 419 v = readq(&timer->hpet_config); 420 v ^= Tn_TYPE_CNF_MASK; 421 writeq(v, &timer->hpet_config); 422 } 423 424 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC); 425 spin_unlock_irq(&hpet_lock); 426 427 if (irq) 428 free_irq(irq, devp); 429 430 file->private_data = NULL; 431 return 0; 432 } 433 434 static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int); 435 436 static int 437 hpet_ioctl(struct inode *inode, struct file *file, unsigned int cmd, 438 unsigned long arg) 439 { 440 struct hpet_dev *devp; 441 442 devp = file->private_data; 443 return hpet_ioctl_common(devp, cmd, arg, 0); 444 } 445 446 static int hpet_ioctl_ieon(struct hpet_dev *devp) 447 { 448 struct hpet_timer __iomem *timer; 449 struct hpet __iomem *hpet; 450 struct hpets *hpetp; 451 int irq; 452 unsigned long g, v, t, m; 453 unsigned long flags, isr; 454 455 timer = devp->hd_timer; 456 hpet = devp->hd_hpet; 457 hpetp = devp->hd_hpets; 458 459 if (!devp->hd_ireqfreq) 460 return -EIO; 461 462 spin_lock_irq(&hpet_lock); 463 464 if (devp->hd_flags & HPET_IE) { 465 spin_unlock_irq(&hpet_lock); 466 return -EBUSY; 467 } 468 469 devp->hd_flags |= HPET_IE; 470 471 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK) 472 devp->hd_flags |= HPET_SHARED_IRQ; 473 spin_unlock_irq(&hpet_lock); 474 475 irq = devp->hd_hdwirq; 476 477 if (irq) { 478 unsigned long irq_flags; 479 480 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev)); 481 irq_flags = devp->hd_flags & HPET_SHARED_IRQ 482 ? IRQF_SHARED : IRQF_DISABLED; 483 if (request_irq(irq, hpet_interrupt, irq_flags, 484 devp->hd_name, (void *)devp)) { 485 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq); 486 irq = 0; 487 } 488 } 489 490 if (irq == 0) { 491 spin_lock_irq(&hpet_lock); 492 devp->hd_flags ^= HPET_IE; 493 spin_unlock_irq(&hpet_lock); 494 return -EIO; 495 } 496 497 devp->hd_irq = irq; 498 t = devp->hd_ireqfreq; 499 v = readq(&timer->hpet_config); 500 501 /* 64-bit comparators are not yet supported through the ioctls, 502 * so force this into 32-bit mode if it supports both modes 503 */ 504 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK; 505 506 if (devp->hd_flags & HPET_PERIODIC) { 507 write_counter(t, &timer->hpet_compare); 508 g |= Tn_TYPE_CNF_MASK; 509 v |= Tn_TYPE_CNF_MASK; 510 writeq(v, &timer->hpet_config); 511 v |= Tn_VAL_SET_CNF_MASK; 512 writeq(v, &timer->hpet_config); 513 local_irq_save(flags); 514 515 /* NOTE: what we modify here is a hidden accumulator 516 * register supported by periodic-capable comparators. 517 * We never want to modify the (single) counter; that 518 * would affect all the comparators. 519 */ 520 m = read_counter(&hpet->hpet_mc); 521 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 522 } else { 523 local_irq_save(flags); 524 m = read_counter(&hpet->hpet_mc); 525 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 526 } 527 528 if (devp->hd_flags & HPET_SHARED_IRQ) { 529 isr = 1 << (devp - devp->hd_hpets->hp_dev); 530 writel(isr, &hpet->hpet_isr); 531 } 532 writeq(g, &timer->hpet_config); 533 local_irq_restore(flags); 534 535 return 0; 536 } 537 538 /* converts Hz to number of timer ticks */ 539 static inline unsigned long hpet_time_div(struct hpets *hpets, 540 unsigned long dis) 541 { 542 unsigned long long m; 543 544 m = hpets->hp_tick_freq + (dis >> 1); 545 do_div(m, dis); 546 return (unsigned long)m; 547 } 548 549 static int 550 hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel) 551 { 552 struct hpet_timer __iomem *timer; 553 struct hpet __iomem *hpet; 554 struct hpets *hpetp; 555 int err; 556 unsigned long v; 557 558 switch (cmd) { 559 case HPET_IE_OFF: 560 case HPET_INFO: 561 case HPET_EPI: 562 case HPET_DPI: 563 case HPET_IRQFREQ: 564 timer = devp->hd_timer; 565 hpet = devp->hd_hpet; 566 hpetp = devp->hd_hpets; 567 break; 568 case HPET_IE_ON: 569 return hpet_ioctl_ieon(devp); 570 default: 571 return -EINVAL; 572 } 573 574 err = 0; 575 576 switch (cmd) { 577 case HPET_IE_OFF: 578 if ((devp->hd_flags & HPET_IE) == 0) 579 break; 580 v = readq(&timer->hpet_config); 581 v &= ~Tn_INT_ENB_CNF_MASK; 582 writeq(v, &timer->hpet_config); 583 if (devp->hd_irq) { 584 free_irq(devp->hd_irq, devp); 585 devp->hd_irq = 0; 586 } 587 devp->hd_flags ^= HPET_IE; 588 break; 589 case HPET_INFO: 590 { 591 struct hpet_info info; 592 593 if (devp->hd_ireqfreq) 594 info.hi_ireqfreq = 595 hpet_time_div(hpetp, devp->hd_ireqfreq); 596 else 597 info.hi_ireqfreq = 0; 598 info.hi_flags = 599 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; 600 info.hi_hpet = hpetp->hp_which; 601 info.hi_timer = devp - hpetp->hp_dev; 602 if (kernel) 603 memcpy((void *)arg, &info, sizeof(info)); 604 else 605 if (copy_to_user((void __user *)arg, &info, 606 sizeof(info))) 607 err = -EFAULT; 608 break; 609 } 610 case HPET_EPI: 611 v = readq(&timer->hpet_config); 612 if ((v & Tn_PER_INT_CAP_MASK) == 0) { 613 err = -ENXIO; 614 break; 615 } 616 devp->hd_flags |= HPET_PERIODIC; 617 break; 618 case HPET_DPI: 619 v = readq(&timer->hpet_config); 620 if ((v & Tn_PER_INT_CAP_MASK) == 0) { 621 err = -ENXIO; 622 break; 623 } 624 if (devp->hd_flags & HPET_PERIODIC && 625 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { 626 v = readq(&timer->hpet_config); 627 v ^= Tn_TYPE_CNF_MASK; 628 writeq(v, &timer->hpet_config); 629 } 630 devp->hd_flags &= ~HPET_PERIODIC; 631 break; 632 case HPET_IRQFREQ: 633 if (!kernel && (arg > hpet_max_freq) && 634 !capable(CAP_SYS_RESOURCE)) { 635 err = -EACCES; 636 break; 637 } 638 639 if (!arg) { 640 err = -EINVAL; 641 break; 642 } 643 644 devp->hd_ireqfreq = hpet_time_div(hpetp, arg); 645 } 646 647 return err; 648 } 649 650 static const struct file_operations hpet_fops = { 651 .owner = THIS_MODULE, 652 .llseek = no_llseek, 653 .read = hpet_read, 654 .poll = hpet_poll, 655 .ioctl = hpet_ioctl, 656 .open = hpet_open, 657 .release = hpet_release, 658 .fasync = hpet_fasync, 659 .mmap = hpet_mmap, 660 }; 661 662 static int hpet_is_known(struct hpet_data *hdp) 663 { 664 struct hpets *hpetp; 665 666 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next) 667 if (hpetp->hp_hpet_phys == hdp->hd_phys_address) 668 return 1; 669 670 return 0; 671 } 672 673 static ctl_table hpet_table[] = { 674 { 675 .ctl_name = CTL_UNNUMBERED, 676 .procname = "max-user-freq", 677 .data = &hpet_max_freq, 678 .maxlen = sizeof(int), 679 .mode = 0644, 680 .proc_handler = &proc_dointvec, 681 }, 682 {.ctl_name = 0} 683 }; 684 685 static ctl_table hpet_root[] = { 686 { 687 .ctl_name = CTL_UNNUMBERED, 688 .procname = "hpet", 689 .maxlen = 0, 690 .mode = 0555, 691 .child = hpet_table, 692 }, 693 {.ctl_name = 0} 694 }; 695 696 static ctl_table dev_root[] = { 697 { 698 .ctl_name = CTL_DEV, 699 .procname = "dev", 700 .maxlen = 0, 701 .mode = 0555, 702 .child = hpet_root, 703 }, 704 {.ctl_name = 0} 705 }; 706 707 static struct ctl_table_header *sysctl_header; 708 709 /* 710 * Adjustment for when arming the timer with 711 * initial conditions. That is, main counter 712 * ticks expired before interrupts are enabled. 713 */ 714 #define TICK_CALIBRATE (1000UL) 715 716 static unsigned long hpet_calibrate(struct hpets *hpetp) 717 { 718 struct hpet_timer __iomem *timer = NULL; 719 unsigned long t, m, count, i, flags, start; 720 struct hpet_dev *devp; 721 int j; 722 struct hpet __iomem *hpet; 723 724 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++) 725 if ((devp->hd_flags & HPET_OPEN) == 0) { 726 timer = devp->hd_timer; 727 break; 728 } 729 730 if (!timer) 731 return 0; 732 733 hpet = hpetp->hp_hpet; 734 t = read_counter(&timer->hpet_compare); 735 736 i = 0; 737 count = hpet_time_div(hpetp, TICK_CALIBRATE); 738 739 local_irq_save(flags); 740 741 start = read_counter(&hpet->hpet_mc); 742 743 do { 744 m = read_counter(&hpet->hpet_mc); 745 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 746 } while (i++, (m - start) < count); 747 748 local_irq_restore(flags); 749 750 return (m - start) / i; 751 } 752 753 int hpet_alloc(struct hpet_data *hdp) 754 { 755 u64 cap, mcfg; 756 struct hpet_dev *devp; 757 u32 i, ntimer; 758 struct hpets *hpetp; 759 size_t siz; 760 struct hpet __iomem *hpet; 761 static struct hpets *last = NULL; 762 unsigned long period; 763 unsigned long long temp; 764 u32 remainder; 765 766 /* 767 * hpet_alloc can be called by platform dependent code. 768 * If platform dependent code has allocated the hpet that 769 * ACPI has also reported, then we catch it here. 770 */ 771 if (hpet_is_known(hdp)) { 772 printk(KERN_DEBUG "%s: duplicate HPET ignored\n", 773 __func__); 774 return 0; 775 } 776 777 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) * 778 sizeof(struct hpet_dev)); 779 780 hpetp = kzalloc(siz, GFP_KERNEL); 781 782 if (!hpetp) 783 return -ENOMEM; 784 785 hpetp->hp_which = hpet_nhpet++; 786 hpetp->hp_hpet = hdp->hd_address; 787 hpetp->hp_hpet_phys = hdp->hd_phys_address; 788 789 hpetp->hp_ntimer = hdp->hd_nirqs; 790 791 for (i = 0; i < hdp->hd_nirqs; i++) 792 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i]; 793 794 hpet = hpetp->hp_hpet; 795 796 cap = readq(&hpet->hpet_cap); 797 798 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1; 799 800 if (hpetp->hp_ntimer != ntimer) { 801 printk(KERN_WARNING "hpet: number irqs doesn't agree" 802 " with number of timers\n"); 803 kfree(hpetp); 804 return -ENODEV; 805 } 806 807 if (last) 808 last->hp_next = hpetp; 809 else 810 hpets = hpetp; 811 812 last = hpetp; 813 814 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >> 815 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */ 816 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */ 817 temp += period >> 1; /* round */ 818 do_div(temp, period); 819 hpetp->hp_tick_freq = temp; /* ticks per second */ 820 821 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s", 822 hpetp->hp_which, hdp->hd_phys_address, 823 hpetp->hp_ntimer > 1 ? "s" : ""); 824 for (i = 0; i < hpetp->hp_ntimer; i++) 825 printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]); 826 printk("\n"); 827 828 temp = hpetp->hp_tick_freq; 829 remainder = do_div(temp, 1000000); 830 printk(KERN_INFO 831 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n", 832 hpetp->hp_which, hpetp->hp_ntimer, 833 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, 834 (unsigned) temp, remainder); 835 836 mcfg = readq(&hpet->hpet_config); 837 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) { 838 write_counter(0L, &hpet->hpet_mc); 839 mcfg |= HPET_ENABLE_CNF_MASK; 840 writeq(mcfg, &hpet->hpet_config); 841 } 842 843 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) { 844 struct hpet_timer __iomem *timer; 845 846 timer = &hpet->hpet_timers[devp - hpetp->hp_dev]; 847 848 devp->hd_hpets = hpetp; 849 devp->hd_hpet = hpet; 850 devp->hd_timer = timer; 851 852 /* 853 * If the timer was reserved by platform code, 854 * then make timer unavailable for opens. 855 */ 856 if (hdp->hd_state & (1 << i)) { 857 devp->hd_flags = HPET_OPEN; 858 continue; 859 } 860 861 init_waitqueue_head(&devp->hd_waitqueue); 862 } 863 864 hpetp->hp_delta = hpet_calibrate(hpetp); 865 866 /* This clocksource driver currently only works on ia64 */ 867 #ifdef CONFIG_IA64 868 if (!hpet_clocksource) { 869 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc; 870 CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr); 871 clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq, 872 clocksource_hpet.shift); 873 clocksource_register(&clocksource_hpet); 874 hpetp->hp_clocksource = &clocksource_hpet; 875 hpet_clocksource = &clocksource_hpet; 876 } 877 #endif 878 879 return 0; 880 } 881 882 static acpi_status hpet_resources(struct acpi_resource *res, void *data) 883 { 884 struct hpet_data *hdp; 885 acpi_status status; 886 struct acpi_resource_address64 addr; 887 888 hdp = data; 889 890 status = acpi_resource_to_address64(res, &addr); 891 892 if (ACPI_SUCCESS(status)) { 893 hdp->hd_phys_address = addr.minimum; 894 hdp->hd_address = ioremap(addr.minimum, addr.address_length); 895 896 if (hpet_is_known(hdp)) { 897 iounmap(hdp->hd_address); 898 return AE_ALREADY_EXISTS; 899 } 900 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) { 901 struct acpi_resource_fixed_memory32 *fixmem32; 902 903 fixmem32 = &res->data.fixed_memory32; 904 if (!fixmem32) 905 return AE_NO_MEMORY; 906 907 hdp->hd_phys_address = fixmem32->address; 908 hdp->hd_address = ioremap(fixmem32->address, 909 HPET_RANGE_SIZE); 910 911 if (hpet_is_known(hdp)) { 912 iounmap(hdp->hd_address); 913 return AE_ALREADY_EXISTS; 914 } 915 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) { 916 struct acpi_resource_extended_irq *irqp; 917 int i, irq; 918 919 irqp = &res->data.extended_irq; 920 921 for (i = 0; i < irqp->interrupt_count; i++) { 922 irq = acpi_register_gsi(irqp->interrupts[i], 923 irqp->triggering, irqp->polarity); 924 if (irq < 0) 925 return AE_ERROR; 926 927 hdp->hd_irq[hdp->hd_nirqs] = irq; 928 hdp->hd_nirqs++; 929 } 930 } 931 932 return AE_OK; 933 } 934 935 static int hpet_acpi_add(struct acpi_device *device) 936 { 937 acpi_status result; 938 struct hpet_data data; 939 940 memset(&data, 0, sizeof(data)); 941 942 result = 943 acpi_walk_resources(device->handle, METHOD_NAME__CRS, 944 hpet_resources, &data); 945 946 if (ACPI_FAILURE(result)) 947 return -ENODEV; 948 949 if (!data.hd_address || !data.hd_nirqs) { 950 printk("%s: no address or irqs in _CRS\n", __func__); 951 return -ENODEV; 952 } 953 954 return hpet_alloc(&data); 955 } 956 957 static int hpet_acpi_remove(struct acpi_device *device, int type) 958 { 959 /* XXX need to unregister clocksource, dealloc mem, etc */ 960 return -EINVAL; 961 } 962 963 static const struct acpi_device_id hpet_device_ids[] = { 964 {"PNP0103", 0}, 965 {"", 0}, 966 }; 967 MODULE_DEVICE_TABLE(acpi, hpet_device_ids); 968 969 static struct acpi_driver hpet_acpi_driver = { 970 .name = "hpet", 971 .ids = hpet_device_ids, 972 .ops = { 973 .add = hpet_acpi_add, 974 .remove = hpet_acpi_remove, 975 }, 976 }; 977 978 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops }; 979 980 static int __init hpet_init(void) 981 { 982 int result; 983 984 result = misc_register(&hpet_misc); 985 if (result < 0) 986 return -ENODEV; 987 988 sysctl_header = register_sysctl_table(dev_root); 989 990 result = acpi_bus_register_driver(&hpet_acpi_driver); 991 if (result < 0) { 992 if (sysctl_header) 993 unregister_sysctl_table(sysctl_header); 994 misc_deregister(&hpet_misc); 995 return result; 996 } 997 998 return 0; 999 } 1000 1001 static void __exit hpet_exit(void) 1002 { 1003 acpi_bus_unregister_driver(&hpet_acpi_driver); 1004 1005 if (sysctl_header) 1006 unregister_sysctl_table(sysctl_header); 1007 misc_deregister(&hpet_misc); 1008 1009 return; 1010 } 1011 1012 module_init(hpet_init); 1013 module_exit(hpet_exit); 1014 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>"); 1015 MODULE_LICENSE("GPL"); 1016