1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Intel & MS High Precision Event Timer Implementation. 4 * 5 * Copyright (C) 2003 Intel Corporation 6 * Venki Pallipadi 7 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P. 8 * Bob Picco <robert.picco@hp.com> 9 */ 10 11 #include <linux/interrupt.h> 12 #include <linux/kernel.h> 13 #include <linux/types.h> 14 #include <linux/miscdevice.h> 15 #include <linux/major.h> 16 #include <linux/ioport.h> 17 #include <linux/fcntl.h> 18 #include <linux/init.h> 19 #include <linux/io-64-nonatomic-lo-hi.h> 20 #include <linux/poll.h> 21 #include <linux/mm.h> 22 #include <linux/proc_fs.h> 23 #include <linux/spinlock.h> 24 #include <linux/sysctl.h> 25 #include <linux/wait.h> 26 #include <linux/sched/signal.h> 27 #include <linux/bcd.h> 28 #include <linux/seq_file.h> 29 #include <linux/bitops.h> 30 #include <linux/compat.h> 31 #include <linux/clocksource.h> 32 #include <linux/uaccess.h> 33 #include <linux/slab.h> 34 #include <linux/io.h> 35 #include <linux/acpi.h> 36 #include <linux/hpet.h> 37 #include <asm/current.h> 38 #include <asm/irq.h> 39 #include <asm/div64.h> 40 41 /* 42 * The High Precision Event Timer driver. 43 * This driver is closely modelled after the rtc.c driver. 44 * See HPET spec revision 1. 45 */ 46 #define HPET_USER_FREQ (64) 47 #define HPET_DRIFT (500) 48 49 #define HPET_RANGE_SIZE 1024 /* from HPET spec */ 50 51 52 /* WARNING -- don't get confused. These macros are never used 53 * to write the (single) counter, and rarely to read it. 54 * They're badly named; to fix, someday. 55 */ 56 #if BITS_PER_LONG == 64 57 #define write_counter(V, MC) writeq(V, MC) 58 #define read_counter(MC) readq(MC) 59 #else 60 #define write_counter(V, MC) writel(V, MC) 61 #define read_counter(MC) readl(MC) 62 #endif 63 64 static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */ 65 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ; 66 67 /* A lock for concurrent access by app and isr hpet activity. */ 68 static DEFINE_SPINLOCK(hpet_lock); 69 70 #define HPET_DEV_NAME (7) 71 72 struct hpet_dev { 73 struct hpets *hd_hpets; 74 struct hpet __iomem *hd_hpet; 75 struct hpet_timer __iomem *hd_timer; 76 unsigned long hd_ireqfreq; 77 unsigned long hd_irqdata; 78 wait_queue_head_t hd_waitqueue; 79 struct fasync_struct *hd_async_queue; 80 unsigned int hd_flags; 81 unsigned int hd_irq; 82 unsigned int hd_hdwirq; 83 char hd_name[HPET_DEV_NAME]; 84 }; 85 86 struct hpets { 87 struct hpets *hp_next; 88 struct hpet __iomem *hp_hpet; 89 unsigned long hp_hpet_phys; 90 unsigned long long hp_tick_freq; 91 unsigned long hp_delta; 92 unsigned int hp_ntimer; 93 unsigned int hp_which; 94 struct hpet_dev hp_dev[] __counted_by(hp_ntimer); 95 }; 96 97 static struct hpets *hpets; 98 99 #define HPET_OPEN 0x0001 100 #define HPET_IE 0x0002 /* interrupt enabled */ 101 #define HPET_PERIODIC 0x0004 102 #define HPET_SHARED_IRQ 0x0008 103 104 static irqreturn_t hpet_interrupt(int irq, void *data) 105 { 106 struct hpet_dev *devp; 107 unsigned long isr; 108 109 devp = data; 110 isr = 1 << (devp - devp->hd_hpets->hp_dev); 111 112 if ((devp->hd_flags & HPET_SHARED_IRQ) && 113 !(isr & readl(&devp->hd_hpet->hpet_isr))) 114 return IRQ_NONE; 115 116 spin_lock(&hpet_lock); 117 devp->hd_irqdata++; 118 119 /* 120 * For non-periodic timers, increment the accumulator. 121 * This has the effect of treating non-periodic like periodic. 122 */ 123 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) { 124 unsigned long t, mc, base, k; 125 struct hpet __iomem *hpet = devp->hd_hpet; 126 struct hpets *hpetp = devp->hd_hpets; 127 128 t = devp->hd_ireqfreq; 129 read_counter(&devp->hd_timer->hpet_compare); 130 mc = read_counter(&hpet->hpet_mc); 131 /* The time for the next interrupt would logically be t + m, 132 * however, if we are very unlucky and the interrupt is delayed 133 * for longer than t then we will completely miss the next 134 * interrupt if we set t + m and an application will hang. 135 * Therefore we need to make a more complex computation assuming 136 * that there exists a k for which the following is true: 137 * k * t + base < mc + delta 138 * (k + 1) * t + base > mc + delta 139 * where t is the interval in hpet ticks for the given freq, 140 * base is the theoretical start value 0 < base < t, 141 * mc is the main counter value at the time of the interrupt, 142 * delta is the time it takes to write the a value to the 143 * comparator. 144 * k may then be computed as (mc - base + delta) / t . 145 */ 146 base = mc % t; 147 k = (mc - base + hpetp->hp_delta) / t; 148 write_counter(t * (k + 1) + base, 149 &devp->hd_timer->hpet_compare); 150 } 151 152 if (devp->hd_flags & HPET_SHARED_IRQ) 153 writel(isr, &devp->hd_hpet->hpet_isr); 154 spin_unlock(&hpet_lock); 155 156 wake_up_interruptible(&devp->hd_waitqueue); 157 158 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN); 159 160 return IRQ_HANDLED; 161 } 162 163 static void hpet_timer_set_irq(struct hpet_dev *devp) 164 { 165 const unsigned int nr_irqs = irq_get_nr_irqs(); 166 unsigned long v; 167 int irq, gsi; 168 struct hpet_timer __iomem *timer; 169 170 spin_lock_irq(&hpet_lock); 171 if (devp->hd_hdwirq) { 172 spin_unlock_irq(&hpet_lock); 173 return; 174 } 175 176 timer = devp->hd_timer; 177 178 /* we prefer level triggered mode */ 179 v = readl(&timer->hpet_config); 180 if (!(v & Tn_INT_TYPE_CNF_MASK)) { 181 v |= Tn_INT_TYPE_CNF_MASK; 182 writel(v, &timer->hpet_config); 183 } 184 spin_unlock_irq(&hpet_lock); 185 186 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> 187 Tn_INT_ROUTE_CAP_SHIFT; 188 189 /* 190 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by 191 * legacy device. In IO APIC mode, we skip all the legacy IRQS. 192 */ 193 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) 194 v &= ~0xf3df; 195 else 196 v &= ~0xffff; 197 198 for_each_set_bit(irq, &v, HPET_MAX_IRQ) { 199 if (irq >= nr_irqs) { 200 irq = HPET_MAX_IRQ; 201 break; 202 } 203 204 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE, 205 ACPI_ACTIVE_LOW); 206 if (gsi > 0) 207 break; 208 209 /* FIXME: Setup interrupt source table */ 210 } 211 212 if (irq < HPET_MAX_IRQ) { 213 spin_lock_irq(&hpet_lock); 214 v = readl(&timer->hpet_config); 215 v |= irq << Tn_INT_ROUTE_CNF_SHIFT; 216 writel(v, &timer->hpet_config); 217 devp->hd_hdwirq = gsi; 218 spin_unlock_irq(&hpet_lock); 219 } 220 return; 221 } 222 223 static int hpet_open(struct inode *inode, struct file *file) 224 { 225 struct hpet_dev *devp; 226 struct hpets *hpetp; 227 int i; 228 229 if (file->f_mode & FMODE_WRITE) 230 return -EINVAL; 231 232 mutex_lock(&hpet_mutex); 233 spin_lock_irq(&hpet_lock); 234 235 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next) 236 for (i = 0; i < hpetp->hp_ntimer; i++) 237 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) { 238 continue; 239 } else { 240 devp = &hpetp->hp_dev[i]; 241 break; 242 } 243 244 if (!devp) { 245 spin_unlock_irq(&hpet_lock); 246 mutex_unlock(&hpet_mutex); 247 return -EBUSY; 248 } 249 250 file->private_data = devp; 251 devp->hd_irqdata = 0; 252 devp->hd_flags |= HPET_OPEN; 253 spin_unlock_irq(&hpet_lock); 254 mutex_unlock(&hpet_mutex); 255 256 hpet_timer_set_irq(devp); 257 258 return 0; 259 } 260 261 static ssize_t 262 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) 263 { 264 DECLARE_WAITQUEUE(wait, current); 265 unsigned long data; 266 ssize_t retval; 267 struct hpet_dev *devp; 268 269 devp = file->private_data; 270 if (!devp->hd_ireqfreq) 271 return -EIO; 272 273 if (in_compat_syscall()) { 274 if (count < sizeof(compat_ulong_t)) 275 return -EINVAL; 276 } else { 277 if (count < sizeof(unsigned long)) 278 return -EINVAL; 279 } 280 281 add_wait_queue(&devp->hd_waitqueue, &wait); 282 283 for ( ; ; ) { 284 set_current_state(TASK_INTERRUPTIBLE); 285 286 spin_lock_irq(&hpet_lock); 287 data = devp->hd_irqdata; 288 devp->hd_irqdata = 0; 289 spin_unlock_irq(&hpet_lock); 290 291 if (data) { 292 break; 293 } else if (file->f_flags & O_NONBLOCK) { 294 retval = -EAGAIN; 295 goto out; 296 } else if (signal_pending(current)) { 297 retval = -ERESTARTSYS; 298 goto out; 299 } 300 schedule(); 301 } 302 303 if (in_compat_syscall()) { 304 retval = put_user(data, (compat_ulong_t __user *)buf); 305 if (!retval) 306 retval = sizeof(compat_ulong_t); 307 } else { 308 retval = put_user(data, (unsigned long __user *)buf); 309 if (!retval) 310 retval = sizeof(unsigned long); 311 } 312 313 out: 314 __set_current_state(TASK_RUNNING); 315 remove_wait_queue(&devp->hd_waitqueue, &wait); 316 317 return retval; 318 } 319 320 static __poll_t hpet_poll(struct file *file, poll_table * wait) 321 { 322 unsigned long v; 323 struct hpet_dev *devp; 324 325 devp = file->private_data; 326 327 if (!devp->hd_ireqfreq) 328 return 0; 329 330 poll_wait(file, &devp->hd_waitqueue, wait); 331 332 spin_lock_irq(&hpet_lock); 333 v = devp->hd_irqdata; 334 spin_unlock_irq(&hpet_lock); 335 336 if (v != 0) 337 return EPOLLIN | EPOLLRDNORM; 338 339 return 0; 340 } 341 342 #ifdef CONFIG_HPET_MMAP 343 #ifdef CONFIG_HPET_MMAP_DEFAULT 344 static int hpet_mmap_enabled = 1; 345 #else 346 static int hpet_mmap_enabled = 0; 347 #endif 348 349 static __init int hpet_mmap_enable(char *str) 350 { 351 get_option(&str, &hpet_mmap_enabled); 352 pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled"); 353 return 1; 354 } 355 __setup("hpet_mmap=", hpet_mmap_enable); 356 357 static int hpet_mmap_prepare(struct vm_area_desc *desc) 358 { 359 struct file *file = desc->file; 360 struct hpet_dev *devp; 361 unsigned long addr; 362 363 if (!hpet_mmap_enabled) 364 return -EACCES; 365 366 devp = file->private_data; 367 addr = devp->hd_hpets->hp_hpet_phys; 368 369 if (addr & (PAGE_SIZE - 1)) 370 return -ENOSYS; 371 372 desc->page_prot = pgprot_noncached(desc->page_prot); 373 mmap_action_simple_ioremap(desc, addr, PAGE_SIZE); 374 return 0; 375 } 376 #else 377 static int hpet_mmap_prepare(struct vm_area_desc *desc) 378 { 379 return -ENOSYS; 380 } 381 #endif 382 383 static int hpet_fasync(int fd, struct file *file, int on) 384 { 385 struct hpet_dev *devp; 386 387 devp = file->private_data; 388 389 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0) 390 return 0; 391 else 392 return -EIO; 393 } 394 395 static int hpet_release(struct inode *inode, struct file *file) 396 { 397 struct hpet_dev *devp; 398 struct hpet_timer __iomem *timer; 399 int irq = 0; 400 401 devp = file->private_data; 402 timer = devp->hd_timer; 403 404 spin_lock_irq(&hpet_lock); 405 406 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), 407 &timer->hpet_config); 408 409 irq = devp->hd_irq; 410 devp->hd_irq = 0; 411 412 devp->hd_ireqfreq = 0; 413 414 if (devp->hd_flags & HPET_PERIODIC 415 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { 416 unsigned long v; 417 418 v = readq(&timer->hpet_config); 419 v ^= Tn_TYPE_CNF_MASK; 420 writeq(v, &timer->hpet_config); 421 } 422 423 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC); 424 spin_unlock_irq(&hpet_lock); 425 426 if (irq) 427 free_irq(irq, devp); 428 429 file->private_data = NULL; 430 return 0; 431 } 432 433 static int hpet_ioctl_ieon(struct hpet_dev *devp) 434 { 435 struct hpet_timer __iomem *timer; 436 struct hpet __iomem *hpet; 437 struct hpets *hpetp; 438 int irq; 439 unsigned long g, v, t, m; 440 unsigned long flags, isr; 441 442 timer = devp->hd_timer; 443 hpet = devp->hd_hpet; 444 hpetp = devp->hd_hpets; 445 446 if (!devp->hd_ireqfreq) 447 return -EIO; 448 449 spin_lock_irq(&hpet_lock); 450 451 if (devp->hd_flags & HPET_IE) { 452 spin_unlock_irq(&hpet_lock); 453 return -EBUSY; 454 } 455 456 devp->hd_flags |= HPET_IE; 457 458 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK) 459 devp->hd_flags |= HPET_SHARED_IRQ; 460 spin_unlock_irq(&hpet_lock); 461 462 irq = devp->hd_hdwirq; 463 464 if (irq) { 465 unsigned long irq_flags; 466 467 if (devp->hd_flags & HPET_SHARED_IRQ) { 468 /* 469 * To prevent the interrupt handler from seeing an 470 * unwanted interrupt status bit, program the timer 471 * so that it will not fire in the near future ... 472 */ 473 writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK, 474 &timer->hpet_config); 475 write_counter(read_counter(&hpet->hpet_mc), 476 &timer->hpet_compare); 477 /* ... and clear any left-over status. */ 478 isr = 1 << (devp - devp->hd_hpets->hp_dev); 479 writel(isr, &hpet->hpet_isr); 480 } 481 482 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev)); 483 irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0; 484 if (request_irq(irq, hpet_interrupt, irq_flags, 485 devp->hd_name, (void *)devp)) { 486 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq); 487 irq = 0; 488 } 489 } 490 491 if (irq == 0) { 492 spin_lock_irq(&hpet_lock); 493 devp->hd_flags ^= HPET_IE; 494 spin_unlock_irq(&hpet_lock); 495 return -EIO; 496 } 497 498 devp->hd_irq = irq; 499 t = devp->hd_ireqfreq; 500 v = readq(&timer->hpet_config); 501 502 /* 64-bit comparators are not yet supported through the ioctls, 503 * so force this into 32-bit mode if it supports both modes 504 */ 505 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK; 506 507 if (devp->hd_flags & HPET_PERIODIC) { 508 g |= Tn_TYPE_CNF_MASK; 509 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK; 510 writeq(v, &timer->hpet_config); 511 local_irq_save(flags); 512 513 /* 514 * NOTE: First we modify the hidden accumulator 515 * register supported by periodic-capable comparators. 516 * We never want to modify the (single) counter; that 517 * would affect all the comparators. The value written 518 * is the counter value when the first interrupt is due. 519 */ 520 m = read_counter(&hpet->hpet_mc); 521 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 522 /* 523 * Then we modify the comparator, indicating the period 524 * for subsequent interrupt. 525 */ 526 write_counter(t, &timer->hpet_compare); 527 } else { 528 local_irq_save(flags); 529 m = read_counter(&hpet->hpet_mc); 530 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 531 } 532 533 if (devp->hd_flags & HPET_SHARED_IRQ) { 534 isr = 1 << (devp - devp->hd_hpets->hp_dev); 535 writel(isr, &hpet->hpet_isr); 536 } 537 writeq(g, &timer->hpet_config); 538 local_irq_restore(flags); 539 540 return 0; 541 } 542 543 /* converts Hz to number of timer ticks */ 544 static inline unsigned long hpet_time_div(struct hpets *hpets, 545 unsigned long dis) 546 { 547 unsigned long long m; 548 549 m = hpets->hp_tick_freq + (dis >> 1); 550 return div64_ul(m, dis); 551 } 552 553 static int 554 hpet_ioctl_common(struct hpet_dev *devp, unsigned int cmd, unsigned long arg, 555 struct hpet_info *info) 556 { 557 struct hpet_timer __iomem *timer; 558 struct hpets *hpetp; 559 int err; 560 unsigned long v; 561 562 switch (cmd) { 563 case HPET_IE_OFF: 564 case HPET_INFO: 565 case HPET_EPI: 566 case HPET_DPI: 567 case HPET_IRQFREQ: 568 timer = devp->hd_timer; 569 hpetp = devp->hd_hpets; 570 break; 571 case HPET_IE_ON: 572 return hpet_ioctl_ieon(devp); 573 default: 574 return -EINVAL; 575 } 576 577 err = 0; 578 579 switch (cmd) { 580 case HPET_IE_OFF: 581 if ((devp->hd_flags & HPET_IE) == 0) 582 break; 583 v = readq(&timer->hpet_config); 584 v &= ~Tn_INT_ENB_CNF_MASK; 585 writeq(v, &timer->hpet_config); 586 if (devp->hd_irq) { 587 free_irq(devp->hd_irq, devp); 588 devp->hd_irq = 0; 589 } 590 devp->hd_flags ^= HPET_IE; 591 break; 592 case HPET_INFO: 593 { 594 memset(info, 0, sizeof(*info)); 595 if (devp->hd_ireqfreq) 596 info->hi_ireqfreq = 597 hpet_time_div(hpetp, devp->hd_ireqfreq); 598 info->hi_flags = 599 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; 600 info->hi_hpet = hpetp->hp_which; 601 info->hi_timer = devp - hpetp->hp_dev; 602 break; 603 } 604 case HPET_EPI: 605 v = readq(&timer->hpet_config); 606 if ((v & Tn_PER_INT_CAP_MASK) == 0) { 607 err = -ENXIO; 608 break; 609 } 610 devp->hd_flags |= HPET_PERIODIC; 611 break; 612 case HPET_DPI: 613 v = readq(&timer->hpet_config); 614 if ((v & Tn_PER_INT_CAP_MASK) == 0) { 615 err = -ENXIO; 616 break; 617 } 618 if (devp->hd_flags & HPET_PERIODIC && 619 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { 620 v = readq(&timer->hpet_config); 621 v ^= Tn_TYPE_CNF_MASK; 622 writeq(v, &timer->hpet_config); 623 } 624 devp->hd_flags &= ~HPET_PERIODIC; 625 break; 626 case HPET_IRQFREQ: 627 if ((arg > hpet_max_freq) && 628 !capable(CAP_SYS_RESOURCE)) { 629 err = -EACCES; 630 break; 631 } 632 633 if (!arg) { 634 err = -EINVAL; 635 break; 636 } 637 638 devp->hd_ireqfreq = hpet_time_div(hpetp, arg); 639 } 640 641 return err; 642 } 643 644 static long 645 hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 646 { 647 struct hpet_info info; 648 int err; 649 650 mutex_lock(&hpet_mutex); 651 err = hpet_ioctl_common(file->private_data, cmd, arg, &info); 652 mutex_unlock(&hpet_mutex); 653 654 if ((cmd == HPET_INFO) && !err && 655 (copy_to_user((void __user *)arg, &info, sizeof(info)))) 656 err = -EFAULT; 657 658 return err; 659 } 660 661 #ifdef CONFIG_COMPAT 662 struct compat_hpet_info { 663 compat_ulong_t hi_ireqfreq; /* Hz */ 664 compat_ulong_t hi_flags; /* information */ 665 unsigned short hi_hpet; 666 unsigned short hi_timer; 667 }; 668 669 /* 32-bit types would lead to different command codes which should be 670 * translated into 64-bit ones before passed to hpet_ioctl_common 671 */ 672 #define COMPAT_HPET_INFO _IOR('h', 0x03, struct compat_hpet_info) 673 #define COMPAT_HPET_IRQFREQ _IOW('h', 0x6, compat_ulong_t) 674 675 static long 676 hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 677 { 678 struct hpet_info info; 679 int err; 680 681 if (cmd == COMPAT_HPET_INFO) 682 cmd = HPET_INFO; 683 684 if (cmd == COMPAT_HPET_IRQFREQ) 685 cmd = HPET_IRQFREQ; 686 687 mutex_lock(&hpet_mutex); 688 err = hpet_ioctl_common(file->private_data, cmd, arg, &info); 689 mutex_unlock(&hpet_mutex); 690 691 if ((cmd == HPET_INFO) && !err) { 692 struct compat_hpet_info __user *u = compat_ptr(arg); 693 if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) || 694 put_user(info.hi_flags, &u->hi_flags) || 695 put_user(info.hi_hpet, &u->hi_hpet) || 696 put_user(info.hi_timer, &u->hi_timer)) 697 err = -EFAULT; 698 } 699 700 return err; 701 } 702 #endif 703 704 static const struct file_operations hpet_fops = { 705 .owner = THIS_MODULE, 706 .read = hpet_read, 707 .poll = hpet_poll, 708 .unlocked_ioctl = hpet_ioctl, 709 #ifdef CONFIG_COMPAT 710 .compat_ioctl = hpet_compat_ioctl, 711 #endif 712 .open = hpet_open, 713 .release = hpet_release, 714 .fasync = hpet_fasync, 715 .mmap_prepare = hpet_mmap_prepare, 716 }; 717 718 static int hpet_is_known(struct hpet_data *hdp) 719 { 720 struct hpets *hpetp; 721 722 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next) 723 if (hpetp->hp_hpet_phys == hdp->hd_phys_address) 724 return 1; 725 726 return 0; 727 } 728 729 static const struct ctl_table hpet_table[] = { 730 { 731 .procname = "max-user-freq", 732 .data = &hpet_max_freq, 733 .maxlen = sizeof(int), 734 .mode = 0644, 735 .proc_handler = proc_dointvec, 736 }, 737 }; 738 739 static struct ctl_table_header *sysctl_header; 740 741 /* 742 * Adjustment for when arming the timer with 743 * initial conditions. That is, main counter 744 * ticks expired before interrupts are enabled. 745 */ 746 #define TICK_CALIBRATE (1000UL) 747 748 static unsigned long __hpet_calibrate(struct hpets *hpetp) 749 { 750 struct hpet_timer __iomem *timer = NULL; 751 unsigned long t, m, count, i, flags, start; 752 struct hpet_dev *devp; 753 int j; 754 struct hpet __iomem *hpet; 755 756 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++) 757 if ((devp->hd_flags & HPET_OPEN) == 0) { 758 timer = devp->hd_timer; 759 break; 760 } 761 762 if (!timer) 763 return 0; 764 765 hpet = hpetp->hp_hpet; 766 t = read_counter(&timer->hpet_compare); 767 768 i = 0; 769 count = hpet_time_div(hpetp, TICK_CALIBRATE); 770 771 local_irq_save(flags); 772 773 start = read_counter(&hpet->hpet_mc); 774 775 do { 776 m = read_counter(&hpet->hpet_mc); 777 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 778 } while (i++, (m - start) < count); 779 780 local_irq_restore(flags); 781 782 return (m - start) / i; 783 } 784 785 static unsigned long hpet_calibrate(struct hpets *hpetp) 786 { 787 unsigned long ret = ~0UL; 788 unsigned long tmp; 789 790 /* 791 * Try to calibrate until return value becomes stable small value. 792 * If SMI interruption occurs in calibration loop, the return value 793 * will be big. This avoids its impact. 794 */ 795 for ( ; ; ) { 796 tmp = __hpet_calibrate(hpetp); 797 if (ret <= tmp) 798 break; 799 ret = tmp; 800 } 801 802 return ret; 803 } 804 805 int hpet_alloc(struct hpet_data *hdp) 806 { 807 u64 cap, mcfg; 808 struct hpet_dev *devp; 809 u32 i, ntimer; 810 struct hpets *hpetp; 811 struct hpet __iomem *hpet; 812 static struct hpets *last; 813 u32 period; 814 unsigned long long temp; 815 u32 remainder; 816 817 /* 818 * hpet_alloc can be called by platform dependent code. 819 * If platform dependent code has allocated the hpet that 820 * ACPI has also reported, then we catch it here. 821 */ 822 if (hpet_is_known(hdp)) { 823 printk(KERN_DEBUG "%s: duplicate HPET ignored\n", 824 __func__); 825 return 0; 826 } 827 828 hpetp = kzalloc_flex(*hpetp, hp_dev, hdp->hd_nirqs); 829 830 if (!hpetp) 831 return -ENOMEM; 832 833 hpetp->hp_which = hpet_nhpet++; 834 hpetp->hp_hpet = hdp->hd_address; 835 hpetp->hp_hpet_phys = hdp->hd_phys_address; 836 837 hpetp->hp_ntimer = hdp->hd_nirqs; 838 839 for (i = 0; i < hdp->hd_nirqs; i++) 840 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i]; 841 842 hpet = hpetp->hp_hpet; 843 844 cap = readq(&hpet->hpet_cap); 845 846 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1; 847 848 if (hpetp->hp_ntimer != ntimer) { 849 printk(KERN_WARNING "hpet: number irqs doesn't agree" 850 " with number of timers\n"); 851 kfree(hpetp); 852 return -ENODEV; 853 } 854 855 if (last) 856 last->hp_next = hpetp; 857 else 858 hpets = hpetp; 859 860 last = hpetp; 861 862 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >> 863 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */ 864 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */ 865 temp += period >> 1; /* round */ 866 do_div(temp, period); 867 hpetp->hp_tick_freq = temp; /* ticks per second */ 868 869 printk(KERN_INFO "hpet%u: at MMIO 0x%lx, IRQ%s", 870 hpetp->hp_which, hdp->hd_phys_address, 871 str_plural(hpetp->hp_ntimer)); 872 for (i = 0; i < hpetp->hp_ntimer; i++) 873 printk(KERN_CONT "%s %u", i > 0 ? "," : "", hdp->hd_irq[i]); 874 printk(KERN_CONT "\n"); 875 876 temp = hpetp->hp_tick_freq; 877 remainder = do_div(temp, 1000000); 878 printk(KERN_INFO 879 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n", 880 hpetp->hp_which, hpetp->hp_ntimer, 881 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, 882 (unsigned) temp, remainder); 883 884 mcfg = readq(&hpet->hpet_config); 885 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) { 886 write_counter(0L, &hpet->hpet_mc); 887 mcfg |= HPET_ENABLE_CNF_MASK; 888 writeq(mcfg, &hpet->hpet_config); 889 } 890 891 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) { 892 struct hpet_timer __iomem *timer; 893 894 timer = &hpet->hpet_timers[devp - hpetp->hp_dev]; 895 896 devp->hd_hpets = hpetp; 897 devp->hd_hpet = hpet; 898 devp->hd_timer = timer; 899 900 /* 901 * If the timer was reserved by platform code, 902 * then make timer unavailable for opens. 903 */ 904 if (hdp->hd_state & (1 << i)) { 905 devp->hd_flags = HPET_OPEN; 906 continue; 907 } 908 909 init_waitqueue_head(&devp->hd_waitqueue); 910 } 911 912 hpetp->hp_delta = hpet_calibrate(hpetp); 913 914 return 0; 915 } 916 917 static acpi_status hpet_resources(struct acpi_resource *res, void *data) 918 { 919 struct hpet_data *hdp; 920 acpi_status status; 921 struct acpi_resource_address64 addr; 922 923 hdp = data; 924 925 status = acpi_resource_to_address64(res, &addr); 926 927 if (ACPI_SUCCESS(status)) { 928 hdp->hd_phys_address = addr.address.minimum; 929 hdp->hd_address = ioremap(addr.address.minimum, addr.address.address_length); 930 if (!hdp->hd_address) 931 return AE_ERROR; 932 933 if (hpet_is_known(hdp)) { 934 iounmap(hdp->hd_address); 935 return AE_ALREADY_EXISTS; 936 } 937 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) { 938 struct acpi_resource_fixed_memory32 *fixmem32; 939 940 fixmem32 = &res->data.fixed_memory32; 941 942 hdp->hd_phys_address = fixmem32->address; 943 hdp->hd_address = ioremap(fixmem32->address, 944 HPET_RANGE_SIZE); 945 if (!hdp->hd_address) 946 return AE_ERROR; 947 948 if (hpet_is_known(hdp)) { 949 iounmap(hdp->hd_address); 950 return AE_ALREADY_EXISTS; 951 } 952 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) { 953 struct acpi_resource_extended_irq *irqp; 954 int i, irq; 955 956 irqp = &res->data.extended_irq; 957 958 for (i = 0; i < irqp->interrupt_count; i++) { 959 if (hdp->hd_nirqs >= HPET_MAX_TIMERS) 960 break; 961 962 irq = acpi_register_gsi(NULL, irqp->interrupts[i], 963 irqp->triggering, 964 irqp->polarity); 965 if (irq < 0) 966 return AE_ERROR; 967 968 hdp->hd_irq[hdp->hd_nirqs] = irq; 969 hdp->hd_nirqs++; 970 } 971 } 972 973 return AE_OK; 974 } 975 976 static int hpet_acpi_add(struct acpi_device *device) 977 { 978 acpi_status result; 979 struct hpet_data data; 980 981 memset(&data, 0, sizeof(data)); 982 983 result = 984 acpi_walk_resources(device->handle, METHOD_NAME__CRS, 985 hpet_resources, &data); 986 987 if (ACPI_FAILURE(result)) 988 return -ENODEV; 989 990 if (!data.hd_address || !data.hd_nirqs) { 991 if (data.hd_address) 992 iounmap(data.hd_address); 993 printk("%s: no address or irqs in _CRS\n", __func__); 994 return -ENODEV; 995 } 996 997 return hpet_alloc(&data); 998 } 999 1000 static const struct acpi_device_id hpet_device_ids[] = { 1001 {"PNP0103", 0}, 1002 {"", 0}, 1003 }; 1004 1005 static struct acpi_driver hpet_acpi_driver = { 1006 .name = "hpet", 1007 .ids = hpet_device_ids, 1008 .ops = { 1009 .add = hpet_acpi_add, 1010 }, 1011 }; 1012 1013 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops }; 1014 1015 static int __init hpet_init(void) 1016 { 1017 int result; 1018 1019 result = misc_register(&hpet_misc); 1020 if (result < 0) 1021 return -ENODEV; 1022 1023 sysctl_header = register_sysctl("dev/hpet", hpet_table); 1024 1025 result = acpi_bus_register_driver(&hpet_acpi_driver); 1026 if (result < 0) { 1027 unregister_sysctl_table(sysctl_header); 1028 misc_deregister(&hpet_misc); 1029 return result; 1030 } 1031 1032 return 0; 1033 } 1034 device_initcall(hpet_init); 1035 1036 /* 1037 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>"); 1038 MODULE_LICENSE("GPL"); 1039 */ 1040