xref: /linux/drivers/char/hpet.c (revision 606b2f490fb80e55d05cf0e6cec0b6c0ff0fc18f)
1 /*
2  * Intel & MS High Precision Event Timer Implementation.
3  *
4  * Copyright (C) 2003 Intel Corporation
5  *	Venki Pallipadi
6  * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7  *	Bob Picco <robert.picco@hp.com>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  */
13 
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/smp_lock.h>
18 #include <linux/types.h>
19 #include <linux/miscdevice.h>
20 #include <linux/major.h>
21 #include <linux/ioport.h>
22 #include <linux/fcntl.h>
23 #include <linux/init.h>
24 #include <linux/poll.h>
25 #include <linux/mm.h>
26 #include <linux/proc_fs.h>
27 #include <linux/spinlock.h>
28 #include <linux/sysctl.h>
29 #include <linux/wait.h>
30 #include <linux/bcd.h>
31 #include <linux/seq_file.h>
32 #include <linux/bitops.h>
33 #include <linux/clocksource.h>
34 #include <linux/slab.h>
35 
36 #include <asm/current.h>
37 #include <asm/uaccess.h>
38 #include <asm/system.h>
39 #include <asm/io.h>
40 #include <asm/irq.h>
41 #include <asm/div64.h>
42 
43 #include <linux/acpi.h>
44 #include <acpi/acpi_bus.h>
45 #include <linux/hpet.h>
46 
47 /*
48  * The High Precision Event Timer driver.
49  * This driver is closely modelled after the rtc.c driver.
50  * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
51  */
52 #define	HPET_USER_FREQ	(64)
53 #define	HPET_DRIFT	(500)
54 
55 #define HPET_RANGE_SIZE		1024	/* from HPET spec */
56 
57 
58 /* WARNING -- don't get confused.  These macros are never used
59  * to write the (single) counter, and rarely to read it.
60  * They're badly named; to fix, someday.
61  */
62 #if BITS_PER_LONG == 64
63 #define	write_counter(V, MC)	writeq(V, MC)
64 #define	read_counter(MC)	readq(MC)
65 #else
66 #define	write_counter(V, MC)	writel(V, MC)
67 #define	read_counter(MC)	readl(MC)
68 #endif
69 
70 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
71 
72 /* This clocksource driver currently only works on ia64 */
73 #ifdef CONFIG_IA64
74 static void __iomem *hpet_mctr;
75 
76 static cycle_t read_hpet(struct clocksource *cs)
77 {
78 	return (cycle_t)read_counter((void __iomem *)hpet_mctr);
79 }
80 
81 static struct clocksource clocksource_hpet = {
82         .name           = "hpet",
83         .rating         = 250,
84         .read           = read_hpet,
85         .mask           = CLOCKSOURCE_MASK(64),
86 	.mult		= 0, /* to be calculated */
87         .shift          = 10,
88         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
89 };
90 static struct clocksource *hpet_clocksource;
91 #endif
92 
93 /* A lock for concurrent access by app and isr hpet activity. */
94 static DEFINE_SPINLOCK(hpet_lock);
95 
96 #define	HPET_DEV_NAME	(7)
97 
98 struct hpet_dev {
99 	struct hpets *hd_hpets;
100 	struct hpet __iomem *hd_hpet;
101 	struct hpet_timer __iomem *hd_timer;
102 	unsigned long hd_ireqfreq;
103 	unsigned long hd_irqdata;
104 	wait_queue_head_t hd_waitqueue;
105 	struct fasync_struct *hd_async_queue;
106 	unsigned int hd_flags;
107 	unsigned int hd_irq;
108 	unsigned int hd_hdwirq;
109 	char hd_name[HPET_DEV_NAME];
110 };
111 
112 struct hpets {
113 	struct hpets *hp_next;
114 	struct hpet __iomem *hp_hpet;
115 	unsigned long hp_hpet_phys;
116 	struct clocksource *hp_clocksource;
117 	unsigned long long hp_tick_freq;
118 	unsigned long hp_delta;
119 	unsigned int hp_ntimer;
120 	unsigned int hp_which;
121 	struct hpet_dev hp_dev[1];
122 };
123 
124 static struct hpets *hpets;
125 
126 #define	HPET_OPEN		0x0001
127 #define	HPET_IE			0x0002	/* interrupt enabled */
128 #define	HPET_PERIODIC		0x0004
129 #define	HPET_SHARED_IRQ		0x0008
130 
131 
132 #ifndef readq
133 static inline unsigned long long readq(void __iomem *addr)
134 {
135 	return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
136 }
137 #endif
138 
139 #ifndef writeq
140 static inline void writeq(unsigned long long v, void __iomem *addr)
141 {
142 	writel(v & 0xffffffff, addr);
143 	writel(v >> 32, addr + 4);
144 }
145 #endif
146 
147 static irqreturn_t hpet_interrupt(int irq, void *data)
148 {
149 	struct hpet_dev *devp;
150 	unsigned long isr;
151 
152 	devp = data;
153 	isr = 1 << (devp - devp->hd_hpets->hp_dev);
154 
155 	if ((devp->hd_flags & HPET_SHARED_IRQ) &&
156 	    !(isr & readl(&devp->hd_hpet->hpet_isr)))
157 		return IRQ_NONE;
158 
159 	spin_lock(&hpet_lock);
160 	devp->hd_irqdata++;
161 
162 	/*
163 	 * For non-periodic timers, increment the accumulator.
164 	 * This has the effect of treating non-periodic like periodic.
165 	 */
166 	if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
167 		unsigned long m, t;
168 
169 		t = devp->hd_ireqfreq;
170 		m = read_counter(&devp->hd_timer->hpet_compare);
171 		write_counter(t + m, &devp->hd_timer->hpet_compare);
172 	}
173 
174 	if (devp->hd_flags & HPET_SHARED_IRQ)
175 		writel(isr, &devp->hd_hpet->hpet_isr);
176 	spin_unlock(&hpet_lock);
177 
178 	wake_up_interruptible(&devp->hd_waitqueue);
179 
180 	kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
181 
182 	return IRQ_HANDLED;
183 }
184 
185 static void hpet_timer_set_irq(struct hpet_dev *devp)
186 {
187 	unsigned long v;
188 	int irq, gsi;
189 	struct hpet_timer __iomem *timer;
190 
191 	spin_lock_irq(&hpet_lock);
192 	if (devp->hd_hdwirq) {
193 		spin_unlock_irq(&hpet_lock);
194 		return;
195 	}
196 
197 	timer = devp->hd_timer;
198 
199 	/* we prefer level triggered mode */
200 	v = readl(&timer->hpet_config);
201 	if (!(v & Tn_INT_TYPE_CNF_MASK)) {
202 		v |= Tn_INT_TYPE_CNF_MASK;
203 		writel(v, &timer->hpet_config);
204 	}
205 	spin_unlock_irq(&hpet_lock);
206 
207 	v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
208 				 Tn_INT_ROUTE_CAP_SHIFT;
209 
210 	/*
211 	 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
212 	 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
213 	 */
214 	if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
215 		v &= ~0xf3df;
216 	else
217 		v &= ~0xffff;
218 
219 	for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
220 		if (irq >= nr_irqs) {
221 			irq = HPET_MAX_IRQ;
222 			break;
223 		}
224 
225 		gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
226 					ACPI_ACTIVE_LOW);
227 		if (gsi > 0)
228 			break;
229 
230 		/* FIXME: Setup interrupt source table */
231 	}
232 
233 	if (irq < HPET_MAX_IRQ) {
234 		spin_lock_irq(&hpet_lock);
235 		v = readl(&timer->hpet_config);
236 		v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
237 		writel(v, &timer->hpet_config);
238 		devp->hd_hdwirq = gsi;
239 		spin_unlock_irq(&hpet_lock);
240 	}
241 	return;
242 }
243 
244 static int hpet_open(struct inode *inode, struct file *file)
245 {
246 	struct hpet_dev *devp;
247 	struct hpets *hpetp;
248 	int i;
249 
250 	if (file->f_mode & FMODE_WRITE)
251 		return -EINVAL;
252 
253 	lock_kernel();
254 	spin_lock_irq(&hpet_lock);
255 
256 	for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
257 		for (i = 0; i < hpetp->hp_ntimer; i++)
258 			if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
259 				continue;
260 			else {
261 				devp = &hpetp->hp_dev[i];
262 				break;
263 			}
264 
265 	if (!devp) {
266 		spin_unlock_irq(&hpet_lock);
267 		unlock_kernel();
268 		return -EBUSY;
269 	}
270 
271 	file->private_data = devp;
272 	devp->hd_irqdata = 0;
273 	devp->hd_flags |= HPET_OPEN;
274 	spin_unlock_irq(&hpet_lock);
275 	unlock_kernel();
276 
277 	hpet_timer_set_irq(devp);
278 
279 	return 0;
280 }
281 
282 static ssize_t
283 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
284 {
285 	DECLARE_WAITQUEUE(wait, current);
286 	unsigned long data;
287 	ssize_t retval;
288 	struct hpet_dev *devp;
289 
290 	devp = file->private_data;
291 	if (!devp->hd_ireqfreq)
292 		return -EIO;
293 
294 	if (count < sizeof(unsigned long))
295 		return -EINVAL;
296 
297 	add_wait_queue(&devp->hd_waitqueue, &wait);
298 
299 	for ( ; ; ) {
300 		set_current_state(TASK_INTERRUPTIBLE);
301 
302 		spin_lock_irq(&hpet_lock);
303 		data = devp->hd_irqdata;
304 		devp->hd_irqdata = 0;
305 		spin_unlock_irq(&hpet_lock);
306 
307 		if (data)
308 			break;
309 		else if (file->f_flags & O_NONBLOCK) {
310 			retval = -EAGAIN;
311 			goto out;
312 		} else if (signal_pending(current)) {
313 			retval = -ERESTARTSYS;
314 			goto out;
315 		}
316 		schedule();
317 	}
318 
319 	retval = put_user(data, (unsigned long __user *)buf);
320 	if (!retval)
321 		retval = sizeof(unsigned long);
322 out:
323 	__set_current_state(TASK_RUNNING);
324 	remove_wait_queue(&devp->hd_waitqueue, &wait);
325 
326 	return retval;
327 }
328 
329 static unsigned int hpet_poll(struct file *file, poll_table * wait)
330 {
331 	unsigned long v;
332 	struct hpet_dev *devp;
333 
334 	devp = file->private_data;
335 
336 	if (!devp->hd_ireqfreq)
337 		return 0;
338 
339 	poll_wait(file, &devp->hd_waitqueue, wait);
340 
341 	spin_lock_irq(&hpet_lock);
342 	v = devp->hd_irqdata;
343 	spin_unlock_irq(&hpet_lock);
344 
345 	if (v != 0)
346 		return POLLIN | POLLRDNORM;
347 
348 	return 0;
349 }
350 
351 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
352 {
353 #ifdef	CONFIG_HPET_MMAP
354 	struct hpet_dev *devp;
355 	unsigned long addr;
356 
357 	if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
358 		return -EINVAL;
359 
360 	devp = file->private_data;
361 	addr = devp->hd_hpets->hp_hpet_phys;
362 
363 	if (addr & (PAGE_SIZE - 1))
364 		return -ENOSYS;
365 
366 	vma->vm_flags |= VM_IO;
367 	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
368 
369 	if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
370 					PAGE_SIZE, vma->vm_page_prot)) {
371 		printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
372 			__func__);
373 		return -EAGAIN;
374 	}
375 
376 	return 0;
377 #else
378 	return -ENOSYS;
379 #endif
380 }
381 
382 static int hpet_fasync(int fd, struct file *file, int on)
383 {
384 	struct hpet_dev *devp;
385 
386 	devp = file->private_data;
387 
388 	if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
389 		return 0;
390 	else
391 		return -EIO;
392 }
393 
394 static int hpet_release(struct inode *inode, struct file *file)
395 {
396 	struct hpet_dev *devp;
397 	struct hpet_timer __iomem *timer;
398 	int irq = 0;
399 
400 	devp = file->private_data;
401 	timer = devp->hd_timer;
402 
403 	spin_lock_irq(&hpet_lock);
404 
405 	writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
406 	       &timer->hpet_config);
407 
408 	irq = devp->hd_irq;
409 	devp->hd_irq = 0;
410 
411 	devp->hd_ireqfreq = 0;
412 
413 	if (devp->hd_flags & HPET_PERIODIC
414 	    && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
415 		unsigned long v;
416 
417 		v = readq(&timer->hpet_config);
418 		v ^= Tn_TYPE_CNF_MASK;
419 		writeq(v, &timer->hpet_config);
420 	}
421 
422 	devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
423 	spin_unlock_irq(&hpet_lock);
424 
425 	if (irq)
426 		free_irq(irq, devp);
427 
428 	file->private_data = NULL;
429 	return 0;
430 }
431 
432 static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int);
433 
434 static long hpet_ioctl(struct file *file, unsigned int cmd,
435 			unsigned long arg)
436 {
437 	struct hpet_dev *devp;
438 	int ret;
439 
440 	devp = file->private_data;
441 	lock_kernel();
442 	ret = hpet_ioctl_common(devp, cmd, arg, 0);
443 	unlock_kernel();
444 
445 	return ret;
446 }
447 
448 static int hpet_ioctl_ieon(struct hpet_dev *devp)
449 {
450 	struct hpet_timer __iomem *timer;
451 	struct hpet __iomem *hpet;
452 	struct hpets *hpetp;
453 	int irq;
454 	unsigned long g, v, t, m;
455 	unsigned long flags, isr;
456 
457 	timer = devp->hd_timer;
458 	hpet = devp->hd_hpet;
459 	hpetp = devp->hd_hpets;
460 
461 	if (!devp->hd_ireqfreq)
462 		return -EIO;
463 
464 	spin_lock_irq(&hpet_lock);
465 
466 	if (devp->hd_flags & HPET_IE) {
467 		spin_unlock_irq(&hpet_lock);
468 		return -EBUSY;
469 	}
470 
471 	devp->hd_flags |= HPET_IE;
472 
473 	if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
474 		devp->hd_flags |= HPET_SHARED_IRQ;
475 	spin_unlock_irq(&hpet_lock);
476 
477 	irq = devp->hd_hdwirq;
478 
479 	if (irq) {
480 		unsigned long irq_flags;
481 
482 		sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
483 		irq_flags = devp->hd_flags & HPET_SHARED_IRQ
484 						? IRQF_SHARED : IRQF_DISABLED;
485 		if (request_irq(irq, hpet_interrupt, irq_flags,
486 				devp->hd_name, (void *)devp)) {
487 			printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
488 			irq = 0;
489 		}
490 	}
491 
492 	if (irq == 0) {
493 		spin_lock_irq(&hpet_lock);
494 		devp->hd_flags ^= HPET_IE;
495 		spin_unlock_irq(&hpet_lock);
496 		return -EIO;
497 	}
498 
499 	devp->hd_irq = irq;
500 	t = devp->hd_ireqfreq;
501 	v = readq(&timer->hpet_config);
502 
503 	/* 64-bit comparators are not yet supported through the ioctls,
504 	 * so force this into 32-bit mode if it supports both modes
505 	 */
506 	g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
507 
508 	if (devp->hd_flags & HPET_PERIODIC) {
509 		g |= Tn_TYPE_CNF_MASK;
510 		v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
511 		writeq(v, &timer->hpet_config);
512 		local_irq_save(flags);
513 
514 		/*
515 		 * NOTE: First we modify the hidden accumulator
516 		 * register supported by periodic-capable comparators.
517 		 * We never want to modify the (single) counter; that
518 		 * would affect all the comparators. The value written
519 		 * is the counter value when the first interrupt is due.
520 		 */
521 		m = read_counter(&hpet->hpet_mc);
522 		write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
523 		/*
524 		 * Then we modify the comparator, indicating the period
525 		 * for subsequent interrupt.
526 		 */
527 		write_counter(t, &timer->hpet_compare);
528 	} else {
529 		local_irq_save(flags);
530 		m = read_counter(&hpet->hpet_mc);
531 		write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
532 	}
533 
534 	if (devp->hd_flags & HPET_SHARED_IRQ) {
535 		isr = 1 << (devp - devp->hd_hpets->hp_dev);
536 		writel(isr, &hpet->hpet_isr);
537 	}
538 	writeq(g, &timer->hpet_config);
539 	local_irq_restore(flags);
540 
541 	return 0;
542 }
543 
544 /* converts Hz to number of timer ticks */
545 static inline unsigned long hpet_time_div(struct hpets *hpets,
546 					  unsigned long dis)
547 {
548 	unsigned long long m;
549 
550 	m = hpets->hp_tick_freq + (dis >> 1);
551 	do_div(m, dis);
552 	return (unsigned long)m;
553 }
554 
555 static int
556 hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel)
557 {
558 	struct hpet_timer __iomem *timer;
559 	struct hpet __iomem *hpet;
560 	struct hpets *hpetp;
561 	int err;
562 	unsigned long v;
563 
564 	switch (cmd) {
565 	case HPET_IE_OFF:
566 	case HPET_INFO:
567 	case HPET_EPI:
568 	case HPET_DPI:
569 	case HPET_IRQFREQ:
570 		timer = devp->hd_timer;
571 		hpet = devp->hd_hpet;
572 		hpetp = devp->hd_hpets;
573 		break;
574 	case HPET_IE_ON:
575 		return hpet_ioctl_ieon(devp);
576 	default:
577 		return -EINVAL;
578 	}
579 
580 	err = 0;
581 
582 	switch (cmd) {
583 	case HPET_IE_OFF:
584 		if ((devp->hd_flags & HPET_IE) == 0)
585 			break;
586 		v = readq(&timer->hpet_config);
587 		v &= ~Tn_INT_ENB_CNF_MASK;
588 		writeq(v, &timer->hpet_config);
589 		if (devp->hd_irq) {
590 			free_irq(devp->hd_irq, devp);
591 			devp->hd_irq = 0;
592 		}
593 		devp->hd_flags ^= HPET_IE;
594 		break;
595 	case HPET_INFO:
596 		{
597 			struct hpet_info info;
598 
599 			if (devp->hd_ireqfreq)
600 				info.hi_ireqfreq =
601 					hpet_time_div(hpetp, devp->hd_ireqfreq);
602 			else
603 				info.hi_ireqfreq = 0;
604 			info.hi_flags =
605 			    readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
606 			info.hi_hpet = hpetp->hp_which;
607 			info.hi_timer = devp - hpetp->hp_dev;
608 			if (kernel)
609 				memcpy((void *)arg, &info, sizeof(info));
610 			else
611 				if (copy_to_user((void __user *)arg, &info,
612 						 sizeof(info)))
613 					err = -EFAULT;
614 			break;
615 		}
616 	case HPET_EPI:
617 		v = readq(&timer->hpet_config);
618 		if ((v & Tn_PER_INT_CAP_MASK) == 0) {
619 			err = -ENXIO;
620 			break;
621 		}
622 		devp->hd_flags |= HPET_PERIODIC;
623 		break;
624 	case HPET_DPI:
625 		v = readq(&timer->hpet_config);
626 		if ((v & Tn_PER_INT_CAP_MASK) == 0) {
627 			err = -ENXIO;
628 			break;
629 		}
630 		if (devp->hd_flags & HPET_PERIODIC &&
631 		    readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
632 			v = readq(&timer->hpet_config);
633 			v ^= Tn_TYPE_CNF_MASK;
634 			writeq(v, &timer->hpet_config);
635 		}
636 		devp->hd_flags &= ~HPET_PERIODIC;
637 		break;
638 	case HPET_IRQFREQ:
639 		if (!kernel && (arg > hpet_max_freq) &&
640 		    !capable(CAP_SYS_RESOURCE)) {
641 			err = -EACCES;
642 			break;
643 		}
644 
645 		if (!arg) {
646 			err = -EINVAL;
647 			break;
648 		}
649 
650 		devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
651 	}
652 
653 	return err;
654 }
655 
656 static const struct file_operations hpet_fops = {
657 	.owner = THIS_MODULE,
658 	.llseek = no_llseek,
659 	.read = hpet_read,
660 	.poll = hpet_poll,
661 	.unlocked_ioctl = hpet_ioctl,
662 	.open = hpet_open,
663 	.release = hpet_release,
664 	.fasync = hpet_fasync,
665 	.mmap = hpet_mmap,
666 };
667 
668 static int hpet_is_known(struct hpet_data *hdp)
669 {
670 	struct hpets *hpetp;
671 
672 	for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
673 		if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
674 			return 1;
675 
676 	return 0;
677 }
678 
679 static ctl_table hpet_table[] = {
680 	{
681 	 .procname = "max-user-freq",
682 	 .data = &hpet_max_freq,
683 	 .maxlen = sizeof(int),
684 	 .mode = 0644,
685 	 .proc_handler = proc_dointvec,
686 	 },
687 	{}
688 };
689 
690 static ctl_table hpet_root[] = {
691 	{
692 	 .procname = "hpet",
693 	 .maxlen = 0,
694 	 .mode = 0555,
695 	 .child = hpet_table,
696 	 },
697 	{}
698 };
699 
700 static ctl_table dev_root[] = {
701 	{
702 	 .procname = "dev",
703 	 .maxlen = 0,
704 	 .mode = 0555,
705 	 .child = hpet_root,
706 	 },
707 	{}
708 };
709 
710 static struct ctl_table_header *sysctl_header;
711 
712 /*
713  * Adjustment for when arming the timer with
714  * initial conditions.  That is, main counter
715  * ticks expired before interrupts are enabled.
716  */
717 #define	TICK_CALIBRATE	(1000UL)
718 
719 static unsigned long __hpet_calibrate(struct hpets *hpetp)
720 {
721 	struct hpet_timer __iomem *timer = NULL;
722 	unsigned long t, m, count, i, flags, start;
723 	struct hpet_dev *devp;
724 	int j;
725 	struct hpet __iomem *hpet;
726 
727 	for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
728 		if ((devp->hd_flags & HPET_OPEN) == 0) {
729 			timer = devp->hd_timer;
730 			break;
731 		}
732 
733 	if (!timer)
734 		return 0;
735 
736 	hpet = hpetp->hp_hpet;
737 	t = read_counter(&timer->hpet_compare);
738 
739 	i = 0;
740 	count = hpet_time_div(hpetp, TICK_CALIBRATE);
741 
742 	local_irq_save(flags);
743 
744 	start = read_counter(&hpet->hpet_mc);
745 
746 	do {
747 		m = read_counter(&hpet->hpet_mc);
748 		write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
749 	} while (i++, (m - start) < count);
750 
751 	local_irq_restore(flags);
752 
753 	return (m - start) / i;
754 }
755 
756 static unsigned long hpet_calibrate(struct hpets *hpetp)
757 {
758 	unsigned long ret = -1;
759 	unsigned long tmp;
760 
761 	/*
762 	 * Try to calibrate until return value becomes stable small value.
763 	 * If SMI interruption occurs in calibration loop, the return value
764 	 * will be big. This avoids its impact.
765 	 */
766 	for ( ; ; ) {
767 		tmp = __hpet_calibrate(hpetp);
768 		if (ret <= tmp)
769 			break;
770 		ret = tmp;
771 	}
772 
773 	return ret;
774 }
775 
776 int hpet_alloc(struct hpet_data *hdp)
777 {
778 	u64 cap, mcfg;
779 	struct hpet_dev *devp;
780 	u32 i, ntimer;
781 	struct hpets *hpetp;
782 	size_t siz;
783 	struct hpet __iomem *hpet;
784 	static struct hpets *last = NULL;
785 	unsigned long period;
786 	unsigned long long temp;
787 	u32 remainder;
788 
789 	/*
790 	 * hpet_alloc can be called by platform dependent code.
791 	 * If platform dependent code has allocated the hpet that
792 	 * ACPI has also reported, then we catch it here.
793 	 */
794 	if (hpet_is_known(hdp)) {
795 		printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
796 			__func__);
797 		return 0;
798 	}
799 
800 	siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
801 				      sizeof(struct hpet_dev));
802 
803 	hpetp = kzalloc(siz, GFP_KERNEL);
804 
805 	if (!hpetp)
806 		return -ENOMEM;
807 
808 	hpetp->hp_which = hpet_nhpet++;
809 	hpetp->hp_hpet = hdp->hd_address;
810 	hpetp->hp_hpet_phys = hdp->hd_phys_address;
811 
812 	hpetp->hp_ntimer = hdp->hd_nirqs;
813 
814 	for (i = 0; i < hdp->hd_nirqs; i++)
815 		hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
816 
817 	hpet = hpetp->hp_hpet;
818 
819 	cap = readq(&hpet->hpet_cap);
820 
821 	ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
822 
823 	if (hpetp->hp_ntimer != ntimer) {
824 		printk(KERN_WARNING "hpet: number irqs doesn't agree"
825 		       " with number of timers\n");
826 		kfree(hpetp);
827 		return -ENODEV;
828 	}
829 
830 	if (last)
831 		last->hp_next = hpetp;
832 	else
833 		hpets = hpetp;
834 
835 	last = hpetp;
836 
837 	period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
838 		HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
839 	temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
840 	temp += period >> 1; /* round */
841 	do_div(temp, period);
842 	hpetp->hp_tick_freq = temp; /* ticks per second */
843 
844 	printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
845 		hpetp->hp_which, hdp->hd_phys_address,
846 		hpetp->hp_ntimer > 1 ? "s" : "");
847 	for (i = 0; i < hpetp->hp_ntimer; i++)
848 		printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
849 	printk("\n");
850 
851 	temp = hpetp->hp_tick_freq;
852 	remainder = do_div(temp, 1000000);
853 	printk(KERN_INFO
854 		"hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
855 		hpetp->hp_which, hpetp->hp_ntimer,
856 		cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
857 		(unsigned) temp, remainder);
858 
859 	mcfg = readq(&hpet->hpet_config);
860 	if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
861 		write_counter(0L, &hpet->hpet_mc);
862 		mcfg |= HPET_ENABLE_CNF_MASK;
863 		writeq(mcfg, &hpet->hpet_config);
864 	}
865 
866 	for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
867 		struct hpet_timer __iomem *timer;
868 
869 		timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
870 
871 		devp->hd_hpets = hpetp;
872 		devp->hd_hpet = hpet;
873 		devp->hd_timer = timer;
874 
875 		/*
876 		 * If the timer was reserved by platform code,
877 		 * then make timer unavailable for opens.
878 		 */
879 		if (hdp->hd_state & (1 << i)) {
880 			devp->hd_flags = HPET_OPEN;
881 			continue;
882 		}
883 
884 		init_waitqueue_head(&devp->hd_waitqueue);
885 	}
886 
887 	hpetp->hp_delta = hpet_calibrate(hpetp);
888 
889 /* This clocksource driver currently only works on ia64 */
890 #ifdef CONFIG_IA64
891 	if (!hpet_clocksource) {
892 		hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
893 		CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr);
894 		clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq,
895 						clocksource_hpet.shift);
896 		clocksource_register(&clocksource_hpet);
897 		hpetp->hp_clocksource = &clocksource_hpet;
898 		hpet_clocksource = &clocksource_hpet;
899 	}
900 #endif
901 
902 	return 0;
903 }
904 
905 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
906 {
907 	struct hpet_data *hdp;
908 	acpi_status status;
909 	struct acpi_resource_address64 addr;
910 
911 	hdp = data;
912 
913 	status = acpi_resource_to_address64(res, &addr);
914 
915 	if (ACPI_SUCCESS(status)) {
916 		hdp->hd_phys_address = addr.minimum;
917 		hdp->hd_address = ioremap(addr.minimum, addr.address_length);
918 
919 		if (hpet_is_known(hdp)) {
920 			iounmap(hdp->hd_address);
921 			return AE_ALREADY_EXISTS;
922 		}
923 	} else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
924 		struct acpi_resource_fixed_memory32 *fixmem32;
925 
926 		fixmem32 = &res->data.fixed_memory32;
927 		if (!fixmem32)
928 			return AE_NO_MEMORY;
929 
930 		hdp->hd_phys_address = fixmem32->address;
931 		hdp->hd_address = ioremap(fixmem32->address,
932 						HPET_RANGE_SIZE);
933 
934 		if (hpet_is_known(hdp)) {
935 			iounmap(hdp->hd_address);
936 			return AE_ALREADY_EXISTS;
937 		}
938 	} else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
939 		struct acpi_resource_extended_irq *irqp;
940 		int i, irq;
941 
942 		irqp = &res->data.extended_irq;
943 
944 		for (i = 0; i < irqp->interrupt_count; i++) {
945 			irq = acpi_register_gsi(NULL, irqp->interrupts[i],
946 				      irqp->triggering, irqp->polarity);
947 			if (irq < 0)
948 				return AE_ERROR;
949 
950 			hdp->hd_irq[hdp->hd_nirqs] = irq;
951 			hdp->hd_nirqs++;
952 		}
953 	}
954 
955 	return AE_OK;
956 }
957 
958 static int hpet_acpi_add(struct acpi_device *device)
959 {
960 	acpi_status result;
961 	struct hpet_data data;
962 
963 	memset(&data, 0, sizeof(data));
964 
965 	result =
966 	    acpi_walk_resources(device->handle, METHOD_NAME__CRS,
967 				hpet_resources, &data);
968 
969 	if (ACPI_FAILURE(result))
970 		return -ENODEV;
971 
972 	if (!data.hd_address || !data.hd_nirqs) {
973 		printk("%s: no address or irqs in _CRS\n", __func__);
974 		return -ENODEV;
975 	}
976 
977 	return hpet_alloc(&data);
978 }
979 
980 static int hpet_acpi_remove(struct acpi_device *device, int type)
981 {
982 	/* XXX need to unregister clocksource, dealloc mem, etc */
983 	return -EINVAL;
984 }
985 
986 static const struct acpi_device_id hpet_device_ids[] = {
987 	{"PNP0103", 0},
988 	{"", 0},
989 };
990 MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
991 
992 static struct acpi_driver hpet_acpi_driver = {
993 	.name = "hpet",
994 	.ids = hpet_device_ids,
995 	.ops = {
996 		.add = hpet_acpi_add,
997 		.remove = hpet_acpi_remove,
998 		},
999 };
1000 
1001 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1002 
1003 static int __init hpet_init(void)
1004 {
1005 	int result;
1006 
1007 	result = misc_register(&hpet_misc);
1008 	if (result < 0)
1009 		return -ENODEV;
1010 
1011 	sysctl_header = register_sysctl_table(dev_root);
1012 
1013 	result = acpi_bus_register_driver(&hpet_acpi_driver);
1014 	if (result < 0) {
1015 		if (sysctl_header)
1016 			unregister_sysctl_table(sysctl_header);
1017 		misc_deregister(&hpet_misc);
1018 		return result;
1019 	}
1020 
1021 	return 0;
1022 }
1023 
1024 static void __exit hpet_exit(void)
1025 {
1026 	acpi_bus_unregister_driver(&hpet_acpi_driver);
1027 
1028 	if (sysctl_header)
1029 		unregister_sysctl_table(sysctl_header);
1030 	misc_deregister(&hpet_misc);
1031 
1032 	return;
1033 }
1034 
1035 module_init(hpet_init);
1036 module_exit(hpet_exit);
1037 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1038 MODULE_LICENSE("GPL");
1039