1 /* 2 * Intel & MS High Precision Event Timer Implementation. 3 * 4 * Copyright (C) 2003 Intel Corporation 5 * Venki Pallipadi 6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P. 7 * Bob Picco <robert.picco@hp.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/interrupt.h> 15 #include <linux/kernel.h> 16 #include <linux/types.h> 17 #include <linux/miscdevice.h> 18 #include <linux/major.h> 19 #include <linux/ioport.h> 20 #include <linux/fcntl.h> 21 #include <linux/init.h> 22 #include <linux/poll.h> 23 #include <linux/mm.h> 24 #include <linux/proc_fs.h> 25 #include <linux/spinlock.h> 26 #include <linux/sysctl.h> 27 #include <linux/wait.h> 28 #include <linux/sched/signal.h> 29 #include <linux/bcd.h> 30 #include <linux/seq_file.h> 31 #include <linux/bitops.h> 32 #include <linux/compat.h> 33 #include <linux/clocksource.h> 34 #include <linux/uaccess.h> 35 #include <linux/slab.h> 36 #include <linux/io.h> 37 #include <linux/acpi.h> 38 #include <linux/hpet.h> 39 #include <asm/current.h> 40 #include <asm/irq.h> 41 #include <asm/div64.h> 42 43 /* 44 * The High Precision Event Timer driver. 45 * This driver is closely modelled after the rtc.c driver. 46 * See HPET spec revision 1. 47 */ 48 #define HPET_USER_FREQ (64) 49 #define HPET_DRIFT (500) 50 51 #define HPET_RANGE_SIZE 1024 /* from HPET spec */ 52 53 54 /* WARNING -- don't get confused. These macros are never used 55 * to write the (single) counter, and rarely to read it. 56 * They're badly named; to fix, someday. 57 */ 58 #if BITS_PER_LONG == 64 59 #define write_counter(V, MC) writeq(V, MC) 60 #define read_counter(MC) readq(MC) 61 #else 62 #define write_counter(V, MC) writel(V, MC) 63 #define read_counter(MC) readl(MC) 64 #endif 65 66 static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */ 67 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ; 68 69 /* This clocksource driver currently only works on ia64 */ 70 #ifdef CONFIG_IA64 71 static void __iomem *hpet_mctr; 72 73 static u64 read_hpet(struct clocksource *cs) 74 { 75 return (u64)read_counter((void __iomem *)hpet_mctr); 76 } 77 78 static struct clocksource clocksource_hpet = { 79 .name = "hpet", 80 .rating = 250, 81 .read = read_hpet, 82 .mask = CLOCKSOURCE_MASK(64), 83 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 84 }; 85 static struct clocksource *hpet_clocksource; 86 #endif 87 88 /* A lock for concurrent access by app and isr hpet activity. */ 89 static DEFINE_SPINLOCK(hpet_lock); 90 91 #define HPET_DEV_NAME (7) 92 93 struct hpet_dev { 94 struct hpets *hd_hpets; 95 struct hpet __iomem *hd_hpet; 96 struct hpet_timer __iomem *hd_timer; 97 unsigned long hd_ireqfreq; 98 unsigned long hd_irqdata; 99 wait_queue_head_t hd_waitqueue; 100 struct fasync_struct *hd_async_queue; 101 unsigned int hd_flags; 102 unsigned int hd_irq; 103 unsigned int hd_hdwirq; 104 char hd_name[HPET_DEV_NAME]; 105 }; 106 107 struct hpets { 108 struct hpets *hp_next; 109 struct hpet __iomem *hp_hpet; 110 unsigned long hp_hpet_phys; 111 struct clocksource *hp_clocksource; 112 unsigned long long hp_tick_freq; 113 unsigned long hp_delta; 114 unsigned int hp_ntimer; 115 unsigned int hp_which; 116 struct hpet_dev hp_dev[1]; 117 }; 118 119 static struct hpets *hpets; 120 121 #define HPET_OPEN 0x0001 122 #define HPET_IE 0x0002 /* interrupt enabled */ 123 #define HPET_PERIODIC 0x0004 124 #define HPET_SHARED_IRQ 0x0008 125 126 127 #ifndef readq 128 static inline unsigned long long readq(void __iomem *addr) 129 { 130 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL); 131 } 132 #endif 133 134 #ifndef writeq 135 static inline void writeq(unsigned long long v, void __iomem *addr) 136 { 137 writel(v & 0xffffffff, addr); 138 writel(v >> 32, addr + 4); 139 } 140 #endif 141 142 static irqreturn_t hpet_interrupt(int irq, void *data) 143 { 144 struct hpet_dev *devp; 145 unsigned long isr; 146 147 devp = data; 148 isr = 1 << (devp - devp->hd_hpets->hp_dev); 149 150 if ((devp->hd_flags & HPET_SHARED_IRQ) && 151 !(isr & readl(&devp->hd_hpet->hpet_isr))) 152 return IRQ_NONE; 153 154 spin_lock(&hpet_lock); 155 devp->hd_irqdata++; 156 157 /* 158 * For non-periodic timers, increment the accumulator. 159 * This has the effect of treating non-periodic like periodic. 160 */ 161 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) { 162 unsigned long m, t, mc, base, k; 163 struct hpet __iomem *hpet = devp->hd_hpet; 164 struct hpets *hpetp = devp->hd_hpets; 165 166 t = devp->hd_ireqfreq; 167 m = read_counter(&devp->hd_timer->hpet_compare); 168 mc = read_counter(&hpet->hpet_mc); 169 /* The time for the next interrupt would logically be t + m, 170 * however, if we are very unlucky and the interrupt is delayed 171 * for longer than t then we will completely miss the next 172 * interrupt if we set t + m and an application will hang. 173 * Therefore we need to make a more complex computation assuming 174 * that there exists a k for which the following is true: 175 * k * t + base < mc + delta 176 * (k + 1) * t + base > mc + delta 177 * where t is the interval in hpet ticks for the given freq, 178 * base is the theoretical start value 0 < base < t, 179 * mc is the main counter value at the time of the interrupt, 180 * delta is the time it takes to write the a value to the 181 * comparator. 182 * k may then be computed as (mc - base + delta) / t . 183 */ 184 base = mc % t; 185 k = (mc - base + hpetp->hp_delta) / t; 186 write_counter(t * (k + 1) + base, 187 &devp->hd_timer->hpet_compare); 188 } 189 190 if (devp->hd_flags & HPET_SHARED_IRQ) 191 writel(isr, &devp->hd_hpet->hpet_isr); 192 spin_unlock(&hpet_lock); 193 194 wake_up_interruptible(&devp->hd_waitqueue); 195 196 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN); 197 198 return IRQ_HANDLED; 199 } 200 201 static void hpet_timer_set_irq(struct hpet_dev *devp) 202 { 203 unsigned long v; 204 int irq, gsi; 205 struct hpet_timer __iomem *timer; 206 207 spin_lock_irq(&hpet_lock); 208 if (devp->hd_hdwirq) { 209 spin_unlock_irq(&hpet_lock); 210 return; 211 } 212 213 timer = devp->hd_timer; 214 215 /* we prefer level triggered mode */ 216 v = readl(&timer->hpet_config); 217 if (!(v & Tn_INT_TYPE_CNF_MASK)) { 218 v |= Tn_INT_TYPE_CNF_MASK; 219 writel(v, &timer->hpet_config); 220 } 221 spin_unlock_irq(&hpet_lock); 222 223 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> 224 Tn_INT_ROUTE_CAP_SHIFT; 225 226 /* 227 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by 228 * legacy device. In IO APIC mode, we skip all the legacy IRQS. 229 */ 230 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) 231 v &= ~0xf3df; 232 else 233 v &= ~0xffff; 234 235 for_each_set_bit(irq, &v, HPET_MAX_IRQ) { 236 if (irq >= nr_irqs) { 237 irq = HPET_MAX_IRQ; 238 break; 239 } 240 241 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE, 242 ACPI_ACTIVE_LOW); 243 if (gsi > 0) 244 break; 245 246 /* FIXME: Setup interrupt source table */ 247 } 248 249 if (irq < HPET_MAX_IRQ) { 250 spin_lock_irq(&hpet_lock); 251 v = readl(&timer->hpet_config); 252 v |= irq << Tn_INT_ROUTE_CNF_SHIFT; 253 writel(v, &timer->hpet_config); 254 devp->hd_hdwirq = gsi; 255 spin_unlock_irq(&hpet_lock); 256 } 257 return; 258 } 259 260 static int hpet_open(struct inode *inode, struct file *file) 261 { 262 struct hpet_dev *devp; 263 struct hpets *hpetp; 264 int i; 265 266 if (file->f_mode & FMODE_WRITE) 267 return -EINVAL; 268 269 mutex_lock(&hpet_mutex); 270 spin_lock_irq(&hpet_lock); 271 272 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next) 273 for (i = 0; i < hpetp->hp_ntimer; i++) 274 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) 275 continue; 276 else { 277 devp = &hpetp->hp_dev[i]; 278 break; 279 } 280 281 if (!devp) { 282 spin_unlock_irq(&hpet_lock); 283 mutex_unlock(&hpet_mutex); 284 return -EBUSY; 285 } 286 287 file->private_data = devp; 288 devp->hd_irqdata = 0; 289 devp->hd_flags |= HPET_OPEN; 290 spin_unlock_irq(&hpet_lock); 291 mutex_unlock(&hpet_mutex); 292 293 hpet_timer_set_irq(devp); 294 295 return 0; 296 } 297 298 static ssize_t 299 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) 300 { 301 DECLARE_WAITQUEUE(wait, current); 302 unsigned long data; 303 ssize_t retval; 304 struct hpet_dev *devp; 305 306 devp = file->private_data; 307 if (!devp->hd_ireqfreq) 308 return -EIO; 309 310 if (count < sizeof(unsigned long)) 311 return -EINVAL; 312 313 add_wait_queue(&devp->hd_waitqueue, &wait); 314 315 for ( ; ; ) { 316 set_current_state(TASK_INTERRUPTIBLE); 317 318 spin_lock_irq(&hpet_lock); 319 data = devp->hd_irqdata; 320 devp->hd_irqdata = 0; 321 spin_unlock_irq(&hpet_lock); 322 323 if (data) 324 break; 325 else if (file->f_flags & O_NONBLOCK) { 326 retval = -EAGAIN; 327 goto out; 328 } else if (signal_pending(current)) { 329 retval = -ERESTARTSYS; 330 goto out; 331 } 332 schedule(); 333 } 334 335 retval = put_user(data, (unsigned long __user *)buf); 336 if (!retval) 337 retval = sizeof(unsigned long); 338 out: 339 __set_current_state(TASK_RUNNING); 340 remove_wait_queue(&devp->hd_waitqueue, &wait); 341 342 return retval; 343 } 344 345 static __poll_t hpet_poll(struct file *file, poll_table * wait) 346 { 347 unsigned long v; 348 struct hpet_dev *devp; 349 350 devp = file->private_data; 351 352 if (!devp->hd_ireqfreq) 353 return 0; 354 355 poll_wait(file, &devp->hd_waitqueue, wait); 356 357 spin_lock_irq(&hpet_lock); 358 v = devp->hd_irqdata; 359 spin_unlock_irq(&hpet_lock); 360 361 if (v != 0) 362 return EPOLLIN | EPOLLRDNORM; 363 364 return 0; 365 } 366 367 #ifdef CONFIG_HPET_MMAP 368 #ifdef CONFIG_HPET_MMAP_DEFAULT 369 static int hpet_mmap_enabled = 1; 370 #else 371 static int hpet_mmap_enabled = 0; 372 #endif 373 374 static __init int hpet_mmap_enable(char *str) 375 { 376 get_option(&str, &hpet_mmap_enabled); 377 pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled"); 378 return 1; 379 } 380 __setup("hpet_mmap=", hpet_mmap_enable); 381 382 static int hpet_mmap(struct file *file, struct vm_area_struct *vma) 383 { 384 struct hpet_dev *devp; 385 unsigned long addr; 386 387 if (!hpet_mmap_enabled) 388 return -EACCES; 389 390 devp = file->private_data; 391 addr = devp->hd_hpets->hp_hpet_phys; 392 393 if (addr & (PAGE_SIZE - 1)) 394 return -ENOSYS; 395 396 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 397 return vm_iomap_memory(vma, addr, PAGE_SIZE); 398 } 399 #else 400 static int hpet_mmap(struct file *file, struct vm_area_struct *vma) 401 { 402 return -ENOSYS; 403 } 404 #endif 405 406 static int hpet_fasync(int fd, struct file *file, int on) 407 { 408 struct hpet_dev *devp; 409 410 devp = file->private_data; 411 412 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0) 413 return 0; 414 else 415 return -EIO; 416 } 417 418 static int hpet_release(struct inode *inode, struct file *file) 419 { 420 struct hpet_dev *devp; 421 struct hpet_timer __iomem *timer; 422 int irq = 0; 423 424 devp = file->private_data; 425 timer = devp->hd_timer; 426 427 spin_lock_irq(&hpet_lock); 428 429 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), 430 &timer->hpet_config); 431 432 irq = devp->hd_irq; 433 devp->hd_irq = 0; 434 435 devp->hd_ireqfreq = 0; 436 437 if (devp->hd_flags & HPET_PERIODIC 438 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { 439 unsigned long v; 440 441 v = readq(&timer->hpet_config); 442 v ^= Tn_TYPE_CNF_MASK; 443 writeq(v, &timer->hpet_config); 444 } 445 446 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC); 447 spin_unlock_irq(&hpet_lock); 448 449 if (irq) 450 free_irq(irq, devp); 451 452 file->private_data = NULL; 453 return 0; 454 } 455 456 static int hpet_ioctl_ieon(struct hpet_dev *devp) 457 { 458 struct hpet_timer __iomem *timer; 459 struct hpet __iomem *hpet; 460 struct hpets *hpetp; 461 int irq; 462 unsigned long g, v, t, m; 463 unsigned long flags, isr; 464 465 timer = devp->hd_timer; 466 hpet = devp->hd_hpet; 467 hpetp = devp->hd_hpets; 468 469 if (!devp->hd_ireqfreq) 470 return -EIO; 471 472 spin_lock_irq(&hpet_lock); 473 474 if (devp->hd_flags & HPET_IE) { 475 spin_unlock_irq(&hpet_lock); 476 return -EBUSY; 477 } 478 479 devp->hd_flags |= HPET_IE; 480 481 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK) 482 devp->hd_flags |= HPET_SHARED_IRQ; 483 spin_unlock_irq(&hpet_lock); 484 485 irq = devp->hd_hdwirq; 486 487 if (irq) { 488 unsigned long irq_flags; 489 490 if (devp->hd_flags & HPET_SHARED_IRQ) { 491 /* 492 * To prevent the interrupt handler from seeing an 493 * unwanted interrupt status bit, program the timer 494 * so that it will not fire in the near future ... 495 */ 496 writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK, 497 &timer->hpet_config); 498 write_counter(read_counter(&hpet->hpet_mc), 499 &timer->hpet_compare); 500 /* ... and clear any left-over status. */ 501 isr = 1 << (devp - devp->hd_hpets->hp_dev); 502 writel(isr, &hpet->hpet_isr); 503 } 504 505 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev)); 506 irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0; 507 if (request_irq(irq, hpet_interrupt, irq_flags, 508 devp->hd_name, (void *)devp)) { 509 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq); 510 irq = 0; 511 } 512 } 513 514 if (irq == 0) { 515 spin_lock_irq(&hpet_lock); 516 devp->hd_flags ^= HPET_IE; 517 spin_unlock_irq(&hpet_lock); 518 return -EIO; 519 } 520 521 devp->hd_irq = irq; 522 t = devp->hd_ireqfreq; 523 v = readq(&timer->hpet_config); 524 525 /* 64-bit comparators are not yet supported through the ioctls, 526 * so force this into 32-bit mode if it supports both modes 527 */ 528 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK; 529 530 if (devp->hd_flags & HPET_PERIODIC) { 531 g |= Tn_TYPE_CNF_MASK; 532 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK; 533 writeq(v, &timer->hpet_config); 534 local_irq_save(flags); 535 536 /* 537 * NOTE: First we modify the hidden accumulator 538 * register supported by periodic-capable comparators. 539 * We never want to modify the (single) counter; that 540 * would affect all the comparators. The value written 541 * is the counter value when the first interrupt is due. 542 */ 543 m = read_counter(&hpet->hpet_mc); 544 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 545 /* 546 * Then we modify the comparator, indicating the period 547 * for subsequent interrupt. 548 */ 549 write_counter(t, &timer->hpet_compare); 550 } else { 551 local_irq_save(flags); 552 m = read_counter(&hpet->hpet_mc); 553 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 554 } 555 556 if (devp->hd_flags & HPET_SHARED_IRQ) { 557 isr = 1 << (devp - devp->hd_hpets->hp_dev); 558 writel(isr, &hpet->hpet_isr); 559 } 560 writeq(g, &timer->hpet_config); 561 local_irq_restore(flags); 562 563 return 0; 564 } 565 566 /* converts Hz to number of timer ticks */ 567 static inline unsigned long hpet_time_div(struct hpets *hpets, 568 unsigned long dis) 569 { 570 unsigned long long m; 571 572 m = hpets->hp_tick_freq + (dis >> 1); 573 do_div(m, dis); 574 return (unsigned long)m; 575 } 576 577 static int 578 hpet_ioctl_common(struct hpet_dev *devp, unsigned int cmd, unsigned long arg, 579 struct hpet_info *info) 580 { 581 struct hpet_timer __iomem *timer; 582 struct hpets *hpetp; 583 int err; 584 unsigned long v; 585 586 switch (cmd) { 587 case HPET_IE_OFF: 588 case HPET_INFO: 589 case HPET_EPI: 590 case HPET_DPI: 591 case HPET_IRQFREQ: 592 timer = devp->hd_timer; 593 hpetp = devp->hd_hpets; 594 break; 595 case HPET_IE_ON: 596 return hpet_ioctl_ieon(devp); 597 default: 598 return -EINVAL; 599 } 600 601 err = 0; 602 603 switch (cmd) { 604 case HPET_IE_OFF: 605 if ((devp->hd_flags & HPET_IE) == 0) 606 break; 607 v = readq(&timer->hpet_config); 608 v &= ~Tn_INT_ENB_CNF_MASK; 609 writeq(v, &timer->hpet_config); 610 if (devp->hd_irq) { 611 free_irq(devp->hd_irq, devp); 612 devp->hd_irq = 0; 613 } 614 devp->hd_flags ^= HPET_IE; 615 break; 616 case HPET_INFO: 617 { 618 memset(info, 0, sizeof(*info)); 619 if (devp->hd_ireqfreq) 620 info->hi_ireqfreq = 621 hpet_time_div(hpetp, devp->hd_ireqfreq); 622 info->hi_flags = 623 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; 624 info->hi_hpet = hpetp->hp_which; 625 info->hi_timer = devp - hpetp->hp_dev; 626 break; 627 } 628 case HPET_EPI: 629 v = readq(&timer->hpet_config); 630 if ((v & Tn_PER_INT_CAP_MASK) == 0) { 631 err = -ENXIO; 632 break; 633 } 634 devp->hd_flags |= HPET_PERIODIC; 635 break; 636 case HPET_DPI: 637 v = readq(&timer->hpet_config); 638 if ((v & Tn_PER_INT_CAP_MASK) == 0) { 639 err = -ENXIO; 640 break; 641 } 642 if (devp->hd_flags & HPET_PERIODIC && 643 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { 644 v = readq(&timer->hpet_config); 645 v ^= Tn_TYPE_CNF_MASK; 646 writeq(v, &timer->hpet_config); 647 } 648 devp->hd_flags &= ~HPET_PERIODIC; 649 break; 650 case HPET_IRQFREQ: 651 if ((arg > hpet_max_freq) && 652 !capable(CAP_SYS_RESOURCE)) { 653 err = -EACCES; 654 break; 655 } 656 657 if (!arg) { 658 err = -EINVAL; 659 break; 660 } 661 662 devp->hd_ireqfreq = hpet_time_div(hpetp, arg); 663 } 664 665 return err; 666 } 667 668 static long 669 hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 670 { 671 struct hpet_info info; 672 int err; 673 674 mutex_lock(&hpet_mutex); 675 err = hpet_ioctl_common(file->private_data, cmd, arg, &info); 676 mutex_unlock(&hpet_mutex); 677 678 if ((cmd == HPET_INFO) && !err && 679 (copy_to_user((void __user *)arg, &info, sizeof(info)))) 680 err = -EFAULT; 681 682 return err; 683 } 684 685 #ifdef CONFIG_COMPAT 686 struct compat_hpet_info { 687 compat_ulong_t hi_ireqfreq; /* Hz */ 688 compat_ulong_t hi_flags; /* information */ 689 unsigned short hi_hpet; 690 unsigned short hi_timer; 691 }; 692 693 static long 694 hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 695 { 696 struct hpet_info info; 697 int err; 698 699 mutex_lock(&hpet_mutex); 700 err = hpet_ioctl_common(file->private_data, cmd, arg, &info); 701 mutex_unlock(&hpet_mutex); 702 703 if ((cmd == HPET_INFO) && !err) { 704 struct compat_hpet_info __user *u = compat_ptr(arg); 705 if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) || 706 put_user(info.hi_flags, &u->hi_flags) || 707 put_user(info.hi_hpet, &u->hi_hpet) || 708 put_user(info.hi_timer, &u->hi_timer)) 709 err = -EFAULT; 710 } 711 712 return err; 713 } 714 #endif 715 716 static const struct file_operations hpet_fops = { 717 .owner = THIS_MODULE, 718 .llseek = no_llseek, 719 .read = hpet_read, 720 .poll = hpet_poll, 721 .unlocked_ioctl = hpet_ioctl, 722 #ifdef CONFIG_COMPAT 723 .compat_ioctl = hpet_compat_ioctl, 724 #endif 725 .open = hpet_open, 726 .release = hpet_release, 727 .fasync = hpet_fasync, 728 .mmap = hpet_mmap, 729 }; 730 731 static int hpet_is_known(struct hpet_data *hdp) 732 { 733 struct hpets *hpetp; 734 735 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next) 736 if (hpetp->hp_hpet_phys == hdp->hd_phys_address) 737 return 1; 738 739 return 0; 740 } 741 742 static struct ctl_table hpet_table[] = { 743 { 744 .procname = "max-user-freq", 745 .data = &hpet_max_freq, 746 .maxlen = sizeof(int), 747 .mode = 0644, 748 .proc_handler = proc_dointvec, 749 }, 750 {} 751 }; 752 753 static struct ctl_table hpet_root[] = { 754 { 755 .procname = "hpet", 756 .maxlen = 0, 757 .mode = 0555, 758 .child = hpet_table, 759 }, 760 {} 761 }; 762 763 static struct ctl_table dev_root[] = { 764 { 765 .procname = "dev", 766 .maxlen = 0, 767 .mode = 0555, 768 .child = hpet_root, 769 }, 770 {} 771 }; 772 773 static struct ctl_table_header *sysctl_header; 774 775 /* 776 * Adjustment for when arming the timer with 777 * initial conditions. That is, main counter 778 * ticks expired before interrupts are enabled. 779 */ 780 #define TICK_CALIBRATE (1000UL) 781 782 static unsigned long __hpet_calibrate(struct hpets *hpetp) 783 { 784 struct hpet_timer __iomem *timer = NULL; 785 unsigned long t, m, count, i, flags, start; 786 struct hpet_dev *devp; 787 int j; 788 struct hpet __iomem *hpet; 789 790 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++) 791 if ((devp->hd_flags & HPET_OPEN) == 0) { 792 timer = devp->hd_timer; 793 break; 794 } 795 796 if (!timer) 797 return 0; 798 799 hpet = hpetp->hp_hpet; 800 t = read_counter(&timer->hpet_compare); 801 802 i = 0; 803 count = hpet_time_div(hpetp, TICK_CALIBRATE); 804 805 local_irq_save(flags); 806 807 start = read_counter(&hpet->hpet_mc); 808 809 do { 810 m = read_counter(&hpet->hpet_mc); 811 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 812 } while (i++, (m - start) < count); 813 814 local_irq_restore(flags); 815 816 return (m - start) / i; 817 } 818 819 static unsigned long hpet_calibrate(struct hpets *hpetp) 820 { 821 unsigned long ret = ~0UL; 822 unsigned long tmp; 823 824 /* 825 * Try to calibrate until return value becomes stable small value. 826 * If SMI interruption occurs in calibration loop, the return value 827 * will be big. This avoids its impact. 828 */ 829 for ( ; ; ) { 830 tmp = __hpet_calibrate(hpetp); 831 if (ret <= tmp) 832 break; 833 ret = tmp; 834 } 835 836 return ret; 837 } 838 839 int hpet_alloc(struct hpet_data *hdp) 840 { 841 u64 cap, mcfg; 842 struct hpet_dev *devp; 843 u32 i, ntimer; 844 struct hpets *hpetp; 845 struct hpet __iomem *hpet; 846 static struct hpets *last; 847 unsigned long period; 848 unsigned long long temp; 849 u32 remainder; 850 851 /* 852 * hpet_alloc can be called by platform dependent code. 853 * If platform dependent code has allocated the hpet that 854 * ACPI has also reported, then we catch it here. 855 */ 856 if (hpet_is_known(hdp)) { 857 printk(KERN_DEBUG "%s: duplicate HPET ignored\n", 858 __func__); 859 return 0; 860 } 861 862 hpetp = kzalloc(struct_size(hpetp, hp_dev, hdp->hd_nirqs - 1), 863 GFP_KERNEL); 864 865 if (!hpetp) 866 return -ENOMEM; 867 868 hpetp->hp_which = hpet_nhpet++; 869 hpetp->hp_hpet = hdp->hd_address; 870 hpetp->hp_hpet_phys = hdp->hd_phys_address; 871 872 hpetp->hp_ntimer = hdp->hd_nirqs; 873 874 for (i = 0; i < hdp->hd_nirqs; i++) 875 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i]; 876 877 hpet = hpetp->hp_hpet; 878 879 cap = readq(&hpet->hpet_cap); 880 881 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1; 882 883 if (hpetp->hp_ntimer != ntimer) { 884 printk(KERN_WARNING "hpet: number irqs doesn't agree" 885 " with number of timers\n"); 886 kfree(hpetp); 887 return -ENODEV; 888 } 889 890 if (last) 891 last->hp_next = hpetp; 892 else 893 hpets = hpetp; 894 895 last = hpetp; 896 897 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >> 898 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */ 899 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */ 900 temp += period >> 1; /* round */ 901 do_div(temp, period); 902 hpetp->hp_tick_freq = temp; /* ticks per second */ 903 904 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s", 905 hpetp->hp_which, hdp->hd_phys_address, 906 hpetp->hp_ntimer > 1 ? "s" : ""); 907 for (i = 0; i < hpetp->hp_ntimer; i++) 908 printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]); 909 printk(KERN_CONT "\n"); 910 911 temp = hpetp->hp_tick_freq; 912 remainder = do_div(temp, 1000000); 913 printk(KERN_INFO 914 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n", 915 hpetp->hp_which, hpetp->hp_ntimer, 916 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, 917 (unsigned) temp, remainder); 918 919 mcfg = readq(&hpet->hpet_config); 920 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) { 921 write_counter(0L, &hpet->hpet_mc); 922 mcfg |= HPET_ENABLE_CNF_MASK; 923 writeq(mcfg, &hpet->hpet_config); 924 } 925 926 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) { 927 struct hpet_timer __iomem *timer; 928 929 timer = &hpet->hpet_timers[devp - hpetp->hp_dev]; 930 931 devp->hd_hpets = hpetp; 932 devp->hd_hpet = hpet; 933 devp->hd_timer = timer; 934 935 /* 936 * If the timer was reserved by platform code, 937 * then make timer unavailable for opens. 938 */ 939 if (hdp->hd_state & (1 << i)) { 940 devp->hd_flags = HPET_OPEN; 941 continue; 942 } 943 944 init_waitqueue_head(&devp->hd_waitqueue); 945 } 946 947 hpetp->hp_delta = hpet_calibrate(hpetp); 948 949 /* This clocksource driver currently only works on ia64 */ 950 #ifdef CONFIG_IA64 951 if (!hpet_clocksource) { 952 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc; 953 clocksource_hpet.archdata.fsys_mmio = hpet_mctr; 954 clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq); 955 hpetp->hp_clocksource = &clocksource_hpet; 956 hpet_clocksource = &clocksource_hpet; 957 } 958 #endif 959 960 return 0; 961 } 962 963 static acpi_status hpet_resources(struct acpi_resource *res, void *data) 964 { 965 struct hpet_data *hdp; 966 acpi_status status; 967 struct acpi_resource_address64 addr; 968 969 hdp = data; 970 971 status = acpi_resource_to_address64(res, &addr); 972 973 if (ACPI_SUCCESS(status)) { 974 hdp->hd_phys_address = addr.address.minimum; 975 hdp->hd_address = ioremap(addr.address.minimum, addr.address.address_length); 976 977 if (hpet_is_known(hdp)) { 978 iounmap(hdp->hd_address); 979 return AE_ALREADY_EXISTS; 980 } 981 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) { 982 struct acpi_resource_fixed_memory32 *fixmem32; 983 984 fixmem32 = &res->data.fixed_memory32; 985 986 hdp->hd_phys_address = fixmem32->address; 987 hdp->hd_address = ioremap(fixmem32->address, 988 HPET_RANGE_SIZE); 989 990 if (hpet_is_known(hdp)) { 991 iounmap(hdp->hd_address); 992 return AE_ALREADY_EXISTS; 993 } 994 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) { 995 struct acpi_resource_extended_irq *irqp; 996 int i, irq; 997 998 irqp = &res->data.extended_irq; 999 1000 for (i = 0; i < irqp->interrupt_count; i++) { 1001 if (hdp->hd_nirqs >= HPET_MAX_TIMERS) 1002 break; 1003 1004 irq = acpi_register_gsi(NULL, irqp->interrupts[i], 1005 irqp->triggering, irqp->polarity); 1006 if (irq < 0) 1007 return AE_ERROR; 1008 1009 hdp->hd_irq[hdp->hd_nirqs] = irq; 1010 hdp->hd_nirqs++; 1011 } 1012 } 1013 1014 return AE_OK; 1015 } 1016 1017 static int hpet_acpi_add(struct acpi_device *device) 1018 { 1019 acpi_status result; 1020 struct hpet_data data; 1021 1022 memset(&data, 0, sizeof(data)); 1023 1024 result = 1025 acpi_walk_resources(device->handle, METHOD_NAME__CRS, 1026 hpet_resources, &data); 1027 1028 if (ACPI_FAILURE(result)) 1029 return -ENODEV; 1030 1031 if (!data.hd_address || !data.hd_nirqs) { 1032 if (data.hd_address) 1033 iounmap(data.hd_address); 1034 printk("%s: no address or irqs in _CRS\n", __func__); 1035 return -ENODEV; 1036 } 1037 1038 return hpet_alloc(&data); 1039 } 1040 1041 static const struct acpi_device_id hpet_device_ids[] = { 1042 {"PNP0103", 0}, 1043 {"", 0}, 1044 }; 1045 1046 static struct acpi_driver hpet_acpi_driver = { 1047 .name = "hpet", 1048 .ids = hpet_device_ids, 1049 .ops = { 1050 .add = hpet_acpi_add, 1051 }, 1052 }; 1053 1054 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops }; 1055 1056 static int __init hpet_init(void) 1057 { 1058 int result; 1059 1060 result = misc_register(&hpet_misc); 1061 if (result < 0) 1062 return -ENODEV; 1063 1064 sysctl_header = register_sysctl_table(dev_root); 1065 1066 result = acpi_bus_register_driver(&hpet_acpi_driver); 1067 if (result < 0) { 1068 if (sysctl_header) 1069 unregister_sysctl_table(sysctl_header); 1070 misc_deregister(&hpet_misc); 1071 return result; 1072 } 1073 1074 return 0; 1075 } 1076 device_initcall(hpet_init); 1077 1078 /* 1079 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>"); 1080 MODULE_LICENSE("GPL"); 1081 */ 1082