1 /* 2 * HP Quicksilver AGP GART routines 3 * 4 * Copyright (c) 2006, Kyle McMartin <kyle@parisc-linux.org> 5 * 6 * Based on drivers/char/agpgart/hp-agp.c which is 7 * (c) Copyright 2002, 2003 Hewlett-Packard Development Company, L.P. 8 * Bjorn Helgaas <bjorn.helgaas@hp.com> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 */ 15 16 #include <linux/module.h> 17 #include <linux/pci.h> 18 #include <linux/init.h> 19 #include <linux/klist.h> 20 #include <linux/agp_backend.h> 21 #include <linux/log2.h> 22 23 #include <asm/parisc-device.h> 24 #include <asm/ropes.h> 25 26 #include "agp.h" 27 28 #define DRVNAME "quicksilver" 29 #define DRVPFX DRVNAME ": " 30 31 #define AGP8X_MODE_BIT 3 32 #define AGP8X_MODE (1 << AGP8X_MODE_BIT) 33 34 static struct _parisc_agp_info { 35 void __iomem *ioc_regs; 36 void __iomem *lba_regs; 37 38 int lba_cap_offset; 39 40 u64 *gatt; 41 u64 gatt_entries; 42 43 u64 gart_base; 44 u64 gart_size; 45 46 int io_page_size; 47 int io_pages_per_kpage; 48 } parisc_agp_info; 49 50 static struct gatt_mask parisc_agp_masks[] = 51 { 52 { 53 .mask = SBA_PDIR_VALID_BIT, 54 .type = 0 55 } 56 }; 57 58 static struct aper_size_info_fixed parisc_agp_sizes[] = 59 { 60 {0, 0, 0}, /* filled in by parisc_agp_fetch_size() */ 61 }; 62 63 static int 64 parisc_agp_fetch_size(void) 65 { 66 int size; 67 68 size = parisc_agp_info.gart_size / MB(1); 69 parisc_agp_sizes[0].size = size; 70 agp_bridge->current_size = (void *) &parisc_agp_sizes[0]; 71 72 return size; 73 } 74 75 static int 76 parisc_agp_configure(void) 77 { 78 struct _parisc_agp_info *info = &parisc_agp_info; 79 80 agp_bridge->gart_bus_addr = info->gart_base; 81 agp_bridge->capndx = info->lba_cap_offset; 82 agp_bridge->mode = readl(info->lba_regs+info->lba_cap_offset+PCI_AGP_STATUS); 83 84 return 0; 85 } 86 87 static void 88 parisc_agp_tlbflush(struct agp_memory *mem) 89 { 90 struct _parisc_agp_info *info = &parisc_agp_info; 91 92 writeq(info->gart_base | ilog2(info->gart_size), info->ioc_regs+IOC_PCOM); 93 readq(info->ioc_regs+IOC_PCOM); /* flush */ 94 } 95 96 static int 97 parisc_agp_create_gatt_table(struct agp_bridge_data *bridge) 98 { 99 struct _parisc_agp_info *info = &parisc_agp_info; 100 int i; 101 102 for (i = 0; i < info->gatt_entries; i++) { 103 info->gatt[i] = (unsigned long)agp_bridge->scratch_page; 104 } 105 106 return 0; 107 } 108 109 static int 110 parisc_agp_free_gatt_table(struct agp_bridge_data *bridge) 111 { 112 struct _parisc_agp_info *info = &parisc_agp_info; 113 114 info->gatt[0] = SBA_AGPGART_COOKIE; 115 116 return 0; 117 } 118 119 static int 120 parisc_agp_insert_memory(struct agp_memory *mem, off_t pg_start, int type) 121 { 122 struct _parisc_agp_info *info = &parisc_agp_info; 123 int i, k; 124 off_t j, io_pg_start; 125 int io_pg_count; 126 127 if (type != 0 || mem->type != 0) { 128 return -EINVAL; 129 } 130 131 io_pg_start = info->io_pages_per_kpage * pg_start; 132 io_pg_count = info->io_pages_per_kpage * mem->page_count; 133 if ((io_pg_start + io_pg_count) > info->gatt_entries) { 134 return -EINVAL; 135 } 136 137 j = io_pg_start; 138 while (j < (io_pg_start + io_pg_count)) { 139 if (info->gatt[j]) 140 return -EBUSY; 141 j++; 142 } 143 144 if (!mem->is_flushed) { 145 global_cache_flush(); 146 mem->is_flushed = true; 147 } 148 149 for (i = 0, j = io_pg_start; i < mem->page_count; i++) { 150 unsigned long paddr; 151 152 paddr = mem->memory[i]; 153 for (k = 0; 154 k < info->io_pages_per_kpage; 155 k++, j++, paddr += info->io_page_size) { 156 info->gatt[j] = 157 agp_bridge->driver->mask_memory(agp_bridge, 158 paddr, type); 159 } 160 } 161 162 agp_bridge->driver->tlb_flush(mem); 163 164 return 0; 165 } 166 167 static int 168 parisc_agp_remove_memory(struct agp_memory *mem, off_t pg_start, int type) 169 { 170 struct _parisc_agp_info *info = &parisc_agp_info; 171 int i, io_pg_start, io_pg_count; 172 173 if (type != 0 || mem->type != 0) { 174 return -EINVAL; 175 } 176 177 io_pg_start = info->io_pages_per_kpage * pg_start; 178 io_pg_count = info->io_pages_per_kpage * mem->page_count; 179 for (i = io_pg_start; i < io_pg_count + io_pg_start; i++) { 180 info->gatt[i] = agp_bridge->scratch_page; 181 } 182 183 agp_bridge->driver->tlb_flush(mem); 184 return 0; 185 } 186 187 static unsigned long 188 parisc_agp_mask_memory(struct agp_bridge_data *bridge, 189 unsigned long addr, int type) 190 { 191 return SBA_PDIR_VALID_BIT | addr; 192 } 193 194 static void 195 parisc_agp_enable(struct agp_bridge_data *bridge, u32 mode) 196 { 197 struct _parisc_agp_info *info = &parisc_agp_info; 198 u32 command; 199 200 command = readl(info->lba_regs + info->lba_cap_offset + PCI_AGP_STATUS); 201 202 command = agp_collect_device_status(bridge, mode, command); 203 command |= 0x00000100; 204 205 writel(command, info->lba_regs + info->lba_cap_offset + PCI_AGP_COMMAND); 206 207 agp_device_command(command, (mode & AGP8X_MODE) != 0); 208 } 209 210 static const struct agp_bridge_driver parisc_agp_driver = { 211 .owner = THIS_MODULE, 212 .size_type = FIXED_APER_SIZE, 213 .configure = parisc_agp_configure, 214 .fetch_size = parisc_agp_fetch_size, 215 .tlb_flush = parisc_agp_tlbflush, 216 .mask_memory = parisc_agp_mask_memory, 217 .masks = parisc_agp_masks, 218 .agp_enable = parisc_agp_enable, 219 .cache_flush = global_cache_flush, 220 .create_gatt_table = parisc_agp_create_gatt_table, 221 .free_gatt_table = parisc_agp_free_gatt_table, 222 .insert_memory = parisc_agp_insert_memory, 223 .remove_memory = parisc_agp_remove_memory, 224 .alloc_by_type = agp_generic_alloc_by_type, 225 .free_by_type = agp_generic_free_by_type, 226 .agp_alloc_page = agp_generic_alloc_page, 227 .agp_alloc_pages = agp_generic_alloc_pages, 228 .agp_destroy_page = agp_generic_destroy_page, 229 .agp_destroy_pages = agp_generic_destroy_pages, 230 .agp_type_to_mask_type = agp_generic_type_to_mask_type, 231 .cant_use_aperture = true, 232 }; 233 234 static int __init 235 agp_ioc_init(void __iomem *ioc_regs) 236 { 237 struct _parisc_agp_info *info = &parisc_agp_info; 238 u64 iova_base, *io_pdir, io_tlb_ps; 239 int io_tlb_shift; 240 241 printk(KERN_INFO DRVPFX "IO PDIR shared with sba_iommu\n"); 242 243 info->ioc_regs = ioc_regs; 244 245 io_tlb_ps = readq(info->ioc_regs+IOC_TCNFG); 246 switch (io_tlb_ps) { 247 case 0: io_tlb_shift = 12; break; 248 case 1: io_tlb_shift = 13; break; 249 case 2: io_tlb_shift = 14; break; 250 case 3: io_tlb_shift = 16; break; 251 default: 252 printk(KERN_ERR DRVPFX "Invalid IOTLB page size " 253 "configuration 0x%llx\n", io_tlb_ps); 254 info->gatt = NULL; 255 info->gatt_entries = 0; 256 return -ENODEV; 257 } 258 info->io_page_size = 1 << io_tlb_shift; 259 info->io_pages_per_kpage = PAGE_SIZE / info->io_page_size; 260 261 iova_base = readq(info->ioc_regs+IOC_IBASE) & ~0x1; 262 info->gart_base = iova_base + PLUTO_IOVA_SIZE - PLUTO_GART_SIZE; 263 264 info->gart_size = PLUTO_GART_SIZE; 265 info->gatt_entries = info->gart_size / info->io_page_size; 266 267 io_pdir = phys_to_virt(readq(info->ioc_regs+IOC_PDIR_BASE)); 268 info->gatt = &io_pdir[(PLUTO_IOVA_SIZE/2) >> PAGE_SHIFT]; 269 270 if (info->gatt[0] != SBA_AGPGART_COOKIE) { 271 info->gatt = NULL; 272 info->gatt_entries = 0; 273 printk(KERN_ERR DRVPFX "No reserved IO PDIR entry found; " 274 "GART disabled\n"); 275 return -ENODEV; 276 } 277 278 return 0; 279 } 280 281 static int 282 lba_find_capability(int cap) 283 { 284 struct _parisc_agp_info *info = &parisc_agp_info; 285 u16 status; 286 u8 pos, id; 287 int ttl = 48; 288 289 status = readw(info->lba_regs + PCI_STATUS); 290 if (!(status & PCI_STATUS_CAP_LIST)) 291 return 0; 292 pos = readb(info->lba_regs + PCI_CAPABILITY_LIST); 293 while (ttl-- && pos >= 0x40) { 294 pos &= ~3; 295 id = readb(info->lba_regs + pos + PCI_CAP_LIST_ID); 296 if (id == 0xff) 297 break; 298 if (id == cap) 299 return pos; 300 pos = readb(info->lba_regs + pos + PCI_CAP_LIST_NEXT); 301 } 302 return 0; 303 } 304 305 static int __init 306 agp_lba_init(void __iomem *lba_hpa) 307 { 308 struct _parisc_agp_info *info = &parisc_agp_info; 309 int cap; 310 311 info->lba_regs = lba_hpa; 312 info->lba_cap_offset = lba_find_capability(PCI_CAP_ID_AGP); 313 314 cap = readl(lba_hpa + info->lba_cap_offset) & 0xff; 315 if (cap != PCI_CAP_ID_AGP) { 316 printk(KERN_ERR DRVPFX "Invalid capability ID 0x%02x at 0x%x\n", 317 cap, info->lba_cap_offset); 318 return -ENODEV; 319 } 320 321 return 0; 322 } 323 324 static int __init 325 parisc_agp_setup(void __iomem *ioc_hpa, void __iomem *lba_hpa) 326 { 327 struct pci_dev *fake_bridge_dev = NULL; 328 struct agp_bridge_data *bridge; 329 int error = 0; 330 331 fake_bridge_dev = alloc_pci_dev(); 332 if (!fake_bridge_dev) { 333 error = -ENOMEM; 334 goto fail; 335 } 336 337 error = agp_ioc_init(ioc_hpa); 338 if (error) 339 goto fail; 340 341 error = agp_lba_init(lba_hpa); 342 if (error) 343 goto fail; 344 345 bridge = agp_alloc_bridge(); 346 if (!bridge) { 347 error = -ENOMEM; 348 goto fail; 349 } 350 bridge->driver = &parisc_agp_driver; 351 352 fake_bridge_dev->vendor = PCI_VENDOR_ID_HP; 353 fake_bridge_dev->device = PCI_DEVICE_ID_HP_PCIX_LBA; 354 bridge->dev = fake_bridge_dev; 355 356 error = agp_add_bridge(bridge); 357 358 fail: 359 return error; 360 } 361 362 static struct device *next_device(struct klist_iter *i) { 363 struct klist_node * n = klist_next(i); 364 return n ? container_of(n, struct device, knode_parent) : NULL; 365 } 366 367 static int 368 parisc_agp_init(void) 369 { 370 extern struct sba_device *sba_list; 371 372 int err = -1; 373 struct parisc_device *sba = NULL, *lba = NULL; 374 struct lba_device *lbadev = NULL; 375 struct device *dev = NULL; 376 struct klist_iter i; 377 378 if (!sba_list) 379 goto out; 380 381 /* Find our parent Pluto */ 382 sba = sba_list->dev; 383 if (!IS_PLUTO(sba)) { 384 printk(KERN_INFO DRVPFX "No Pluto found, so no AGPGART for you.\n"); 385 goto out; 386 } 387 388 /* Now search our Pluto for our precious AGP device... */ 389 klist_iter_init(&sba->dev.klist_children, &i); 390 while ((dev = next_device(&i))) { 391 struct parisc_device *padev = to_parisc_device(dev); 392 if (IS_QUICKSILVER(padev)) 393 lba = padev; 394 } 395 klist_iter_exit(&i); 396 397 if (!lba) { 398 printk(KERN_INFO DRVPFX "No AGP devices found.\n"); 399 goto out; 400 } 401 402 lbadev = parisc_get_drvdata(lba); 403 404 /* w00t, let's go find our cookies... */ 405 parisc_agp_setup(sba_list->ioc[0].ioc_hpa, lbadev->hba.base_addr); 406 407 return 0; 408 409 out: 410 return err; 411 } 412 413 module_init(parisc_agp_init); 414 415 MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>"); 416 MODULE_LICENSE("GPL"); 417