1 /* 2 * ATi AGPGART routines. 3 */ 4 5 #include <linux/types.h> 6 #include <linux/module.h> 7 #include <linux/pci.h> 8 #include <linux/init.h> 9 #include <linux/string.h> 10 #include <linux/slab.h> 11 #include <linux/agp_backend.h> 12 #include <asm/agp.h> 13 #include <asm/set_memory.h> 14 #include "agp.h" 15 16 #define ATI_GART_MMBASE_BAR 1 17 #define ATI_RS100_APSIZE 0xac 18 #define ATI_RS100_IG_AGPMODE 0xb0 19 #define ATI_RS300_APSIZE 0xf8 20 #define ATI_RS300_IG_AGPMODE 0xfc 21 #define ATI_GART_FEATURE_ID 0x00 22 #define ATI_GART_BASE 0x04 23 #define ATI_GART_CACHE_SZBASE 0x08 24 #define ATI_GART_CACHE_CNTRL 0x0c 25 #define ATI_GART_CACHE_ENTRY_CNTRL 0x10 26 27 28 static const struct aper_size_info_lvl2 ati_generic_sizes[7] = 29 { 30 {2048, 524288, 0x0000000c}, 31 {1024, 262144, 0x0000000a}, 32 {512, 131072, 0x00000008}, 33 {256, 65536, 0x00000006}, 34 {128, 32768, 0x00000004}, 35 {64, 16384, 0x00000002}, 36 {32, 8192, 0x00000000} 37 }; 38 39 static struct gatt_mask ati_generic_masks[] = 40 { 41 { .mask = 1, .type = 0} 42 }; 43 44 45 struct ati_page_map { 46 unsigned long *real; 47 unsigned long __iomem *remapped; 48 }; 49 50 static struct _ati_generic_private { 51 volatile u8 __iomem *registers; 52 struct ati_page_map **gatt_pages; 53 int num_tables; 54 } ati_generic_private; 55 56 static int ati_create_page_map(struct ati_page_map *page_map) 57 { 58 int i, err; 59 60 page_map->real = (unsigned long *) __get_free_page(GFP_KERNEL); 61 if (page_map->real == NULL) 62 return -ENOMEM; 63 64 set_memory_uc((unsigned long)page_map->real, 1); 65 err = map_page_into_agp(virt_to_page(page_map->real)); 66 if (err) { 67 free_page((unsigned long)page_map->real); 68 return err; 69 } 70 page_map->remapped = page_map->real; 71 72 for (i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) { 73 writel(agp_bridge->scratch_page, page_map->remapped+i); 74 readl(page_map->remapped+i); /* PCI Posting. */ 75 } 76 77 return 0; 78 } 79 80 81 static void ati_free_page_map(struct ati_page_map *page_map) 82 { 83 unmap_page_from_agp(virt_to_page(page_map->real)); 84 set_memory_wb((unsigned long)page_map->real, 1); 85 free_page((unsigned long) page_map->real); 86 } 87 88 89 static void ati_free_gatt_pages(void) 90 { 91 int i; 92 struct ati_page_map **tables; 93 struct ati_page_map *entry; 94 95 tables = ati_generic_private.gatt_pages; 96 for (i = 0; i < ati_generic_private.num_tables; i++) { 97 entry = tables[i]; 98 if (entry != NULL) { 99 if (entry->real != NULL) 100 ati_free_page_map(entry); 101 kfree(entry); 102 } 103 } 104 kfree(tables); 105 } 106 107 108 static int ati_create_gatt_pages(int nr_tables) 109 { 110 struct ati_page_map **tables; 111 struct ati_page_map *entry; 112 int retval = 0; 113 int i; 114 115 tables = kzalloc_objs(struct ati_page_map *, nr_tables + 1); 116 if (tables == NULL) 117 return -ENOMEM; 118 119 for (i = 0; i < nr_tables; i++) { 120 entry = kzalloc_obj(struct ati_page_map); 121 tables[i] = entry; 122 if (entry == NULL) { 123 retval = -ENOMEM; 124 break; 125 } 126 retval = ati_create_page_map(entry); 127 if (retval != 0) 128 break; 129 } 130 ati_generic_private.num_tables = i; 131 ati_generic_private.gatt_pages = tables; 132 133 if (retval != 0) 134 ati_free_gatt_pages(); 135 136 return retval; 137 } 138 139 static int is_r200(void) 140 { 141 if ((agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS100) || 142 (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS200) || 143 (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS200_B) || 144 (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS250)) 145 return 1; 146 return 0; 147 } 148 149 static int ati_fetch_size(void) 150 { 151 int i; 152 u32 temp; 153 struct aper_size_info_lvl2 *values; 154 155 if (is_r200()) 156 pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp); 157 else 158 pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp); 159 160 temp = (temp & 0x0000000e); 161 values = A_SIZE_LVL2(agp_bridge->driver->aperture_sizes); 162 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) { 163 if (temp == values[i].size_value) { 164 agp_bridge->previous_size = 165 agp_bridge->current_size = (void *) (values + i); 166 167 agp_bridge->aperture_size_idx = i; 168 return values[i].size; 169 } 170 } 171 172 return 0; 173 } 174 175 static void ati_tlbflush(struct agp_memory * mem) 176 { 177 writel(1, ati_generic_private.registers+ATI_GART_CACHE_CNTRL); 178 readl(ati_generic_private.registers+ATI_GART_CACHE_CNTRL); /* PCI Posting. */ 179 } 180 181 static void ati_cleanup(void) 182 { 183 struct aper_size_info_lvl2 *previous_size; 184 u32 temp; 185 186 previous_size = A_SIZE_LVL2(agp_bridge->previous_size); 187 188 /* Write back the previous size and disable gart translation */ 189 if (is_r200()) { 190 pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp); 191 temp = ((temp & ~(0x0000000f)) | previous_size->size_value); 192 pci_write_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, temp); 193 } else { 194 pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp); 195 temp = ((temp & ~(0x0000000f)) | previous_size->size_value); 196 pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp); 197 } 198 iounmap((volatile u8 __iomem *)ati_generic_private.registers); 199 } 200 201 202 static int ati_configure(void) 203 { 204 phys_addr_t reg; 205 u32 temp; 206 207 /* Get the memory mapped registers */ 208 reg = pci_resource_start(agp_bridge->dev, ATI_GART_MMBASE_BAR); 209 ati_generic_private.registers = (volatile u8 __iomem *) ioremap(reg, 4096); 210 211 if (!ati_generic_private.registers) 212 return -ENOMEM; 213 214 if (is_r200()) 215 pci_write_config_dword(agp_bridge->dev, ATI_RS100_IG_AGPMODE, 0x20000); 216 else 217 pci_write_config_dword(agp_bridge->dev, ATI_RS300_IG_AGPMODE, 0x20000); 218 219 /* address to map to */ 220 /* 221 agp_bridge.gart_bus_addr = pci_bus_address(agp_bridge.dev, 222 AGP_APERTURE_BAR); 223 printk(KERN_INFO PFX "IGP320 gart_bus_addr: %x\n", agp_bridge.gart_bus_addr); 224 */ 225 writel(0x60000, ati_generic_private.registers+ATI_GART_FEATURE_ID); 226 readl(ati_generic_private.registers+ATI_GART_FEATURE_ID); /* PCI Posting.*/ 227 228 /* SIGNALED_SYSTEM_ERROR @ NB_STATUS */ 229 pci_read_config_dword(agp_bridge->dev, PCI_COMMAND, &temp); 230 pci_write_config_dword(agp_bridge->dev, PCI_COMMAND, temp | (1<<14)); 231 232 /* Write out the address of the gatt table */ 233 writel(agp_bridge->gatt_bus_addr, ati_generic_private.registers+ATI_GART_BASE); 234 readl(ati_generic_private.registers+ATI_GART_BASE); /* PCI Posting. */ 235 236 return 0; 237 } 238 239 240 static int agp_ati_resume(struct device *dev) 241 { 242 return ati_configure(); 243 } 244 245 /* 246 *Since we don't need contiguous memory we just try 247 * to get the gatt table once 248 */ 249 250 #define GET_PAGE_DIR_OFF(addr) (addr >> 22) 251 #define GET_PAGE_DIR_IDX(addr) (GET_PAGE_DIR_OFF(addr) - \ 252 GET_PAGE_DIR_OFF(agp_bridge->gart_bus_addr)) 253 #define GET_GATT_OFF(addr) ((addr & 0x003ff000) >> 12) 254 #undef GET_GATT 255 #define GET_GATT(addr) (ati_generic_private.gatt_pages[\ 256 GET_PAGE_DIR_IDX(addr)]->remapped) 257 258 static int ati_insert_memory(struct agp_memory * mem, 259 off_t pg_start, int type) 260 { 261 int i, j, num_entries; 262 unsigned long __iomem *cur_gatt; 263 unsigned long addr; 264 int mask_type; 265 266 num_entries = A_SIZE_LVL2(agp_bridge->current_size)->num_entries; 267 268 mask_type = agp_generic_type_to_mask_type(mem->bridge, type); 269 if (mask_type != 0 || type != mem->type) 270 return -EINVAL; 271 272 if (mem->page_count == 0) 273 return 0; 274 275 if ((pg_start + mem->page_count) > num_entries) 276 return -EINVAL; 277 278 j = pg_start; 279 while (j < (pg_start + mem->page_count)) { 280 addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr; 281 cur_gatt = GET_GATT(addr); 282 if (!PGE_EMPTY(agp_bridge,readl(cur_gatt+GET_GATT_OFF(addr)))) 283 return -EBUSY; 284 j++; 285 } 286 287 if (!mem->is_flushed) { 288 /*CACHE_FLUSH(); */ 289 global_cache_flush(); 290 mem->is_flushed = true; 291 } 292 293 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { 294 addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr; 295 cur_gatt = GET_GATT(addr); 296 writel(agp_bridge->driver->mask_memory(agp_bridge, 297 page_to_phys(mem->pages[i]), 298 mem->type), 299 cur_gatt+GET_GATT_OFF(addr)); 300 } 301 readl(GET_GATT(agp_bridge->gart_bus_addr)); /* PCI posting */ 302 agp_bridge->driver->tlb_flush(mem); 303 return 0; 304 } 305 306 static int ati_remove_memory(struct agp_memory * mem, off_t pg_start, 307 int type) 308 { 309 int i; 310 unsigned long __iomem *cur_gatt; 311 unsigned long addr; 312 int mask_type; 313 314 mask_type = agp_generic_type_to_mask_type(mem->bridge, type); 315 if (mask_type != 0 || type != mem->type) 316 return -EINVAL; 317 318 if (mem->page_count == 0) 319 return 0; 320 321 for (i = pg_start; i < (mem->page_count + pg_start); i++) { 322 addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr; 323 cur_gatt = GET_GATT(addr); 324 writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr)); 325 } 326 327 readl(GET_GATT(agp_bridge->gart_bus_addr)); /* PCI posting */ 328 agp_bridge->driver->tlb_flush(mem); 329 return 0; 330 } 331 332 static int ati_create_gatt_table(struct agp_bridge_data *bridge) 333 { 334 struct aper_size_info_lvl2 *value; 335 struct ati_page_map page_dir; 336 unsigned long __iomem *cur_gatt; 337 unsigned long addr; 338 int retval; 339 u32 temp; 340 int i; 341 struct aper_size_info_lvl2 *current_size; 342 343 value = A_SIZE_LVL2(agp_bridge->current_size); 344 retval = ati_create_page_map(&page_dir); 345 if (retval != 0) 346 return retval; 347 348 retval = ati_create_gatt_pages(value->num_entries / 1024); 349 if (retval != 0) { 350 ati_free_page_map(&page_dir); 351 return retval; 352 } 353 354 agp_bridge->gatt_table_real = (u32 *)page_dir.real; 355 agp_bridge->gatt_table = (u32 __iomem *) page_dir.remapped; 356 agp_bridge->gatt_bus_addr = virt_to_phys(page_dir.real); 357 358 /* Write out the size register */ 359 current_size = A_SIZE_LVL2(agp_bridge->current_size); 360 361 if (is_r200()) { 362 pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp); 363 temp = (((temp & ~(0x0000000e)) | current_size->size_value) 364 | 0x00000001); 365 pci_write_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, temp); 366 pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp); 367 } else { 368 pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp); 369 temp = (((temp & ~(0x0000000e)) | current_size->size_value) 370 | 0x00000001); 371 pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp); 372 pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp); 373 } 374 375 /* 376 * Get the address for the gart region. 377 * This is a bus address even on the alpha, b/c its 378 * used to program the agp master not the cpu 379 */ 380 addr = pci_bus_address(agp_bridge->dev, AGP_APERTURE_BAR); 381 agp_bridge->gart_bus_addr = addr; 382 383 /* Calculate the agp offset */ 384 for (i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) { 385 writel(virt_to_phys(ati_generic_private.gatt_pages[i]->real) | 1, 386 page_dir.remapped+GET_PAGE_DIR_OFF(addr)); 387 readl(page_dir.remapped+GET_PAGE_DIR_OFF(addr)); /* PCI Posting. */ 388 } 389 390 for (i = 0; i < value->num_entries; i++) { 391 addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr; 392 cur_gatt = GET_GATT(addr); 393 writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr)); 394 } 395 396 return 0; 397 } 398 399 static int ati_free_gatt_table(struct agp_bridge_data *bridge) 400 { 401 struct ati_page_map page_dir; 402 403 page_dir.real = (unsigned long *)agp_bridge->gatt_table_real; 404 page_dir.remapped = (unsigned long __iomem *)agp_bridge->gatt_table; 405 406 ati_free_gatt_pages(); 407 ati_free_page_map(&page_dir); 408 return 0; 409 } 410 411 static const struct agp_bridge_driver ati_generic_bridge = { 412 .owner = THIS_MODULE, 413 .aperture_sizes = ati_generic_sizes, 414 .size_type = LVL2_APER_SIZE, 415 .num_aperture_sizes = 7, 416 .needs_scratch_page = true, 417 .configure = ati_configure, 418 .fetch_size = ati_fetch_size, 419 .cleanup = ati_cleanup, 420 .tlb_flush = ati_tlbflush, 421 .mask_memory = agp_generic_mask_memory, 422 .masks = ati_generic_masks, 423 .agp_enable = agp_generic_enable, 424 .cache_flush = global_cache_flush, 425 .create_gatt_table = ati_create_gatt_table, 426 .free_gatt_table = ati_free_gatt_table, 427 .insert_memory = ati_insert_memory, 428 .remove_memory = ati_remove_memory, 429 .alloc_by_type = agp_generic_alloc_by_type, 430 .free_by_type = agp_generic_free_by_type, 431 .agp_alloc_page = agp_generic_alloc_page, 432 .agp_alloc_pages = agp_generic_alloc_pages, 433 .agp_destroy_page = agp_generic_destroy_page, 434 .agp_destroy_pages = agp_generic_destroy_pages, 435 .agp_type_to_mask_type = agp_generic_type_to_mask_type, 436 }; 437 438 439 static struct agp_device_ids ati_agp_device_ids[] = 440 { 441 { 442 .device_id = PCI_DEVICE_ID_ATI_RS100, 443 .chipset_name = "IGP320/M", 444 }, 445 { 446 .device_id = PCI_DEVICE_ID_ATI_RS200, 447 .chipset_name = "IGP330/340/345/350/M", 448 }, 449 { 450 .device_id = PCI_DEVICE_ID_ATI_RS200_B, 451 .chipset_name = "IGP345M", 452 }, 453 { 454 .device_id = PCI_DEVICE_ID_ATI_RS250, 455 .chipset_name = "IGP7000/M", 456 }, 457 { 458 .device_id = PCI_DEVICE_ID_ATI_RS300_100, 459 .chipset_name = "IGP9100/M", 460 }, 461 { 462 .device_id = PCI_DEVICE_ID_ATI_RS300_133, 463 .chipset_name = "IGP9100/M", 464 }, 465 { 466 .device_id = PCI_DEVICE_ID_ATI_RS300_166, 467 .chipset_name = "IGP9100/M", 468 }, 469 { 470 .device_id = PCI_DEVICE_ID_ATI_RS300_200, 471 .chipset_name = "IGP9100/M", 472 }, 473 { 474 .device_id = PCI_DEVICE_ID_ATI_RS350_133, 475 .chipset_name = "IGP9000/M", 476 }, 477 { 478 .device_id = PCI_DEVICE_ID_ATI_RS350_200, 479 .chipset_name = "IGP9100/M", 480 }, 481 { }, /* dummy final entry, always present */ 482 }; 483 484 static int agp_ati_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 485 { 486 struct agp_device_ids *devs = ati_agp_device_ids; 487 struct agp_bridge_data *bridge; 488 u8 cap_ptr; 489 int j; 490 491 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP); 492 if (!cap_ptr) 493 return -ENODEV; 494 495 /* probe for known chipsets */ 496 for (j = 0; devs[j].chipset_name; j++) { 497 if (pdev->device == devs[j].device_id) 498 goto found; 499 } 500 501 dev_err(&pdev->dev, "unsupported Ati chipset [%04x/%04x])\n", 502 pdev->vendor, pdev->device); 503 return -ENODEV; 504 505 found: 506 bridge = agp_alloc_bridge(); 507 if (!bridge) 508 return -ENOMEM; 509 510 bridge->dev = pdev; 511 bridge->capndx = cap_ptr; 512 513 bridge->driver = &ati_generic_bridge; 514 515 dev_info(&pdev->dev, "Ati %s chipset\n", devs[j].chipset_name); 516 517 /* Fill in the mode register */ 518 pci_read_config_dword(pdev, 519 bridge->capndx+PCI_AGP_STATUS, 520 &bridge->mode); 521 522 pci_set_drvdata(pdev, bridge); 523 return agp_add_bridge(bridge); 524 } 525 526 static void agp_ati_remove(struct pci_dev *pdev) 527 { 528 struct agp_bridge_data *bridge = pci_get_drvdata(pdev); 529 530 agp_remove_bridge(bridge); 531 agp_put_bridge(bridge); 532 } 533 534 static const struct pci_device_id agp_ati_pci_table[] = { 535 { 536 .class = (PCI_CLASS_BRIDGE_HOST << 8), 537 .class_mask = ~0, 538 .vendor = PCI_VENDOR_ID_ATI, 539 .device = PCI_ANY_ID, 540 .subvendor = PCI_ANY_ID, 541 .subdevice = PCI_ANY_ID, 542 }, 543 { } 544 }; 545 546 MODULE_DEVICE_TABLE(pci, agp_ati_pci_table); 547 548 static DEFINE_SIMPLE_DEV_PM_OPS(agp_ati_pm_ops, NULL, agp_ati_resume); 549 550 static struct pci_driver agp_ati_pci_driver = { 551 .name = "agpgart-ati", 552 .id_table = agp_ati_pci_table, 553 .probe = agp_ati_probe, 554 .remove = agp_ati_remove, 555 .driver.pm = &agp_ati_pm_ops, 556 }; 557 558 static int __init agp_ati_init(void) 559 { 560 if (agp_off) 561 return -EINVAL; 562 return pci_register_driver(&agp_ati_pci_driver); 563 } 564 565 static void __exit agp_ati_cleanup(void) 566 { 567 pci_unregister_driver(&agp_ati_pci_driver); 568 } 569 570 module_init(agp_ati_init); 571 module_exit(agp_ati_cleanup); 572 573 MODULE_AUTHOR("Dave Jones"); 574 MODULE_DESCRIPTION("ATi AGPGART routines"); 575 MODULE_LICENSE("GPL and additional rights"); 576 577